This thesis presents the low cost process for UBM formation on aluminum pads of single die/dice for Flip Chip applications. The UBM (Under Bump Metallurgy) is required in solder bump structure to provide adhesion/diffusion barrier layer, solder wettable layer, and oxidation barrier layer between the bonding pads of the die and the bumps. Typically, UBM is deposited on the whole wafers by sputtering, evaporation, or electroless plating. These deposition techniques are not practical for UBM formation on single die/dice, thus preventing Flip Chip technology to be applied in applications where the whole wafers are not available. The process presented in this thesis has been developed to overcome this problem. The developed UBM formation process allows the UBM layer to be deposited on a single die, thus eliminating the requirement to have the whole wafer in the deposition process. With the combination of the UBM formation process developed in this work and a suitable bump formation technique, solder bumping on a single die can be achieved, thus making Flip Chip technology available for use in low volume applications and prototyping stages. The developed UBM formation process consists of two major steps; temporary die attach process and UBM deposition process. The first process is developed using thermoplastic adhesive film. The second process is developed using electroless nickel plating, followed by gold immersion. It has been demonstrated in this thesis that the developed process can be used to form the UBM layer on the die successfully regardless of the die size and the complexity of the die pattern, and that this process does not damage nor affect electrically the sensitive die. / Master of Science

In hybrid pixel detector fabrication, high-density interconnection between focal plane array and the read-out integrated circuit is important. Bump bonding is the preferable assembly method, it is small in size, low cost, high performance and flexible I/O. Flip-chip bonding is a vertical connection technique of focal plane array and top substrate with solder bumps. In this paper, Flip-chip bonding by electroplated indium bumps is described. There are advantages of using indium as the solder material. It is relatively inexpensive, it has good thermal and electrical conductivity, it is ductile, and it is cryogenically stable. Indium bumps with a diameter of 30 µm are successfully prepared by an electroplating method, however removing indium conductive layer after electrodeposition is challenging. The corresponding electroplating indium bump process is also discussed. Electrical measurement was applied to detect the connection integrity of the flip-chip assemblies.

A number of recently constructed bridge approach slabs using an articulation at mid span and the wide flange terminal anchorage system have experienced settlement at their expansion joints. This problem is more commonly referred to as the bump at the end of the bridge. This study investigated reasons for the bumps and recommended ways to improve the current situation. To find out possible causes of the bridge approach slab problem, literature review, questionnaire survey, and a visual inspection for 18 Houston sites were conducted. Based on the results, two bridge sites in Houston, Texas, were selected for detailed investigation. An extensive series of laboratory and field tests were performed at each site. The main causes of bump at two study sites were compression of embankment soil and natural soil, and poor compaction of embankment soil. The finite-element computer program ABAQUS was used to evaluate behavior of the current approach slab design and of a possibly more effective design. The results show that the transition zone is about 12 m with 80 percent of the maximum settlement

As the trend of miniaturization of complex integrated circuit(IC) devices, the current density of flip-chip solder bumps have increased significantly and each solder joint is supporting a current density close to or even over 104 A/cm2 .Therefore, in SnPb eutectic solder, which has a high diffusivity at the operating temperature due to its low melting point, the electromigration becomes a major reliability threat. Thus, the thesis is aimed to investigate the effects of electromigration behavior on flip-chip package eutectic Sn-Pb solder bumps reliability under high current density. The current densities are 2x104 A/cm2 and 1.5x104 A/cm2,the surface of die temperatures are 115¢Jand 95¢J.The bump temperature, the histories of the bump resistance, and mean time to failure (MTTF) testings were conducted. The failure mechanism was observed through SEM and EDS. From the results of the experiment, the dominant failure mode of the bump is due to electromigration behavior that causes voids at UBM/bump interface (cathode) when the sample¡¦s failure time is shorter. As the failure time is longer, the failure is also resulted from heat effect in addition to electromigration behavior.

The trend of electrical products is light, thin and minimized with the fast operation and multi functionality, which also drives assembly technology towards the same goal. In advanced assembly technology, flip-chip is the one that can achieve the purposes. The pitch and size of a bump, which is in charge of current transmit, are also getting small. The prohibition of using lead content material also stimulates the development of lead-free material in the related industries. The paper is focused on adopting lead free solder paste such as Sn/Ag1.0/Cu0.5 and Sn/Ag4.0/Cu0.5, together with Al/NiV/Cu UBM made by bumping technology. The empirical analysis is based the shear strength of three different bump heights. The result shows the higher the content of Ag, the higher of the initial shear strength. Moreover, the experiment also investigated two solder bump IMC conditions and shear strength by using multi-reflow. The result shows that the IMC of Sn/Ag4.0/Cu0.5 solder paste increases after times of multi-reflow, but the shear strength was sharply decreased. The reliability test was also performed, such as temperature cycling test, temperature and humidity test, highly accelerated temperature and humidity stress test, high temperature storage life test. It¡¦s found the Sn/Ag1.0/Cu0.5 solder bump could maintain the original ductility; while the Sn/Ag4.0/Cu0.5 solder bump was decreasing the ductility due to the generation of IMC. Keyword¡GShear Strength, Flip-chip, Bump, IMC

90nm wafer process has been released in production, but the bump pitch released in production is 180um. The major problem is the yield of solder paste printing process below 180um will be less than 80%. It means the cost will be very high. Thus it is difficult to make 150um bump pitch by using printing process in production. Substrate C4 pad will be bumped by pre-solder, and it will be jointed with wafer bump after re-flow process. The printing process is the most popular process in C4 pad pre-solder due to low cost and high throughput. But the challenge of 150um and even more of the wafer bump pitch shrinkage are the inevitable trend. So, a lot of substrate manufacturers are trying to develop the new process for C4 pro-solder pitch less than 100um. As soon as the C4 pad pre-solder pitch has been shrunk, the solder volume will be shrunk as well. It means the bump structure will be getting weak, and it may not pass the reliability tests. Thus, to evaluate the workability of bump structure is our purpose. First, the simulation software is used to compare the fatigue lives of two structures by using solder bump and copper bump substrates during thermal cycling test, and then to proceed the whole FCBGA process and reliability tests. The result of evaluation confirm the workability of FCBGA product using copper bump substrate, and it can be used with the same parameter and machine in solder bump substrate. Keyword¡GFCBGA, Substrate, Bump, Cold Joint, Delamination

A number of recently constructed bridge approach slabs using an articulation at mid span and the wide flange terminal anchorage system have experienced settlement at their expansion joints. This problem is more commonly referred to as the bump at the end of the bridge. This study investigated reasons for the bumps and recommended ways to improve the current situation. To find out possible causes of the bridge approach slab problem, literature review, questionnaire survey, and a visual inspection for 18 Houston sites were conducted. Based on the results, two bridge sites in Houston, Texas, were selected for detailed investigation. An extensive series of laboratory and field tests were performed at each site. The main causes of bump at two study sites were compression of embankment soil and natural soil, and poor compaction of embankment soil. The finite-element computer program ABAQUS was used to evaluate behavior of the current approach slab design and of a possibly more effective design. The results show that the transition zone is about 12 m with 80 percent of the maximum settlement

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No description available.

Hybrid pixel detectors are widely used in many fields, including military, environment, industry and medical treatment. When integrating such a detector, a vertical connection technique called flip-chip bonding is almost the only way to realize the high-density interconnection between each pixel detector to the read-out chip. Such bonding can offer high-density I/O and a short interconnect distance, which can make the resulting device show excellent performance. Electro deposition is a promising approach to enable a low cost and high yield bump bonding process, compared with conventional sputtering or evaporation which is currently utilized for small-scale production. Due to that, Indium bumping process using electroplating is selected, as a result of which indium bump arrays with a pitch of 220 μm and a diameter of 30 μm have been fabricated using a standard silicon wafer processing. UBM (under bump metallization) for indium bumping was Ti/Ni (300 Å/ 2000 Å). It helps to increase adhesion between the wafer and the bumps and also serves as an excellent diffusion barrier both at room temperature and at 200°C. The indium is electroplated, using an indium sulfamate plating bath, and then formed into bumps through a reflow process. The reflow is made on a 200°C hot plate with a continuous flow of nitrogen over the wafer. During the reflow the indium is melted and forms into bumps due to surface tension. All the corresponding procedural processing steps and results are incorporated in this paper.