As the demand for wireless electronics is increasing, more and more gadgets are connected wirelessly and devices are being improved constantly. The need of the new research and development for advance electronics with high performances is the priority. The data transfer rates are improved for faster communication and better efficiency is to reduce the battery consumption in handheld devices. This thesis presents three single-stage power amplifiers (PAs): class-AB, class-F and inverse class-F (class-F-1) at 28 GHz. The PAs have identical input networks: input matching, base DC feed, and base stabilizing networks. At the load side, there is a different load network for each PA. Class-AB PA load network has a single inductor with a parasitic capacitor to create a resonance at 28GHz. Class-F PA load network is composed of a parallel network (one LC tank in series with an inductor) and a series network (one 3f0-resonance LC tank in series with a capacitor) to create a multi-resonance load network. Class-F-1 load network is composed of a parallel network (two LC tank in series with an inductor) and a series network (one 2f0-resonance LC tank in series with a capacitor) to have a multi-resonance network. The main purpose of using multi-resonance load networks in class-F and class-F-1 is to shape the collector currents and voltages in order to achieve the highest efficiency possible. The chosen bias point is VCE=2.3V and ICE~12mA. As the results, class-AB PA achieves the peak PAE of 44%, 15 dBm OP-1dB, >19 dBm Psat , and 10 dB Gp. Class-F PA achieves the peak PAE of 46%, 14.5 dBm OP-1dB, ~18 dBm Psat , and 10 dB Gp. Class-F-1 PA achieves the peak PAE of 45%, 15.1 dBm OP-1dB, >18 dBm Psat , and 10 dB Gp.. In order to compare the linearity performances among three PA classes, a two-tone signal and a modulated signal with different modulation schemes (QPSK, 16QAM, 64QAM, and 256QAM) are applied to the PAs to produce IM3, ACPR, and EVM. After the analysis and comparison on efficiency and linearity, class-F PA gives the highest efficiency but has the worst linearity while class-AB has the best linearity but has the worst efficiency among three. Class-F-1 PA results lies in the middle of two other classes in term of efficiency and linearity. / Master of Science

This research work has made an effort to understand a novel line of radio frequency power amplifiers (RFPAs) that address initiatives for efficiency enhancement and linearity compensation to harmonize the fifth generation (5G) campaign. The objective is to enhance the performance of an orthogonal frequency division multiplexing-long term evolution (OFDM-LTE) transmitter by reducing the nonlinear distortion of the RFPA. The first part of this work explores the design and implementation of 15.5 W class AB RF power amplifier, adopting a balanced technique to stimulate efficiency enhancement and redeeming exhibition of excessive power in the transmitter. Consequently, this work goes beyond improving efficiency over a linear RF power amplifier design; in which a comprehensive investigation on the fundamental and harmonic components of class F RF power amplifier using a load-pull approach to realise an optimum load impedance and the matching network is presented. The frequency bandwidth for both amplifiers was allocated to operate in the 2.620-2.690 GHz of mobile LTE applications. The second part explores the development of the behavioural model for the class AB power amplifier. A particular novel, Hammerstein-Wiener based model is proposed to describe the dynamic nonlinear behaviour of the power amplifier. The RF power amplifier nonlinear distortion is approximated using a new linear parameter approximation approach. The first and second-order Hammerstein-Wiener using the Normalised Least Mean Square Error (NLMSE) algorithm is used with the aim of easing the complexity of filtering process during linear memory cancellation. Moreover, an enhanced adaptive Wiener model is proposed to explore the nonlinear memory effect in the system. The proposed approach is able to balance between convergence speed and high-level accuracy when compared with behavioural modelling algorithms that are more complex in computation. Finally, the adaptive predistorter technique is implemented and verified in the OFDM transceiver test-bed. The results were compared against the computed one from MATLAB simulation for OFDM and 5G modulation transmitters. The results have confirmed the reliability of the model and the effectiveness of the proposed predistorter. / Fundacão para a Ciência e a Tecnologia, Portugal, under European Union’s Horizon 2020 research and innovation programme ... grant agreement H2020-MSCA-ITN- 2016 SECRET-722424 I also acknowledge the role of the National Space Research and Development Agency (NASRDA) Sokoto State Government Petroleum Technology Trust Fund (PTDF)

Master’s thesis deals with design of rail-to-rail second generation current conveyor in CMOS technology. Describes principles of function of different generations of current conveyors, as well as the basic principle of design of second generation current conveyor based on operational amplifier. Addresses circuit topology of input rail-to-rail stage and class AB output stage. The objective of this thesis is to design, characterize performance and create layout of second generation current conveyor with input common mode voltage rail-to-rail capability in ONSemi I3T25 technology.

This work focuses on fixing measurement inaccuracies to which models and figures of merit are susceptible in two wireless communication environments: power amplifier and multipath. To emulate or rate the performance of these environments, models and figures of merit, respectively, are often used. The usefulness of a model depends on how accurately and efficiently it emulates its real-world counterpart. The usefulness of a figure of merit depends on how accurately it represents system behavior. Most discussions on the challenges and trade-offs faced in modeling nearly always focus on the complexity of the device or channel of interest and the resultant difficulty in describing it. Similarly, figures of merit are meant only to summarize the performance of the device or channel. At some point, either in generation or verification of a model or figure of merit, there is a dependence on measured data. Though the complexity and performance of the device or channel are challenges by themselves, there are other significant sources of distortion that must be minimized to avoid errors in the measured data. For this work, the unique distortion of power amplifier and multipath environments is considered, and then errors in measurement which would obscure these distortions are eliminated. Specifically, three measurement issues are addressed: 1) identifying measurement setup artifacts, 2) achieving consistent measurement results and 3) reducing variations in the environment. This work contributes to increasing the accuracy of microwave measurements used in the modeling of nonlinear high-power amplifiers and used in figures of merit for power amplifiers and multipath channels.

Η παρούσα διδακτορική διατριβή εστίασε το ενδιαφέρον της στην διερεύνηση των αναλογικών ολοκληρωμένων φίλτρων της κατηγορίας ELIN εξωτερικά γραμμικά, εσωτερικά μη-γραμμικά. Συγκεκριμένα μελετήθηκαν και σχεδιάστηκαν, νέες δομές φίλτρων συμπίεσης-αποσυμπίεσης του προς επεξεργασία σήματος στο πεδίο του υπερβολικού ημιτόνου χαμηλής τάσης τροφοδοσίας. Η γοργή ανάπτυξη της μικροηλεκτρονικής στην υλοποίηση συστημάτων υψηλής αξιοπιστίας και απόδοσης μικρού βάρους και όγκου όπως φορητών ηλεκτρονικών πολυμέσων, επικοινωνιών, βιοϊατρικών συσκευών, ωθεί στην σχεδίαση των ολοκληρωμένων κυκλωμάτων που τα απαρτίζουν με μειωμένη κατανάλωση ισχύος και κατ’ επέκταση χαμηλής τάσης τροφοδοσίας. Σ’ ένα ολοκληρωμένο κύκλωμα η ενσωμάτωση αναλογικών και ψηφιακών κυκλωμάτων σε περιβάλλον χαμηλής τάσης τροφοδοσίας, ώστε το κόστος των διατάξεων να διατηρείται χαμηλό, επηρεάζει άμεσα την απόδοση του αναλογικού τμήματος, προτάσσοντας την ανάγκη για νέες αρχιτεκτονικές σχεδίασης του. Οι διατάξεις των αναλογικών φίλτρων αποτελούν συχνά δομικό στοιχείο των ολοκληρωμένων κυκλωμάτων και η διερεύνηση τους για την επίτευξη μεγάλης δυναμικής περιοχής, ηλεκτρονική ρύθμισης της απόκρισης συχνότητας και ταυτόχρονα χαμηλής κατανάλωσης ισχύος, έχει απασχολήσει αρκετά το ενδιαφέρον της ερευνητικής κοινότητας. Προτείνεται αρχικά η συστηματική σχεδίαση φίλτρων υψηλής τάξης στο πεδίο του υπερβολικού ημιτόνου, αποσκοπώντας στη βελτίωση της διαδικασίας υλοποίησης τους, με χρήση ήδη υπαρχουσών μη-γραμμικών διαγωγών υπερβολικού ημιτόνου, συνημίτονου. Η συμπίεση-αποσυμπίεση του προς επεξεργασία σήματος επιτυγχάνεται με την κατάλληλη τοποθέτηση συμπληρωματικών τελεστών ενώ ταυτόχρονα διατηρείται γραμμική η συνολική συμπεριφορά των διατάξεων. Με γνώμονα την εφαρμογή τους σε βιοϊατρικές συσκευές, εξομοιώνεται με δύο διαφορετικούς τρόπους φίλτρο 3ης τάξης leapfrog με συχνότητα αποκοπής 10Hz και τα αποτελέσματα που προκύπτουν συγκρίνονται με αντίστοιχο γραμμικής συμπεριφοράς. Στην συνέχεια, υλοποιείται η σχεδίαση BiCMOS φίλτρων οποιασδήποτε τάξης, δομημένα από μη-γραμμικούς διαγωγούς υπερβολικού ημιτόνου με δυνατότητα λειτουργίας σε υψηλές συχνότητες και σε χαμηλή τάση τροφοδοσίας. Επιλέγονται οι μέθοδοι του γραμμικού μετασχηματισμού, λειτουργικής και τοπολογικής εξομοίωσης ενός πρωτότυπου ελλειπτικού βαθυπερατού 3ης τάξης με συχνότητα αποκοπής 0.5 kHz και κυμάτωση στην ζώνη διέλευσης 0.5dB. Ακολουθεί ανάλυση και σύγκριση των αποτελεσμάτων που προκύπτουν στο περιβάλλον Analog Virtuoso της Cadence Software, της τεχνολογίας AMS CMOS S35 0.35μm, μεταξύ των φίλτρων στο πεδίο του υπερβολικού ημιτόνου καθώς και με αντίστοιχες διατάξεις στο πεδίο του λογαρίθμου τάξης-ΑΒ και (OTA)-C στο γραμμικό χώρο. Προτείνεται ακόμη, η BiCMOS σχεδίαση γενικευμένων φίλτρων 2ης τάξης απλής εισόδου-πολλαπλών εξόδων και πολλαπλής εισόδου-απλής εξόδου, με δυνατότητα λειτουργίας σε περιβάλλον χαμηλής τάσης τροφοδοσίας, ηλεκτρονικής ρύθμισης της συχνότητας αποκοπής ω0 του συντελεστή ποιότητας Q και της ορθογώνιας μεταβολής μεταξύ των. Από την εξομοίωση τους πρόκυψε ότι είναι ενεργειακά αποδοτικότερη η υλοποίηση τους συγκρινόμενα με αντίστοιχα στο πεδίο του λογαρίθμου. Τέλος, στα πλαίσια υλοποίησης βιοϊατρικών εφαρμογών προτείνεται η σχεδίαση ενός μη-γραμμικού τελεστή ενέργειας στο πεδίο του υπερβολικού ημιτόνου για την ανίχνευση αιχμών δραστηριότητας σε νευρωνικά δίκτυα με τάση τροφοδοσίας 0.5V. Ο μη-γραμμικός διαγωγός υπερβολικού ημιτόνου, του οποίου ο διαγραμμικός βρόγχος αποτελείται από (pMOS) τρανζίστορ δομεί τους διαφοριστές και πολλαπλασιαστές τεσσάρων τεταρτημορίων τάξης-ΑΒ που απαρτίζουν την διάταξη. Εξομοιώνεται, κάνοντας χρήση CMOS τρανζίστορ της τεχνολογίας TSMC 130 nm, στο περιβάλλον Analog Virtuoso της Cadence Software και συγκρινόμενος με ήδη υπάρχουσες διατάξεις, παρουσιάζει την μικρότερη κατανάλωση ισχύος. / This present Ph.D dissertation is focused its interest on the design of low voltage analog integrated circuits. Companding (compressing-expanding) systems are Externally Linear, Internally Non-linear (ELIN) processors with potential for low-voltage operation capability. In this direction novel topologies of companding filters in the Sinh-Domain are introduced. Τhe radical technological developments of microelectronics in the systems implementation with high reliability and performance, such as portable electronic devices for multimedia, communications and biomedical systems, demand the design of integrated circuits with reduced power consumption and thus low voltage supply. Integration of analog and digital circuits of systems-on-chip – (SoC) in order to be kept the low cost, directly affects the performance of the analog section, pointing forward the need for novel architectural design. One of the basic building blocks for circuit design is analog filters and their investigation in order to achieved large dynamic range, electronic tuning capability of their frequency characteristics which has gained a significant research effort toward these goals. At first, a new systematic method for designing Sinh-Domain filters is introduced. The proposed method offers the benefits of facilitating the design procedure of high-order Sinh-Domain filters using already introduced building blocks and of the absence of any restriction concerning the type and/or the order of the realized filter function. This is achieved by employing an appropriate set of complementary operators, in order to transpose the conventional functional block diagram representation of each linear operation to the corresponding one into the Sinh-Domain. In order to demonstrate the validity of the proposed systematic method, 3rd order leapfrog low-pass filter with a cut-off frequency at 10Hz which is typical for biomedical applications, has been realized following two alternative approaches and, also, a comparison has been performed among them and a conventional linear filter where the most important performance factors have been taken into account. Continuing, novel BiCMOS sinh-domain filter topologies, derived according to operational emulation, component substitution techniques and Linear Transformation of the corresponding 3rd-order passive prototype filters, with a cut-off frequency at 0.5 kHz and pass-band ripple 0.5dB, is proposed. This has been achieved by utilizing BiCMOS nonlinear ransconductor cells into the sinh domain. An attractive benefit of the proposed filter topologies is their capability for operating in high frequencies and a low-voltage environment. The performance of a leapfrog sinh-domain filter has been compared, using the Analog Design Environment of the Cadence software using AMS CMOS S35 0.35μm, with those of the corresponding log-domain and operational ransconductance amplifier (OTA)-C filters. Furthermore, the design of a family of Sinh-Domain universal biquad filters are introduced offering the benefits of low-voltage operation and, simultaneously, power efficient realizations in comparison with the corresponding already proposed biquads. Also, they have the capability for orthogonal adjustment between the resonance frequency and Q factor of the filter and these parameters could be also electronically adjusted through appropriate dc currents. Thus, they could be considered as attractive blocks for realizing high-performance analog signal processing systems. Finally, a Sinh-Domain topology for realizing the Non Linear Energy Operator (NEO) is introduced. For this purpose, a novel Sinh-Domain differentiator is proposed which offers the benefits of ultra low-voltage operation capability and electronic tuning of the realized time-constant. The whole system is also constructed from a four-quadrant current multiplier, realized by employing appropriately configured non-linear transconductors. Considering a single power supply voltage of 0.5V, the behavior of the proposed Sinh-Domain NEO realization has been simulated using the Analog Design Environment of the Cadence software using TSMC 130 nm design hit.

Ce travail répond à un besoin industriel accru en termes d’amplification des signaux sur porteuses à enveloppes variables utilisés par les systèmes de télécommunications actuels. Ces signaux disposent d’un fort PAPR et d’une distribution statistique d’enveloppe centrée en-deçà de la valeur crête d’enveloppe. La raison pour laquelle les industriels télécoms requièrent alors des amplificateurs de très fortes puissances de sortie, robustes, fiables et ayant une dépense énergétique optimale le long de la dynamique d’enveloppe associée à un niveau de linéarité acceptable. Ce document expose les résultats d’étude et de réalisation de deux Amplificateurs de Puissance Doherty (APD) à haut rendement encapsulés en boîtiers plastiques QFN. Le premier est un amplificateur Doherty symétrique classique (APD-SE) et le second est un amplificateur à deux entrées RF (APD-DE). Ces démonstrateurs fonctionnant en bande C sont fondés sur l’utilisation de la technologie Quasi-MMIC associant des barrettes de puissance à base des transistors HEMTs AlGaN/GaN sur SiC à des circuits d’adaptation en technologie ULRC. L’approche Quasi-MMIC associée à la solution d’encapsulation plastique QFN permettant une meilleure gestion des comportements thermiques offre des performances électriques similaires à celles de la technologie MMIC avec des coûts et des cycles de fabrication très attractifs. Durant ces travaux, une nouvelle méthode d’évaluation des transistors dédiés à la conception d’amplificateurs Doherty a été développée et mise en oeuvre. L’utilisation intensive des simulations électromagnétiques 2.5D et 3D a permis de bien prendre en compte les effets de couplages entre les différents circuits dans l’environnement du boîtier QFN. Les résultats des tests des amplificateurs réalisés fonctionnant sur une bande de 1GHz ont permis de valider la méthode de conception et ont montré que les concepts avancés associés à l’approche Quasi-MMIC ainsi qu’à des technologies d’encapsulation plastique, peuvent générer des fonctions micro-ondes innovantes. Les caractérisations de l’APD-DE ont relevé l’intérêt inhérent à la préformation des signaux d’excitation et des points de polarisation de chaque étage de l’amplificateur. / This work responds to an increased industrial need for on carrier signals with variable envelope amplification used by current telecommunications systems. These signals have a strong PAPR and an envelope statistical distribution centred below the envelope peak value, the reason why the telecom industrialists then require a robust and reliable high power amplifiers having an energy expenditure along of the envelope dynamics associated with an acceptable level of linearity. This document presents the results of the study and realization of two, high efficiency, Doherty Power Amplifiers (DPA) encapsulated in QFN plastic packages. The first is a conventional Doherty power Amplifier (DPA-SE) and the second is a dual-input Doherty power amplifier (DPA-DE). These C-band demonstrators are based on the use of Quasi-MMIC technology combining power bars based on the AlGaN/GaN transistors on SiC to matching circuits in ULRC technology. The Quasi-MMIC approach combined with Quasi-MMIC approach combined with QFN plastic package solution for better thermal behaviour management offers electrical performances similar to those of MMIC technology with very attractive coasts and manufacturing cycles. During this work, a new evaluation method for the transistors dedicated to the design of DPA was developed and implemented. The intensive use of 2.5D and 3D electromagnetic simulations made it possible to take into account the coupling effects existing between the different circuits in the QFN package environment. The results of the tests of the amplifiers realised and operating on 1GHz bandwidth validated the design method and showed that the advanced concepts associated with the Quasi-MMIC approach as well as plastic encapsulation technologies can generate innovative microwave functions. The characterizations of the DPA-DE have noted the interest inherent in the preformation of the excitation signals and the bias points of each stage of the amplifier.

Object of the master´s thesis is design of a high voltage power supply for testing insulation materials with output voltage 50 V - 2 kV at fixed frequency 50 Hz. The power supply is controlled by personal computer and measured data are sent back to the personal computer. The Universal Serial Bus (USB) is used for communication between the PC and the device.