Submitted work engages in suggestion of frequency-selection filters with usage of more active elements of the MCMI (Multi-Output Current Mirror and inverter). The preamble of thesis is applied to theory of frequency-selection filters and possible usage of them. The projected circuit layouts with the active elements are discussed in terms of the impact of parasitic properties of the real models. The part of thesis is numerical suggestion of found solutions, their simulation in suitable program.

The master thesis deals with design of the fully differential frequency filters working in the current mode and is focused on possibilities of the natural frequency and the quality factor adjustment. At the beginning, there is a brief description of frequency filters and active elements (MO-CF, FD-CF and DACA), which are used in the thesis. Furthermore, simplified signal flow graphs design method and transformation of passive and active elements to the differential structures are described. The designs of four differential circuitries which provide possibility of tuning the natural frequency or quality factor by the gain of the DACA element are shown in the thesis. Simulation results made in OrCAD program with help of third-order models are included. The practical implementation of the differential frequency filter for tuning of the natural frequency by the DACA elements is shown in the last chapter.

This master’s thesis deals with problems of analog differential converters, which are used in measuring circuits working in the current mode. The aim of this thesis is to propose a new voltage to current and current to voltage converter, that should influence measured frequency properties as little as possible. Commercial active elements are use to design converters. Active components are compared on the basis of properties as bandwidth and slew rate. Designed converters are simulated in Orcad PSpice program. Converters, of the best behavior are practically implemented and measured. Measured and simulated values are compared.

The presented dissertation thesis deals with modular design of analog circuits in CMOS technology. The goal of the work is to design a set of modular microelectronic building blocks and realize the selected modern active circuits, working primarily in current mode. Nevertheless, the modular approach can be used for design of generally known classical elements, e.g. opamps, as well. As a part of the work, the development of the totally new highly versatile active circuit CCTA has been done, including detailed analysis of utilization and introduction of the most interesting applications. This circuit CCTA, together with relative, already theoretically treated circuit CDTA, has been realized here for the first time, in two different topologies. Final circuits were tested. On the basis of measurement results the library of behavioral models for PSpice was created, including exemplary simulations of the selected applications. Based on the obtained knowledge the brief comparison of voltage mode circuits and current mode circuits was done.

Semestral thesis deals with fractional-order frequency filters. There is descripe proposal of the filter, their simulations and practical realizations. The first part is focused at the introduction to a frequency filters. The following is chapter which explore various proposals fractional-order frequency filters. The next chapter describes used activ elements in this thesis. Then there is briefly described a method of the signal flow graphs. The following is a description of the theoretical design of lowpass and highpass frequency filter, where order of the filter is between the first and second. Another part deal with the design and simulation of the four circuits. There are two curcuits consists of transconductance amplifiers (BOTA) and two curcuist consists of current followers. The last part of the thesis deals with practical realization of the two fractional-order filters.

This thesis deals with the fractional (1+)-order filters. The proposed filters operate in the current-mode. The derivation of the filters has been achieved using a third-order aproximation of the coresponding fractional-order transfer functions. It also describes active elements such as universal current conveyor, current follower and operational transconductance amplifier. In the end of this thesis some new circuit solutions of the fractional-order filter are proposed. Then the proposed filters are realized and experimentally measured.

No description available.

This thesis presents four-quadrant CMOS current-mode multiplier architectures based on the bipolar Gilbert cell multiplier architecture. Multipliers are designed using the CMOS subthreshold region to take advantage of the subthreshold exponential I-V relationship that closely matches bipolar modeling. It is discovered that biasing to remove drift current components and to address higher order effects such as ideality factor mismatch, threshold mismatch, body effect, and short channel effects, is important to provide a linear multiplier. It is also shown that distortion caused by device size mismatch and offset input currents can be used to cancel the distortion introduced by drift currents when designing in weak and moderate inversion. This concept allows for linear multiplier designs with larger input currents which results in dramatic improvements in bandwidth over traditional weak inversion circuits. Three multiplier circuits are simulated and fabricated in an AMIS 0.35-um process. Circuits with less than 1 % nonlinear error and distortion (THD) across 100 % dynamic input range and with bandwidths greater than 100 MHz can be built. Also, low power multiplier solutions are presented that consume less than 40 nW of dynamic power.

The main goal of this thesis is to develop practical digital controller architectures for multi-phase dc-dc converters utilized in low power (up to few hundred watts) and cost-sensitive applications. The proposed controllers are suitable for on-chip integration while being capable of providing advanced features, such as dynamic efficiency optimization, inductor current estimation, converter component identification, as well as combined dynamic current sharing and fast transient response. The first part of this thesis addresses challenges related to the practical implementation of digital controllers for low-power multi-phase dc-dc converters. As a possible solution, a multi-use high-frequency digital PWM controller IC that can regulate up to four switching converters (either interleaved or standalone) is presented. Due to its configurability, low current consumption (90.25 μA/MHz per phase), fault-tolerant work, and ability to operate at high switching frequencies (programmable, up to 10 MHz), the IC is suitable to control various dc-dc converters. The applications range from dc-dc converters used in miniature battery-powered electronic devices consuming a fraction of watt to multi-phase dedicated supplies for communication systems, consuming hundreds of watts. A controller for multi-phase converters with unequal current sharing is introduced and an efficiency optimization method based on logarithmic current sharing is proposed in the second part. By forcing converters to operate at their peak efficiencies and dynamically adjusting the number of active converter phases based on the output load current, a significant improvement in efficiency over the full range of operation is obtained (up to 25%). The stability and inductor current transition problems related to this mode of operation are also resolved. At last, two reconfigurable digital controller architectures with multi-parameter estimation are introduced. Both controllers eliminate the need for external analog current/temperature sensing circuits by accurately estimating phase inductor currents and identifying critical phase parameters such as equivalent resistances, inductances and output capacitance. A sensorless non-linear, average current-mode controller is introduced to provide fast transient response (under 5 μs), small voltage deviation and dynamic current sharing with multi-phase converters. To equalize the thermal stress of phase components, a conduction loss-based current sharing scheme is proposed and implemented.

The main goal of this thesis is to develop practical digital controller architectures for multi-phase dc-dc converters utilized in low power (up to few hundred watts) and cost-sensitive applications. The proposed controllers are suitable for on-chip integration while being capable of providing advanced features, such as dynamic efficiency optimization, inductor current estimation, converter component identification, as well as combined dynamic current sharing and fast transient response. The first part of this thesis addresses challenges related to the practical implementation of digital controllers for low-power multi-phase dc-dc converters. As a possible solution, a multi-use high-frequency digital PWM controller IC that can regulate up to four switching converters (either interleaved or standalone) is presented. Due to its configurability, low current consumption (90.25 μA/MHz per phase), fault-tolerant work, and ability to operate at high switching frequencies (programmable, up to 10 MHz), the IC is suitable to control various dc-dc converters. The applications range from dc-dc converters used in miniature battery-powered electronic devices consuming a fraction of watt to multi-phase dedicated supplies for communication systems, consuming hundreds of watts. A controller for multi-phase converters with unequal current sharing is introduced and an efficiency optimization method based on logarithmic current sharing is proposed in the second part. By forcing converters to operate at their peak efficiencies and dynamically adjusting the number of active converter phases based on the output load current, a significant improvement in efficiency over the full range of operation is obtained (up to 25%). The stability and inductor current transition problems related to this mode of operation are also resolved. At last, two reconfigurable digital controller architectures with multi-parameter estimation are introduced. Both controllers eliminate the need for external analog current/temperature sensing circuits by accurately estimating phase inductor currents and identifying critical phase parameters such as equivalent resistances, inductances and output capacitance. A sensorless non-linear, average current-mode controller is introduced to provide fast transient response (under 5 μs), small voltage deviation and dynamic current sharing with multi-phase converters. To equalize the thermal stress of phase components, a conduction loss-based current sharing scheme is proposed and implemented.