In this thesis, we present a graphical computer-aided design (CAD) environment for the design, analysis and layout of printed electronic batteries in the first phase and the parasitic extraction of the connecting wires in the second phase. The primary motivation of our work is that this prototyping software tool so far does not exist. Our tool has been integrated within the existing CAD tool which allows quick prototyping and simplifies the interface between the system designer and the device manufacturer. This tools supports the schematic and layout entry, rule checking and netlist generation. The first phase of the device synthesis modelling is based on Enfucell printed batteries, by which using the CAD tool, the shape of the battery is optimized and designed to fit the product and is able to simulate the performance during the optimization, whereas the second phase is the parasitic extraction using an extracting tool named fasthenry, which is integrated to our CAD tool to extract unwanted resistance and inductance within the shared wires between the battery and other devices. We believe that the availability of this tool is useful to the CAD community for novel ideas in the circuit design for flexible hybrid electronics. / +46764354255, +46722694942

Ces travaux de thèse portent sur l'accélération de calculs de la cryptographie sur courbes elliptiques (ECC) grâce à une représentation peu habituelle des nombres, appelée représentation modulaire des nombres (ou RNS pour residue number system). Après un état de l'art de l'utilisation du RNS en cryptographie, plusieurs nouveaux algorithmes RNS, plus rapides que ceux de l'état de l'art, sont présentés. Premièrement, nous avons proposé un nouvel algorithme d'inversion modulaire en RNS. Les performances de notre algorithme ont été validées via une implantation FPGA, résultant en une inversion modulaire 5 à 12 fois plus rapide que l'état de l'art, pour les paramètres cryptographiques testés. Deuxièmement, un algorithme de multiplication modulaire RNS a été proposé. Cet algorithme décompose les valeurs en entrée et les calculs, afin de pouvoir réutiliser certaines parties lorsque c'est possible, par exemple lors du calcul d'un carré. Il permet de réduire de près de 25 % le nombre de pré-calculs à stocker et jusqu'à 10 % le nombre de multiplications élémentaires pour certaines applications cryptographiques (p. ex. le logarithme discret). Un algorithme d'exponentiation reprenant les mêmes idées est aussi présenté, réduisant le nombre de multiplications élémentaires de 15 à 22 %, contre un surcoût en pré-calculs à stocker. Troisièmement, un autre algorithme de multiplication modulaire RNS est proposé, ne nécessitant qu'une seule base RNS au lieu de 2 pour l'état de l'art, et utilisable uniquement dans le cadre ECC. Cet algorithme permet, pour certains corps bien spécifiques, de diviser par 2 le nombre de multiplications élémentaires et par 4 les pré-calculs à stocker. Les premiers résultats FPGA donnent des implantations de notre algorithme jusqu'à 2 fois plus petites que celles de l'algorithme de l'état de l'art, pour un surcoût en temps d'au plus 10 %. Finalement, une méthode permettant des tests de divisibilités multiples rapides est proposée, pouvant être utilisée en matériel pour un recodage de scalaire, accélérant certains calculs pour ECC. / The main objective of this PhD thesis is to speedup elliptic curve cryptography (ECC) computations, using the residue number system (RNS). A state-of-art of RNS for cryptographic computations is presented. Then, several new RNS algorithms, faster than state-of-art ones, are proposed. First, a new RNS modular inversion algorithm is presented. This algorithm leads to implementations from 5 to 12 times faster than state-of-art ones, for the standard cryptographic parameters evaluated. Second, a new algorithm for RNS modular multiplication is proposed. In this algorithm, computations are split into independant parts, which can be reused in some computations when operands are reused, for instance to perform a square. It reduces the number of precomputations by 25 % and the number of elementary multiplications up to 10 %, for some cryptographic applications (for example with the discrete logarithm). Using the same idea, an exponentiation algorithm is also proposed. It reduces from 15 % to 22 % the number of elementary multiplications, but requires more precomputations than state-of-art. Third, another modular multiplication algorithm is presented, requiring only one RNS base, instead of 2 for the state-of-art. This algorithm can be used for ECC and well-chosen fields, it divides by 2 the number of elementary multiplications, and by 4 the number of precomputations to store. Partial FPGA implementations of our algorithm halves the area, for a computation time overhead of, at worse, 10 %, compared to state-of-art algorithms. Finally, a method for fast multiple divisibility tests is presented, which can be used in hardware for scalar recoding to accelerate some ECC computations.

The design of VLSI electronic circuits can be achieved at many different abstraction levels starting from system behavior to the most detailed, physical layout level. As the number of transistors in VLSI circuits is increasing, the complexity of the design is also increasing, and it is now beyond human ability to manage. Hence CAD (Computer Aided design) or EDA (Electronic Design Automation) tools are involved in the design. EDA or CAD tools automate the design, verification and testing of these VLSI circuits. In today’s market, there are many EDA tools available. However, they are very expensive and require high-performance platforms. One of the key challenges today is to select appropriate CAD or EDA tools which are open-source for academic purposes. This thesis provides a detailed examination of an open-source EDA tool called Electric VLSI Design system. An excellent and efficient CAD tool useful for students and teachers to implement ideas by modifying the source code, Electric fulfills these requirements. This thesis' primary objective is to explain the Electric software features and architecture and to provide various digital and analog designs that are implemented by this software for educational purposes. Since the choice of an EDA tool is based on the efficiency and functions that it can provide, this thesis explains all the analysis and synthesis tools that electric provides and how efficient they are. Hence, this thesis is of benefit for students and teachers that choose Electric as their open-source EDA tool for educational purposes.

Dans cette thèse, le comportement d'un modèle mathématique permettant de transcrire la dynamique neuronale est étudié : le système de FitzHugh-Nagumo. En particulier, nous nous intéressons au caractère aléatoire d'ouverture et de fermeture des canaux ioniques d'un neurone qui reçoit ou non un stimulus. Ce caractère aléatoire de la dynamique neuronale est considéré, dans notre modèle, comme un bruit. Dans un premier temps, le comportement du modèle de FitzHugh-Nagumo a été caractérisé au voisinage de la bifurcation d'Andronov-Hopf qui traduit la transition entre l'état d'activation et l'état de repos du neurone. Classiquement, un neurone positionné à l'état de repos ne produit aucun potentiel d'action. Cependant, il a été montré un phénomène pour lequel une quantité appropriée de bruit permet la production de potentiels d'action des plus réguliers : la résonance cohérente. Le deuxième effet observé lors de simulations numériques permet au neurone d'améliorer la détection et l'encodage d'un signal subliminal : il s'agit de la résonance stochastique. De plus, cette thèse s'inscrit dans un contexte électronique puisqu'en plus de simuler numériquement le système de FitzHugh-Nagumo, les résultats de simulations ont également été confirmés en réalisant un circuit électronique. En effet, nous avons reproduit la dynamique non linéaire du système de FitzHugh-Nagumo à l'aide de ce circuit électronique. Cela a permis de mettre en évidence expérimentalement les deux phénomènes de résonance cohérente et de résonance stochastique pour lesquelles le bruit peut avoir une influence constructive sur le comportement de notre circuit électronique. / We study the nonlinear FitzHugh-Nagumo model witch describes the dynamics of excitable neural element. It is well known that this system exhibits three different possible responses. Indeed, the system can be mono-stable, oscillatory or bistable. In the oscillatory regime, the system periodically responds by generating action potential. By contrast, in the mono-stable state the system response remains constant after a transient. Under certain conditions, the system can undergo a bifurcation between the stable and the oscillatory regime via the so called Andronov-Hopf bifurcation. In this Phd thesis, we consider the FitzHugh-Nagumo model in the stable state, that is set near the Andronov-Hopf bifurcation. Moreover, we take into account the contribution of noise witch can induces two phenomena coherence resonance and stochastic resonance. First, without external driving, we show the effect of coherence resonance since a critical noise level enhances the regularity of the system response. Another numerical investigation reports how noise can allow to detect a subthreshold deterministic signal applied to the system. In this case, an appropriate amount of noise maximizes the signal to noise ratio reveling the stochastic resonance signature. Besides this numerical studies, we have also built a non linear circuit simulating the FitzHugh-Nagumo model under the presence of noise. This circuit has allowed to confirm experimentally the numerical observation of stochastic resonance and coherence resonance. Therefor, this electronic circuit contributes a framework for further experimental investigation in the field of neural sciences to better understand the role of noise in neural encoding.

Les possibles effets bénéfiques de perturbations déterministes ou stochastiques sur la réponse de différents systèmes non linéaires sont étudiés. À cet effet, des études numériques et expérimentales sont conjointement proposées sur deux structures distinctes : un oscillateur électronique de type FitzHugh-Nagumo et une ligne électrique constituée de 45 de ces oscillateurs couplés résistivement. La caractérisation de l’oscillateur élémentaire est d’abord réalisée en régime déterministe. En présence d’une excitation bichromatique, il est notamment montré que lorsque la composante de fréquence la plus faible est subliminale, sa détection en sortie du système peut être maximisée pour une amplitude particulière de la seconde composante, qui agit alors comme une perturbation haute fréquence. Par la suite, il est établi que ce phénomène de résonance vibrationnelle peut être amélioré pour quelques fréquences spécifiques de cette perturbation déterministe. Par ailleurs, en introduisant une composante stochastique dans l’excitation, l’attention est ensuite portée sur le phénomène de résonance stochastique fantôme. Celui-ci se distingue par le fait que la fréquence d’intérêt en sortie du système ne fait désormais plus partie du signal excitateur. La dernière partie est consacrée à l’étude de la structure couplée. Il est montré que la propagation d’une information à travers les cellules de la ligne peut être améliorée via les phénomènes de propagation vibrationnelle et de propagation assistée par le bruit. Ceux-ci se produisent sous certaines conditions, lorsque le système est respectivement sous l’influence d’une perturbation déterministe haute fréquence ou d’une source de bruit. / This manuscript presents research aiming to show possible positive effects of deterministic and stochastic perturbations on the responses of different nonlinear systems. To that end, both numerical and experimental studies were carried out on two kinds of structures : an elementary electronic FitzHugh-Nagumo oscillator and an electrical line developed by resistively coupling 45 elementary cells. In the first section, the elementary cell characterization was undertaken in a deterministic regime. In the presence of a bichromatic stimulus, it is shown that when the low frequency component is subthreshold, its detection can be maximized for an optimal magnitude of the second component thanks to vibrational resonance. Next, it is established that this resonance may be enhanced for specific frequencies of the second component ; this phenomenon is referred to as frequency resonance. Furthermore, white and colored noise sources effects on vibrational resonance are reported. Then, for any other bichromatic excitation configuration, attention was focused on ghost stochastic resonance. Contrary to the other phenomena introduced in this manuscript, this one differs in the fact that the frequency of interest in the system output is here not applied on the input. Finally, the last part of the manuscript is devoted to the study of the coupled structure. It is shown that information propagation through line cells can be enhanced by vibrational propagation and noise assisted propagation phenomena. These nonlinear effects respectively occur when the system is under a high frequency deterministic perturbation or a random noise source.

A scheme for Built-in-Self-Test (BIST) of analog signals with minimal area overhead, for measuring on-chip voltages in an all-digital manner is presented in this thesis. With technology scaling, the inverter switching times are becoming shorter thus leading to better resolution of edges in time. This time resolution is observed to be superior to voltage resolution in the face of reducing supply voltage and increasing variations as physical dimensions shrink. In this thesis, a new method of observability of analog signals is proposed, which is digital-friendly and scalable to future deep sub-micron (DSM) processes. The low-bandwidth analog test voltage is captured as the delay between a pair of clock signals. The delay thus setup is measured digitally in accordance with the desired resolution. Such an approach lends itself easily to distributed manner, where the routing of analog signals over long paths is minimized. A small piece of circuitry, called sampling head (SpH) placed near each test voltage, acts as a transducer converting the test voltage to a delay between a pair of low-frequency clocks. A probe clock and a sampling clock is routed serially to the sampling heads placed at the nodes of analog test voltages. This sampling head, present at each test node consists of a pair of delay cells and a pair of flip-flops, giving rise to as many sub-sampled signal pairs as the number of nodes. To measure a certain analog voltage, the corresponding sub-sampled signal pair is fed to a Delay Measurement Unit (DMU) to measure the skew between this pair. The concept is validated by designing a test chip in UMC 130 nm CMOS process. Sub-mV accuracy for static signals is demonstrated for a measurement time of few milliseconds and ENOB of 5.29 is demonstrated for low bandwidth signals in the absence of sample-and-hold circuitry. The sampling clock is derived from the probe clock using a PLL and the design equations are worked out for optimal performance. To validate the concept, the duty-cycle of the probe clock, whose ON-time is modulated by a sine wave, is measured by the same DMU. Measurement results from FPGA implementation confirm 9 bits of resolution.

Indiana University-Purdue University Indianapolis (IUPUI) / Lithium-ion batteries are widely used for portable electronics due to high energy density, mature processing technology and reduced cost. However, their applications are somewhat limited by safety concerns. The lithium-ion battery users will take risks in burn or explosion which results from some internal components failure. So, a practical method is required urgently to find out the failures in early time. In this thesis, a new method based on temperature difference between internal point and surface (TDIS) of the battery is developed to detect the thermal failure especially the thermal runaway in early time. A lumped simple thermal model of a lithium-ion battery is developed based on TDIS. Heat transfer coefficients and heat capacity are determined from simultaneous measurements of the surface temperature and the internal temperature in cyclic constant current charging/discharging test. A look-up table of heating power in lithium ion battery is developed based on the lumped model and cyclic charging/discharging experimental results in normal operating condition. A failure detector is also built based on TDIS and reference heating power curve from the look-up table to detect aberrant heating power and bad parameters in transfer function of the lumped model. The TDIS method and TDIS detector is validated to be effective in thermal runaway detection in a thermal runway experiment. In the validation of thermal runway test, the system can find the abnormal heat generation before thermal runaway happens by detecting both abnormal heating power generation and parameter change in transfer function of thermal model of lithium ion batteries. The result of validation is compatible with the expectation of detector design. A simple and applicable detector is developed for lithium ion battery catastrophic failure detection.