A new high-level language is sought after for implementing and mocking functional-ity on the Axis Communications platform. We analyze what impact the Node.js run-time environment has regarding performance and its ability to perform functionality.The performance refers to metrics on CPU, memory, free disk space and responsetimes and what effect an added Node.js runtime has on the platform. The functional-ity is based on Axis’ ideas about having Node.js run high-level services. A test planvalidates the functionality of a JavaScript service implemented as an API with JSONobjects as a POST and GET methods. To test the performance a test suite that sam-ples the data on a device and saves it like log files on a client. The variable is threedifferent stages, where the current device serves as the baseline. Secondly, to findout what impact Node.js itself has the second stage is with Node.js present and thethird stage represents a device where Node.js and the JavaScript service is put underload. The results show that it is possible to implement a JavaScript service runningunder Node.js since the test plan with its assertions passed on all tests. Regardingperformance and response time we did see a decrease in CPU idle time and memoryand an increase in the response time compared to the baseline.

Most of the hardware products today, especially those that people interact with, are controlled by software. There are many devices with inbuilt software which many people do not bother to notice. Software may be critical in terms of strict quality requirements due to failures which enable risks of endangering the production and more importantly the lives of people. The testing team of Westermo Network Technologies AB faced a challenge with not being able to identify the coverage of tested cases in software. Identifying the coverage of total executed test cases enables the possibility of knowing the potential future quality of a software. By reaching such a stage a software will likely not suffer from failures due to higher quality, therefore the lives of people and the production at stake will not get harmed. The essential problem is that test cases are both tested and skipped, which makes it more difficult for the company to identify what has been actually tested and skipped. The purpose of this thesis is to identify and calculate the coverage of test cases, the process was mainly to understand the essence in the identification of executed test cases. The ethical aspect of putting people's lives at stake is what inspired us to investigate software failures. Software is typically tested before a release, therefore our investigation was to research testing process of software. When investigating test result over many days and test systems we developed a coverage calculator system which helps Westermo to decide and determine the release of tested software, either the software test result is acceptable for a release or not.

The CubeSat pico-satellite is gaining popularity in both the educational and aerospace industries. Due to a lack of experience and constrained hardware capabilities, most of the university missions have been educational in nature. Cal Poly's project, PolySat, has gained significant experience from the launch of five CubeSats and has designed an entirely new hardware platform based on the knowledge gained from these missions. This hardware is a significant upgrade from what the previous missions used and has greatly increased the capabilities of the software, including supporting the use of the open source operating system Linux. Leveraging the previous PolySat experience, a new design approach has been followed for the development of a fault tolerant and flexible software architecture. As a result, a set of processes and custom libraries that run within Linux have been designed and implemented. Furthermore, an emphasis has been placed on fault tolerance with two features: a software watchdog and digital command signing capability. Lastly, a survey of related CubeSat projects and software fault tolerance papers has been conducted to determine that this new system is sufficient to meet the desired goals.

Today new technology is rapidly being developed, therefore it becomesdicult for developers to continue development and recreate builds ofsoftware written just a few years ago. Because of this, a quality attributeto make it easier for developers to recreate and continue development ofold systems is needed. The aim of this thesis is to dene what sustain-able system development is and develop a quality attribute for it. Thequality attribute is presented together with tactics, general scenarios andpatterns that can be used to implement the quality attribute on dierentsystems.This is to make it easier for developers to recreate and continuedevelopment of old systems.To dene sustainable system development a number of interviews weredone. These interviews were done with people that are developing soft-ware and with people that are working in the area of improving systemsreproducability. From these interviews sustainable system developmentwas concluded to be dened by how good reproducibility, testability, mod-iability and portability the system has.To prove that the concept for the quality attribute works, the qualityattribute was applied on the system for the ECU Coordinator 8 at Sca-nia. With the aim to implement sustainable system development on thatsystem. The implementation improved the reproducibility and testabilityof the system. But it didn't improve the modiability and portability,which means that the implementation at Scania can still be further im-proved. Some tests were performed where a developer at Scania triedto recreate the system after the implementation of the quality attribute.These tests were successful and an interview with the developer was doneafter the test, where the developer thought that the implementation hada positive eect on sustainable system development. From this the proofof concept for the quality attribute can be seen as successful.

Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even ???trusted software???. Reliability is of concern, where unintended code is executed in modern processors with ever smaller feature sizes and low voltage swings causing bit flips. Countermeasures by software-only approaches increase code size and therefore significantly reduce performance. Hardware assisted approaches use additional hardware monitors and thus incur considerably high hardware cost and have scalability problems. Considering reliability and security issues during the design of an embedded system has its advantages as this overcomes the limitations of existing solutions. The research work presented in this thesis combines two elements: one, defining a hardware software design framework for reliability and security monitoring at the granularity of micro-instructions, and two, applying this framework for real world problems. At a given time, a processor executes only a few instructions and large part of the processor is idle. Utilizing these idling hardware components by sharing them with the monitoring hardware, to perform security and reliability monitoring reduces the impact of the monitors on hardware cost. Using micro-instruction routines within the machine instructions, allows us to share most of the monitoring hardware. Therefore, our technique requires little hardware overhead in comparison to having additional hardware blocks outside the processor. This reduction in overhead is due to maximal sharing of hardware resources of the processor. Our framework is superior to software-only techniques as the monitoring routines are formed with micro-instructions and therefore reduces code size and execution time overheads, since they occur in parallel with machine instructions. This dissertation makes four significant contributions to the field of security and reliability on embedded processor research and they are: (i) proposed a security and reliability framework for embedded processors that could be included into its design phase; (ii) shown that inline (machine instruction level) monitoring will detect common security attacks (four inline monitors against common attacks cost 9.21% area and 0.67% performance, as opposed to previous work where an external monitor with two monitoring modules costs 15% area overhead); (iii) illustrated that basic block check-summing for code integrity is much simpler and efficient than currently proposed integrity violation detectors which address code injection attacks (this costs 5.03% area increase and 3.67% performance penalty with a single level control flow checking, as opposed to previous work where the area overhead is 5.59%, which needed three control flow levels of integrity checking); and (iv) shown that hardware assisted control flow checking implemented during the design of a processor is much cheaper and effective than software only approaches (this approach costs 0.24-1.47% performance and 3.59% area overheads, as opposed to previous work that costs 53.5-99.5% performance).

<p>In the rapidly progressing evolution of technology, more and more emphasize is put on developing proper tools for the task of designing new and revolutionary systems. These tools are required in order to allow for a designer to fully utilize the power of new architectures and techniques. This thesis examines the current state of available scheduling tools for embedded systems, by evaluating and analyzing a number of di erent tools. An attempt is made to provide an overview of how the tools are constructed, and what types of methodology have been used.</p>

<p>Many efforts have been carried out to provide transmission reliability in the history of communication systems. As the demand for real-time applications increased, providing a reliable communication in a timely manner for such applications is strongly desired. Considering timing constraints makes the issue of achieving reliability more difficult. This thesis concentrates on providing reliability for real-time communication in embedded networks by achieving a timing analysis and using the ARQ concept. What is carried out in this thesis is providing retransmission in a real-time manner for embedded networks according to application request. The thesis work focuses on one packet retransmission over a point to point link, but the concept is rich and can be extended to cover application request in real-time embedded networks. Two methods have been fulfilled, and a simulation has been done on the timing analysis focusing on the performance in accepting real-time traffic in the form of separate channels for each application request. The protocol combines ARQ and a scheduling algorithm as a base to support retransmission for hard real-time applications in embedded networks.</p>

<p>In communication systems, the need for high bandwidth interconnects and</p><p>efficient distribution of large amount of data is very essential. This thesis work</p><p>addresses all-optical packet switching issues in the field of reconfigurable optical</p><p>interconnection networks for high performance embedded systems. The recent</p><p>research conducted at the Halmstad University, on high performance embedded</p><p>systems, focuses on the optical interconnection techniques to achieve ultra high</p><p>throughputs and reconfigurability at the system level.</p><p>Recent research in the field of optical interconnection networks for applications</p><p>like switches and routers for data and telecommunication industry and parallel</p><p>computing architectures for embedded signal processing use optical to electrical</p><p>conversion to switch packets. This conversion scales down the enormous bandwidth</p><p>capacity of the optical communication channels to electronic processing rates. To</p><p>maintain the high throughputs all over the interconnection networks, the optical</p><p>packets need to be maintained in optical state and switched to different part of the</p><p>interconnection network. To achieve this goal, all-optical packet switching</p><p>architectures are studied. The study is concluded with a positive outlook towards alloptical</p><p>switching technologies, and it will play a very important role in the near</p><p>future in the field of optical communication, telecommunication and embedded</p><p>systems.</p>

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