Learning to play the piano usually involves learning to read sheet music and many hours of prac- tice, which can be seen as a tough task for beginners. This project presents an innovative ap- proach to piano learning by integrating a Raspberry Pi, Arduino, and LED lights with a Casio CTK-550 keyboard. This system interprets MusicXML files and visually guides users by lighting up the keys they need to press in the correct order, providing a more intuitive and engaging learn- ing experience. Additionally, it has a playback mode that makes the piano play the chosen song while illuminating the keys played. This allows the user to hear the song being played correctly before using the interactive mode to play the entire song themselves. These modifications to the piano aim to simplify the learning process and ease in new piano players by removing the big initial barrier of understanding sheet music. The project practices sustainability by reusing components from old projects and also follows several UN Sustainable Development Goals. After a few iter- ations, there was a product able to fulfill the goals set in advance. Future improvements could include improved lighting precision, additional learning modes, and more user-friendly file transfer possibilities.

Side-Channel Analysis plays an important role in cryptology, as it represents an important class of attacks against cryptographic implementations, especially in the context of embedded systems such as hand-held mobile devices, smart cards, RFID tags, etc. These types of attacks bypass any intrinsic mathematical security of the cryptographic algorithm or protocol by exploiting observable side-effects of the execution of the cryptographic operation that may exhibit some relationship with the internal (secret) parameters in the device. Two of the main types of side-channel attacks are timing attacks or timing analysis, where the relationship between the execution time and secret parameters is exploited; and power analysis, which exploits the relationship between power consumption and the operations being executed by a processor as well as the data that these operations work with. For power analysis, two main types have been proposed: simple power analysis (SPA) which relies on direct observation on a single measurement, and differential power analysis (DPA), which uses multiple measurements combined with statistical processing to extract information from the small variations in power consumption correlated to the data. In this thesis, we propose several countermeasures to these types of attacks, with the main themes being timing analysis and SPA. In addition to these themes, one of our contributions expands upon the ideas behind SPA to present a constructive use of these techniques in the context of embedded systems debugging. In our first contribution, we present a countermeasure against timing attacks where an optimized form of idle-wait is proposed with the goal of making the observable decryption time constant for most operations while maintaining the overhead to a minimum. We show that not only we reduce the overhead in terms of execution speed, but also the computational cost of the countermeasure, which represents a considerable advantage in the context of devices relying on battery power, where reduced computations translates into lower power consumption and thus increased battery life. This is indeed one of the important themes for all of the contributions related to countermeasures to side- channel attacks. Our second and third contributions focus on power analysis; specifically, SPA. We address the issue of straightforward implementations of binary exponentiation algorithms (or scalar multiplication, in the context of elliptic curve cryptography) making a cryptographic system vulnerable to SPA. Solutions previously proposed introduce a considerable performance penalty. We propose a new method, namely Square-and-Buffered- Multiplications (SABM), that implements an SPA-resistant binary exponentiation exhibiting optimal execution time at the cost of a small amount of storage --- O(\sqrt(\ell)), where \ell is the bit length of the exponent. The technique is optimal in the sense that it adds SPA-resistance to an underlying binary exponentiation algorithm while introducing zero computational overhead. We then present several new SPA-resistant algorithms that result from a novel way of combining the SABM method with an alternative binary exponentiation algorithm where the exponent is split in two halves for simultaneous processing, showing that by combining the two techniques, we can make use of signed-digit representations of the exponent to further improve performance while maintaining SPA-resistance. We also discuss the possibility of our method being implemented in a way that a certain level of resistance against DPA may be obtained. In a related contribution, we extend these ideas used in SPA and propose a technique to non-intrusively monitor a device and trace program execution, with the intended application of assisting in the difficult task of debugging embedded systems at deployment or production stage, when standard debugging tools or auxiliary components to facilitate debugging are no longer enabled in the device. One of the important highlights of this contribution is the fact that the system works on a standard PC, capturing the power traces through the recording input of the sound card.

Side-Channel Analysis plays an important role in cryptology, as it represents an important class of attacks against cryptographic implementations, especially in the context of embedded systems such as hand-held mobile devices, smart cards, RFID tags, etc. These types of attacks bypass any intrinsic mathematical security of the cryptographic algorithm or protocol by exploiting observable side-effects of the execution of the cryptographic operation that may exhibit some relationship with the internal (secret) parameters in the device. Two of the main types of side-channel attacks are timing attacks or timing analysis, where the relationship between the execution time and secret parameters is exploited; and power analysis, which exploits the relationship between power consumption and the operations being executed by a processor as well as the data that these operations work with. For power analysis, two main types have been proposed: simple power analysis (SPA) which relies on direct observation on a single measurement, and differential power analysis (DPA), which uses multiple measurements combined with statistical processing to extract information from the small variations in power consumption correlated to the data. In this thesis, we propose several countermeasures to these types of attacks, with the main themes being timing analysis and SPA. In addition to these themes, one of our contributions expands upon the ideas behind SPA to present a constructive use of these techniques in the context of embedded systems debugging. In our first contribution, we present a countermeasure against timing attacks where an optimized form of idle-wait is proposed with the goal of making the observable decryption time constant for most operations while maintaining the overhead to a minimum. We show that not only we reduce the overhead in terms of execution speed, but also the computational cost of the countermeasure, which represents a considerable advantage in the context of devices relying on battery power, where reduced computations translates into lower power consumption and thus increased battery life. This is indeed one of the important themes for all of the contributions related to countermeasures to side- channel attacks. Our second and third contributions focus on power analysis; specifically, SPA. We address the issue of straightforward implementations of binary exponentiation algorithms (or scalar multiplication, in the context of elliptic curve cryptography) making a cryptographic system vulnerable to SPA. Solutions previously proposed introduce a considerable performance penalty. We propose a new method, namely Square-and-Buffered- Multiplications (SABM), that implements an SPA-resistant binary exponentiation exhibiting optimal execution time at the cost of a small amount of storage --- O(\sqrt(\ell)), where \ell is the bit length of the exponent. The technique is optimal in the sense that it adds SPA-resistance to an underlying binary exponentiation algorithm while introducing zero computational overhead. We then present several new SPA-resistant algorithms that result from a novel way of combining the SABM method with an alternative binary exponentiation algorithm where the exponent is split in two halves for simultaneous processing, showing that by combining the two techniques, we can make use of signed-digit representations of the exponent to further improve performance while maintaining SPA-resistance. We also discuss the possibility of our method being implemented in a way that a certain level of resistance against DPA may be obtained. In a related contribution, we extend these ideas used in SPA and propose a technique to non-intrusively monitor a device and trace program execution, with the intended application of assisting in the difficult task of debugging embedded systems at deployment or production stage, when standard debugging tools or auxiliary components to facilitate debugging are no longer enabled in the device. One of the important highlights of this contribution is the fact that the system works on a standard PC, capturing the power traces through the recording input of the sound card.

ITC/USA 2005 Conference Proceedings / The Forty-First Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2005 / Riviera Hotel & Convention Center, Las Vegas, Nevada / Designing and implementing an instrumentation cockpit display system presents many unique challenges. The system must be easy to use, yet highly customizable. Typically, these systems require an experienced programmer to create graphical display screens. Furthermore, most current display systems do not provide for bi-directional communication between the instrumentation system and the display system. This paper discusses an architecture that addresses these issues and other common problems with cockpit displays. This system captures data from the instrumentation system, displays parameters, and returns calculated parameters and status information regarding pilot actions to the instrumentation system. Unlike traditional systems, the configuration of the graphical presentation of the cockpit display can be done by a non-programmer. All communication between the instrumentation system and the cockpit display system is done transparently using XML. The usage of XML in this system facilitates real-time form previewing, cross-platform compatibility, and seamless transitions between project management, graphical configuration, and engineering unit conversions.

Students at Uppsala University have for some years been given the opportunity to take courses in subjects directly, or indirectly, related to the fields of signal processing and signal analysis. According to the directors of these courses, a considerable number of students are recurringly having difficulties grasping different concepts related to this field of study. This report covers a tool that easily allows teachers to visualize and listen to different manipulations of signals, which should help students get an intuitive understanding of the subject. Features of the system include multiple kinds of analog filters, sampling with variable settings and zero-order hold reconstruction. The finished system is flexible, tunable and modifiable to the teachers every need, making it usable for a wide variety of courses involving signal processing. The system meets its requirements even though individual components’ results de- viate slightly from ideal values. / Studenter vid Uppsala Universitet har, under ett antal år, givits möjligheten att läsa kurser inom ämnen direkt, eller indirekt, relaterade till signalbehandling/signalanalys. Enligt kursansvariga för dessa kurser har en ansenlig andel av studenterna svårigheter med att förstå en del av de begrepp och fenomen som förekommer under kurserna. Denna rapport behandlar ett verktyg som ger lärare i dessa kurser möjlighet att på ett enkelt sätt visualisera och lyssna på olika manipulationer av signaler, vilket bör hjälpa studenterna bygga en intuition för ämnet. Systemets olika funktioner inkluderar flera olika typer av analoga filter, sampling med olika inställningar, och så kallad ’Zero-Order-Hold’ rekonstruktion. Det resulterande systemet är flexibelt, inställbart och modifierbart till användarens behov, vilket gör det applicerbart i flera kurser som innefattar signalbehandling/analys. Systemet möter kraven som ställs, även fast resultaten hos individuella komponenter avviker aningen från ideala värden.

Despite the progress made in developing more advanced compilers for embedded systems, programming of embedded high-performance computing systems based on Digital Signal Processors (DSPs) is still a highly skilled manual task. This is true for single-processor systems, and even more for embedded systems based on multiple DSPs. Compilers often fail to optimise existing DSP codes written in C due to the employed programming style. Parallelisation is hampered by the complex multiple address space memory architecture, which can be found in most commercial multi-DSP configurations. This thesis develops an integrated optimisation and parallelisation strategy that can deal with low-level C codes and produces optimised parallel code for a homogeneous multi-DSP architecture with distributed physical memory and multiple logical address spaces. In a first step, low-level programming idioms are identified and recovered. This enables the application of high-level code and data transformations well-known in the field of scientific computing. Iterative feedback-driven search for “good” transformation sequences is being investigated. A novel approach to parallelisation based on a unified data and loop transformation framework is presented and evaluated. Performance optimisation is achieved through exploitation of data locality on the one hand, and utilisation of DSP-specific architectural features such as Direct Memory Access (DMA) transfers on the other hand. The proposed methodology is evaluated against two benchmark suites (DSPstone & UTDSP) and four different high-performance DSPs, one of which is part of a commercial four processor multi-DSP board also used for evaluation. Experiments confirm the effectiveness of the program recovery techniques as enablers of high-level transformations and automatic parallelisation. Source-to-source transformations of DSP codes yield an average speedup of 2.21 across four different DSP architectures. The parallelisation scheme is – in conjunction with a set of locality optimisations – able to produce linear and even super-linear speedups on a number of relevant DSP kernels and applications.

As modern embedded systems are becoming more sophisticated the demands on their applications significantly increase. A current trend is to utilize the advances of heterogeneous platforms (i.e. platform consisting of different computational units (e.g. CPU, FPGA or GPU)) where different parts of the application can be distributed among the different computational units as software and hardware implementations. This technology can improve the application characteristics to meet requirements (e.g. execution time, power consumption and design cost), but it leads to a new challenge in finding the best combination of hardware and software implementation (referred as system configuration). The decisions whether a part of the application should be implemented in software (e.g. as C code) or hardware (e.g. as VHDL code) affect the entire product life-cycle. This is traditionally done manually by the developers in the early stage of the design phase. However, due to the increasing complexity of the application the need of a systematic process that aids the developer when making these decisions to meet the demands rises. Prior to this work a methodology called MULTIPAR has been designed to address this problem. MULTIPAR applies component-/model-based techniques to design the application, i.e. the application is modeled as a number of interconnected components, where some of the components will be implemented as software and the remaining ones as hardware. To perform the partitioning decisions, i.e. determining for each component whether it should be implemented as software or hardware, MULTIPAR proposes a set of formulas to calculate the properties of the entire system based on the properties for each component working in isolation. This thesis aims to show to what extent the proposed system formulas are valid. In particular it focuses on validating the formulas that calculate the system response time, system power consumption, system static memory and system FPGA area. The formulas were validated trough an industrial case study, where the system properties for different system configurations were measured and calculated by applying these formulas. The measured values and calculated values for the system properties were compared by conducting a statistical analysis. The case study demonstrated that the system properties can be accurately calculated by applying the system formulas.

Radar system development is generally costly, complicated and time consuming. This has kept its presence mostly inside industries and research centers with the necessary equipment to produce and operate such a system. Until recent years, realization of a fully integrated radar system on a chip was not feasible, however this is no longer the case and there are several types of sensors available from different manufacturers. Radar sensors offer some advantages that are unmatched by other sensing and imaging technologies such as operation in fog, dust and over long distances. This makes them suitable for use in Navigation, Automation, Robotics, and Security systems applications. The purpose of this thesis is to demonstrate the feasibility of a simplified radar system’s user interface via integration with the most common portable computer, a Smartphone, to make it possible for users with minimal knowledge of radar systems design and operation to use it in different applications. Smartphones are very powerful portable computers equipped with a suite of sensors with the potential to be used in a wide variety of applications. It seems logical to take advantage of their computing power and portability. The combination of a radar sensor and a smartphone can act as a demonstrator in an effort to bring radar sensors one step closer to the hands of the developers and consumers. In this study the following areas are explored and proper solutions are implemented; Design of a control board with capability to drive a radar sensor, capture the signal and transfer it to a secondary device (PC or Smartphone) both wired and wirelessly e.g. Bluetooth. A firmware that is capable of driving the control board and can receive, interpret and execute messages from a PC and or a Smartphone A cross compatible master software that can run on Linux, Windows, Mac and Android OSs and is capable of communication with the firmware/control board Proper analysis methods for signal capture and process purposes Automation of some parameter adjustment for different modes of operation of the Radar System in order to make the user interface as simple as possible A user friendly user-interface and API that can run on both PC and Smartphone

Användningen av Linux i inbyggda system fortsätter att öka för varje år. Öppen källkod och nya verktyg för utvecklandet av Linux för inbyggda system har inte bara gjort Linux till ett kostnadseffektivt val, utan även ett tidseffektivt val. Målet med den här undersökningen har varit att åt LVI undersöka en möjlig migration av operativsystem i deras inbäddade system från Windows XP Embedded till ett inbyggt Linuxbaserat operativsystem för ARM-processorer med stöd för OCR-behandling. Linux och öppen källkod till inbyggda system för med sig en hel del fördelar. Några av dessa inkluderar låg kostnad, full kontroll över ditt inbyggda system samt möjligheten att testa och utvärdera mjukvara helt gratis. För att komma fram till ett resultat har vi undersökt vilka alternativ som finns och om det finns stöd för de funktioner som LVI använder sig av. Resultatet av den här undersökningen är en redovisning av de val man står inför och vad som kan lämpa sig bäst för LVI. Vi har främst undersökt Yocto Project och Buildroot i denna undersökning och anser att Yocto Project är ett bra val för LVI. Två enklare applikationer har även skrivits där bildhantering och maskinläsning uppvisas. Applikationerna har utvecklats i C++ med hjälp av OpenCV och Tesseract-ocr.

This work outlines a design for a small form-factor flight control system designed to fly in a wide variety of airframes. The system was designed with future expansion in mind while providing a complete, all-in-one solution to meet present needs. This system as presented meets most needs while remaining relatively low cost. It has a completely integrated IMU solution as well as on- board GPS. It is capable of basic waypoint navigation. This solution was testing using software and hardware-in-the-loop simulation which proved its functionality.