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The in-circuit emulator (ICE) is commonly adopted as a microprocessor debugging technique which features many advantages, such as low demand for hardware and repeatable use of the pins on the JTAG port. The development of system-on-chip technology has matured significantly in recent years. The microprocessors in system-on-chip designs have been applied in a variety of ways, and different microprocessors are being used in the embedded system. The traditional modus operandi of debug control, in which an ad hoc hardware/software package is required for each microprocessor, is not economical as far as programming and designing are concerned. Thus it is advisable to design a more flexible debug control hardware/software package which can fit into different embedded microprocessors with in-circuit emulators. This thesis reviews several types of embedded in-circuit emulator structure and comes up with a parameterized, modularized hardware/software package for controlling in-circuit emulators. An initial analysis of microprocessor systems and embedded debug circuits helps us to elicit reusable parameters so that we can achieve our desired debug control by simply adjusting parameters when we work on different microprocessor architectures and embedded debug circuits. An ensuing examination of the reusability and functionality of our designed debug control hardware/software enables us to group all the functions of our hardware/software package into different functional modules so that we can simply replace relevant functional modules on different microprocessor architectures and embedded debug circuits. The parameterized design allows us to use a single debug control software program on different microprocessor systems with the slightest change of parameter setting. The modularized model has the merit of minimizing our effort of debug control through module replacement when we need to adapt our software to a new environment (as when we want to use it on a different operating system or when we want to apply it to a different communication interface).

An in-circuit emulator (ICE) is an important tool for the development of microprocessor-based systems. External ICE boxes are complex and expensive piece of hardware so their use is usually limited to debugging phases of the microprocessor-based systems that involve hardware/software integration or investigation of real time I/O or bus events. On the other hand, a ROM monitor is inexpensive, but provides less observablity for the microprocessor¡¦s operations. In either case, the design practice of the ICE devices is usually independent to the design task of the microprocessor itself. The performance and cost of the ICE devices are not relevant to the microprocessors since they are two different entities. The ICE¡¦s are used only during the development/debugging of the microprocessor-based systems by substituting the original microprocessor on the socket with the ICE. The ICE is unplugged after debugging and the original microprocessor is placed back into the socket for normal operations of the microprocessor-based systems. Therefore, the performance and cost of the ICE¡¦s do not impact these of the microprocessor-based systems because the ICE¡¦s do not exist in them. We then define three feasible solutions software, hardware and hybrid) and integrate them with a synthesizable ARM7 icroprocessor core. The microprocessors with the embedded ICE¡¦s are synthesized and simulated to analyze and compare the corresponding hardware/software performance and cost and the debugging features of these approaches.

Zugl.: Aachen, Techn. Hochsch., Diss., 2010

<p>During the last few years, Ericsson has developed an emulator for the telephone system called CPP (Connectivity Packet Platform) with TietoEnator as a subcontractor. The emulator is called CPPemu and emulates the hardware used in the network nodes in CPP. This means that the same software that may be run on a node in a CPP network may be run on the emulated hardware in the emulator. TietoEnator would like to examine whether the emulator may be used for testing software instead of running tests using physical hardware. For this experiment, a particular event will be tested in the CPP emulator.</p><p>A fail-over procedure, which works in a physical CPP node, will be verified to work in the CPP emulator. A fail-over may be defined as</p><p>The failure and automatic replacement of part of a system such that the user does not notice the failure and is not affected by it. The part which has failed is replaced by a backup part.</p><p>This experiment consisted of three majors steps, namely (i) configuring the emulator, (ii) creating a network by setting up a redundant network (one main link and one backup link) between two emulated nodes and finally (iii) testing the fail-over procedure. The fail-over was tested by generating and sending traffic through the network, triggering the fail-over by ejecting the board which is currently sending and receiving traffic and inspecting the log files to evaluate if the fail-over works as intended. The results of the experiment indicated that the system performed as expected.</p>

In this thesis, the first section will talk about how to implement the software development environment for 8bit microprocessor, including Compiler, Assembler, and Debugging mechanism etc. The design of Debugging mechanism is based on in-circuit emulator. In-circuit emulator is a common debugging technique for microprocessor. The designed ICE contains hardware implement and debugging software for it in this thesis. ICE hardware is a control circuit from TAP Controller, IEEE 1149.1 std. and it control the scan cells on the data bus. The Debugging software uses JTAG port, IEEE 1149.1 std., to insert debug instruction from PC to ICE hardware. In this thesis, the second section will focus on the process of integrating ICE hardware circuit and software debugger issued by two ways, our own design version and business suit debugging software support. The examples are not only integrating our LAB¡¦s 32bit microprocessor and ICE hardware, but also verifying software debugger to control ICE circuit by FPGA to prove above two methods are work.

Developing 3D application for low-performance embedded system often contains some limitations as hardware specifications (e.g. memory and processing efficiency). Existing OpenGL ES emulators are designed to provide the development environment for programmers, but these emulators often are lack of cross-platform performance tuning analysis for embedded systems and are only suitable for a designated hardware. In this thesis, we present an OpenGL ES emulator with performance tuning for developing 3D application of embedded systems without conforming to a specific hardware. It can further help programmers to emulate 3D application on PC for different development platforms.

Auch eingefleischte LINUX-Nutzer bekommen mal eine eMail mit Wordanhang oder eine Coreldrawgrafik. Um Dokumente dieser Art anschauen zu können bleibt oft kein anderer Ausweg, als Windows zu booten. VMware bietet eine elegante Möglichkeit, mehrere Betriebssysteme auf einer Maschine gleichzeitig nutzen zu können. Natürlich sind dem Einsatz von VMware kaum Grenzen gesetzt.

During the last few years, Ericsson has developed an emulator for the telephone system called CPP (Connectivity Packet Platform) with TietoEnator as a subcontractor. The emulator is called CPPemu and emulates the hardware used in the network nodes in CPP. This means that the same software that may be run on a node in a CPP network may be run on the emulated hardware in the emulator. TietoEnator would like to examine whether the emulator may be used for testing software instead of running tests using physical hardware. For this experiment, a particular event will be tested in the CPP emulator. A fail-over procedure, which works in a physical CPP node, will be verified to work in the CPP emulator. A fail-over may be defined as The failure and automatic replacement of part of a system such that the user does not notice the failure and is not affected by it. The part which has failed is replaced by a backup part. This experiment consisted of three majors steps, namely (i) configuring the emulator, (ii) creating a network by setting up a redundant network (one main link and one backup link) between two emulated nodes and finally (iii) testing the fail-over procedure. The fail-over was tested by generating and sending traffic through the network, triggering the fail-over by ejecting the board which is currently sending and receiving traffic and inspecting the log files to evaluate if the fail-over works as intended. The results of the experiment indicated that the system performed as expected.

No description available.