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Energy and performance improvements of continuous-time analog-based computation for selected applications offer an avenue to continue improving the computational ability of tomorrow*s electronic devices at current technology scaling limits. However, analog computation is plagued by the difficulty of designing complex computational circuits, programmability, as well as the inherent lack of accuracy and precision when compared to digital implementations. In this thesis, evolutionary algorithm-based techniques are utilized within a reconfigurable analog fabric to realize an automated method of designing analog-based computational circuits while adapting the functional range to improve performance. A Self-Scaling Genetic Algorithm is proposed to adapt solutions to computationally-tractable ranges in hardware-constrained analog reconfigurable fabrics. It operates by utilizing a Particle Swarm Optimization (PSO) algorithm that operates synergistically with a Genetic Algorithm (GA) to adaptively scale and translate the functional range of computational circuits composed of high-level or low-level Computational Analog Elements to improve performance and realize functionality otherwise unobtainable on the intrinsic platform. The technique is demonstrated by evolving square, square-root, cube, and cube-root analog computational circuits on the Cypress PSoC-5LP System-on-Chip. Results indicate that the Self-Scaling Genetic Algorithm improves our error metric on average 7.18-fold, up to 12.92-fold for computational circuits that produce outputs beyond device range. Results were also favorable compared to previous works, which utilized extrinsic evolution of circuits with much greater complexity than was possible on the PSoC-5LP.

Recent developments in the area of Cyber-Physical Production Systems prove that high technology readiness level is already achieved and industrialization of such technologies is not far from today. Although these technologies seem to be convenient in providing solutions to environmental uncertainties, their application provides adaptability only at shop floor level. Needless to say, an enterprise cannot reach true adaptability without ensuring adaptation skills at every level in its hierarchy. Commonly used production planning and control approaches in industry today inherit from planning solutions which are developed in response to historical market characteristics. However, market tendency in recent years is towards making personalized products a norm. The emerging complexity out of this trend obliges planning systems to a transition from non-recurring, static planning into continuous re-planning and re-configuration of systems. Therefore, there is a need of responsive planning solutions which are integrated to highly adaptable production system characteristics. In this dissertation, Demand Responsive Planning, DRP, is presented which is a planning framework aiming to respond to planning needs of shifting trends in both production system technologies and market conditions. The DRP is based on three main constructs such as dynamicity, responsiveness and use of precise data. These features set up the foundation of accomplishing a high degree of adaptability in planning activities. By this means, problems from an extensive scope can be handled with a responsive behavior (i.e. frequent re-planning) by the use of precise data. The use of precise data implies to execute planning activities subject to actual demand information and real-time shop floor data. Within the context of the DRP, both a continuous workload control method and a dynamic capacity adjustment approach are developed. A test-bed is coded in order to simulate proposed method based on a system emulation reflecting the characteristics of cyber-physical production systems at shop floor level. Continuous Precise Workload Control, CPWLC, method is a novel approach aiming at precise control of workload levels with the use of direct load graphs. Supported by a multi-agent platform, it generates dynamic non-periodic release decisions exploiting real time shop floor information. As a result, improved shop floor performances are achieved through controlling workload levels precisely by the release of appropriate job types at the right time. Presented dynamic capacity adjustment approach utilizes rapid re-configuration capability of cyber-physical systems in achieving more frequent capacity adjustments. Its implementation architecture is integrated to the CPWLC structure. By this means, a holistic approach is realized whereby improved due date performance is accomplished with minimized shop floor congestion. Hence, sensitivity to changing demand patterns and urgent job completions is improved. / <p>QC 20150907</p>

There is a strong connection between a product’s architecture and the ease with which it can be evolved into future generations of products. The main goal of this dissertation is to create a measurement tool that can assess the extent to which a design exhibits different characteristics of being flexible for future evolution. The High Definition Design Structure Matrix (HDDSM) is presented as a product representation model that captures the specific types of interactions between components of a product. An interaction basis is defined that extends the detailed flows of signal, material, and energy used in functional modeling to include detailed spatial interactions. By including an external element to represent all interactions that cross outside of the product boundary, the HDDSM is shown to be a modular product model. A process for reverse engineering products and creating a HDDSM is presented and shown to significantly reduce the effort required to create a HDDSM model. The repeatability of the HDDSM model is evaluated by calculating the interrater agreement between models created by independent examiners. Four analysis processes are presented to analyze the HDDSM model for characteristics of evolvable design. These characteristics are taken from design guidelines for product flexibility for future evolution. The analyses produce quantitative metrics that allow an examiner to measure and compare how well a particular characteristic of evolvable design has been incorporated based only on the component interactions recorded in the HDDSM. Three of the metrics, the Space Potential Ratio, the Framework metric, and the Energy-Flow Module metric are shown to be consistent with a product’s flexibility for future evolution as measured by a Change Modes and Effects Analysis. / text

Manufacturing companies are nowadays facing an unprecedented series of challenges to their survival: global competition and product mass-customization are the shaping forces of tomorrow’s business success. The consequent need for agile and sustainable production solutions is the utmost motivation behind the development of innovative approaches which often are not in line with the state of art. It is well documented that companies fail in recognizing how such disruptively innovative approaches can yield an interesting economic output. This, in turn, enhances the risk of leaving the aforementioned promising technologies conceptually and practically underdeveloped.  In the field of automatic production systems the Evolvable Production System paradigm proposes modular architectures with distributed, autonomous control rather than integral design and hierarchical, centralized control. EPS technology is thus disruptive: it refuses the present paradigm of Engineer to Order in industrial automation by proposing an advanced Configure to Order system development logic. This dissertation investigates the possibility of using the recent sophisticated developments of the concept of Business Model as a holistic analytical tool for the characterization and solution of the issue of bringing disruptive and non-fully mature innovation to proficient application in production environments. In order to purse this objective the main contributions in the relevant literature have been extracted and combined to an original definition of business model able to encompass the aspects deemed critical for the problem. Such a construct is composed of three elements: (1) Value Proposition that describe the features of a technology that generates value for a given customer, (2) the Value Configuration and the (3) Architecture of the Revenue which describe the mechanisms that allows to create and capture such value respectively.    The subsequent work has focused on the EPS paradigm as a specific case of the overall problem. The first step has been a full characterization of the related value proposition through an innovative approach based on a bottom-up decomposition in its elementary components, followed by their aggregation into meaningful value offerings: with reference to the EPS paradigm such an approach has disclosed an overall value proposition composed of six potentially independent value offerings. This collection of Value Offerings has then been used as a basis to generate the EPS business models. In particular for each single offering a possible set of necessary activities and resources has been devised and organized in a coherent value configuration. The resulting creation mechanisms have then been linked among each other following a logical supplier-customer scheme for capturing the value: this allowed establishing the architecture of revenue, last element of the overall production paradigm. Finally the results have been validated in a semi-industrial system developed for the (IDEAS, 2010-2013) project through the individuation of the areas of application of such business models. / <p>QC 20121120</p> / FP7-IDEAS- Instantly Deployable Evolvable Assembly System / FP6- EUPASS-Evolvable Ultra-Precision Assembly Systems / XPRES- Initiative for excellence in production research

Evolvable hardware (EHW) uses simulated evolution to generate an electronic circuit with specific characteristics, and is generally implemented on Field Programmable Gate Arrays (FPGAs). EHW has proven to be successful at producing small novel circuits for applications such as robot control and image processing, however, traditional approaches, in which the FPGA configuration is directly encoded on the chromosome, have not scaled well with increases in problem and FPGA architecture complexity. One of the methods proposed to overcome this is the incorporation of a growth process, known as morphogenesis, into the evolutionary process. However, existing approaches have tended to abstract away the underlying architectural details, either to present a simpler virtual FPGA architecture, or a biochemical model that hides the relationship between the cellular state and the underlying hardware. By abstracting away the underlying architectural details, EHW has moved away from one of its key strengths, that being to allow evolution to discover novel solutions free of designer bias. Also, by separating the biological model from the target FPGA architecture, too many assumptions and arbitrary decisions need to be made, which are liable to lead to the growth process failing to produce the desired results. In this thesis a new approach to applying morphogenesis to gate-level FPGA- based EHW is presented, whereby circuit growth is closely tied to the underlying gate-level architecture, with circuit growth being driven largely by the state of gate-level resources of the FPGA. An investigation into the applicability of biological processes, structures and mechanisms to morphogenetic EHW (MGEHW) is conducted, and the resulting design elaborated. The developed MGEHW system is applied to solving a signal routing problem with irregular and severe constraints on routing resources. It is shown that the morphogenetic approach outperforms a traditional EHW approach using a direct encoding, and importantly, is able to scale to larger, more complex, signal routing problems without any significant increase in the number of generations required to find an optimal solution. With the success of the MGEHW system in solving primarily structural prob- lems, it is then applied to solving a combinatorial function problem, specifically a one-bit full adder, with a more complete set of FPGA resources. The results of these experiments, together with the previous experiments, has provided valuable information that when analysed has enabled the identification of the critical factors that determine the likelihood of an EHW problem being solvable. In particular this has highlighted the importance of effective fitness feedback for guiding evolution towards its desired goal. Results indicate that the gate-level morphogenetic approach is promising. The research presented here is far from complete; many avenues for future research have opened. The MGEHW system that has been developed allows further research in this area to be explored experimentally. Some of the most fruitful directions for future research are described.

Increasing global competition, market uncertainties and high product variance are a few of the factors posing challenges to the existing manufacturing industry. Having a quick response to market fluctuations and adapting to changing customer demands while maintaining shorter lead times and low costs are a few of the major challenges. The main focus of this thesis is on Evolvable Production Systems, which is one of the promising solutions to deal with the emerging manufacturing challenges by changing the conventional manufacturing systems towards a more flexible, intelligent and adaptable approach. Although promising, further research is needed in several directions for a wider industrial acceptance of EPS. The directions include but are not limited to methodological aspects, tool support, etc. throughout the development lifecycle. This thesis aims to provide a basis for a holistic model-based development methodology for evolvable production systems. One of the main contributionsof this work is the identification of major architectural elements (i.e stakeholders,concerns, viewpoints and views) and their dependencies on each other.This work shall serve as a basis for establishing a well-defined architectural framework for EPS. The second important contribution of this thesis is the development of a domain specific modeling language (EPS- DSL) based on the existing EPS ontology. The DSM platform does not only store the domain knowledge in the form of models but also provides support for the re-use of these models, i.e. enables utilization of the domain ontology during system development. Moreover, the automatic code generation support for the module library presented in this work, significantly reduces the risks of information discrepancies when transferring data from one abstraction level to another. The existing EPS ontology is also evaluated from a holistic perspective and resulted in contributing a few improvement suggestions for achieving a seamless model-based development approach. Evaluation of Simulink/SimEvents as a modeling and simulation tool for EPS is the third main contribution of this thesis. One of the main advantages of evaluating this tool for EPS is the opportunity to analyze the complete system behavior on a single modeling platform. The integration of agent-based system behavior (discrete event) with dynamic system behavior (continuous &amp; discrete time) provides a holistic modeling approach and implies less information inconsistencies. / <p>QC 20160429</p>

Many digital logic applications can take advantage of the reconfiguration capability of Field Programmable Gate Arrays (FPGAs) to dynamically patch design flaws, recover from faults, or time-multiplex between functions. Partial reconfiguration is the process by which a user modifies one or more modules residing on the FPGA device independently of the others. Partial Reconfiguration reduces the granularity of reconfiguration to be a set of columns or rectangular region of the device. Decreasing the granularity of reconfiguration results in reduced configuration filesizes and, thus, reduced configuration times. When compared to one bitstream of a non-partial reconfiguration implementation, smaller modules resulting in smaller bitstream filesizes allow an FPGA to implement many more hardware configurations with greater speed under similar storage requirements. To realize the benefits of partial reconfiguration in a wider range of applications, this thesis begins with a survey of FPGA fault-handling methods, which are compared using performance-based metrics. Performance analysis of the Genetic Algorithm (GA) Offline Recovery method is investigated and candidate solutions provided by the GA are partitioned by age to improve its efficiency. Parameters of this aging technique are optimized to increase the occurrence rate of complete repairs. Continuing the discussion of partial reconfiguration, the thesis develops a case-study application that implements one partial reconfiguration module to demonstrate the functionality and benefits of time multiplexing and reveal the improved efficiencies of the latest large-capacity FPGA architectures. The number of active partial reconfiguration modules implemented on a single FPGA device is increased from one to eight to implement a dynamic video-processing architecture for Discrete Cosine Transform and Motion Estimation functions to demonstrate a 55-fold reduction in bitstream storage requirements thus improving partial reconfiguration capability.

A sustainable Evolvable Hardware (EH) system is developed for SRAM-based reconfigurable Field Programmable Gate Arrays (FPGAs) using outlier detection and group testing-based assessment principles. The fault diagnosis methods presented herein leverage throughput-driven, relative fitness assessment to maintain resource viability autonomously. Group testing-based techniques are developed for adaptive input-driven fault isolation in FPGAs, without the need for exhaustive testing or coding-based evaluation. The techniques maintain the device operational, and when possible generate validated outputs throughout the repair process. Adaptive fault isolation methods based on discrepancy-enabled pair-wise comparisons are developed. By observing the discrepancy characteristics of multiple Concurrent Error Detection (CED) configurations, a method for robust detection of faults is developed based on pairwise parallel evaluation using Discrepancy Mirror logic. The results from the analytical FPGA model are demonstrated via a self-healing, self-organizing evolvable hardware system. Reconfigurability of the SRAM-based FPGA is leveraged to identify logic resource faults which are successively excluded by group testing using alternate device configurations. This simplifies the system architect's role to definition of functionality using a high-level Hardware Description Language (HDL) and system-level performance versus availability operating point. System availability, throughput, and mean time to isolate faults are monitored and maintained using an Observer-Controller model. Results are demonstrated using a Data Encryption Standard (DES) core that occupies approximately 305 FPGA slices on a Xilinx Virtex-II Pro FPGA. With a single simulated stuck-at-fault, the system identifies a completely validated replacement configuration within three to five positive tests. The approach demonstrates a readily-implemented yet robust organic hardware application framework featuring a high degree of autonomous self-control.

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