This thesis discusses design of narrowband low noise amplifiers for multi¬standard applications. The target of this work is to design a low noise ampli¬fier(LNA) for DCS1800 and Bluetooth standard frequency bands. Various designs for narrowband multi-standard LNAs have been studied and a new design for tunable multi-standard LNA has been presented and designed using accumulation mode MOS varactors. As this design includes on-chip spiral inductors, the design, modelling and layout of on-chip inductors have been discussed briefly. The tool used for this purpose is ASITIC. Also ESD protection techniques for RF circuits and their effect on LNA per¬formance has been discussed. Finally fully differential LNA has been designed in O.35um AMS thick metal CMOS process using Cadence SpectreRF. The design also includes ESD pro¬tection at the input of LNA.

<p>On this thesis project, the LMS algorithm has been applied for speech noise filteringand different behaviors were tested under different circumstances by using Matlabsimulations and the LPC2378 ARM Processor, which does the task of filtering in realtime. The thesis project is divided into two parts: the theoretical and practical part.</p><p>In the theoretical part there is a brief description of the different aspects of signalprocessing systems, filter theory, and a general description of the Least-Mean-SquareAdaptive Filter Algorithm.</p><p>In the practical part of the report a general description of the procedure will besummarized, the results of the tests that were conducted will be analyzed, a generaldiscussion of the problems that were encounter during the simulations will be mention,and suggestion for the problems will be given.</p>

<p>This thesis discuss on new technique called space time block coding (especially Alamouti's code) which is used to increase capacity and reliability of data transmission over time varying multi-path fading channel. The over all work of the thesis included in the following four chapters.</p><p>In chapter-1 we are going to cover some theoretical part which is useful to understand thesis work and in chapter-2 we will discuss the comparison between simple space time block code (Alamouti's code) and MRRC (Maximum Ratio Receiver Combining) which is receiver diversity and then in chapter-3 we will see the channel capacity & probability error performance for 2x2 Alamouti code over Rayleigh and Rice fading channel .Finally the conclusion and further work included in chapter-4.</p>

In future cellular radio networks Radio over Fiber (RoF) is a very attractive technology to deliver microwave and millimeter-wave signals containing broad band multimedia services to numerous base stations of the network. The radio signals are placed on an optical carrier and distributed by means of an optical fiber network to the base stations (BS). In the BS the optical signals heterodyne in a photodiode to produce the radio signals which are then sent via a wireless link to the mobile units (MU). The optical fiber network provides high frequency, wideband, low loss and a means of signal distribution immune to electromagnetic interference. In this thesis, different methods of electrooptical upconversion were investigated. The generation of an optical double-sideband with suppressed carrier (DSB-SC) signal is a straightforward method due to the fact that only one optical modulator driven at half the millimeter-wave frequency is required. One or both sidebands were ASK-modulated with baseband data rates of up to 10 Gbps. Optical single sideband modulation proves to be dispersion resilient as error free transmission was demonstrated after 53 km of single mode fiber transmission for data rates up to 10 Gbps. Wireless links up to 7 m were also demonstrated, proving the feasibility of this approach for broadband wireless inhouse access systems. / Für zukünftige zellulare Funknetze ist „Radio over Fiber (RoF)“ eine sehr attraktive Technologie, um breitbandige Multimedia-Dienste mit Mikro- und Millimeterwellen zu übertragen. Die Funksignale werden dabei auf eine optische Trägerwelle aufmoduliert und mittels eines optischen Fasernetzes zu den Basisstationen (BS) verteilt. In den BS erfolgt die Überlagung der optischen Signale durch eine Fotodiode, um die Funksignale zu erzeugen. Diese werden dann über eine drahtlose Verbindung zu den beweglichen Multimedia-Endgeräten geschickt. Vorteile des optischen Fasernetzes sind Breitbandigkeit, geringe Dämpfung und eine gegenüber elektromagnetischen Störungen immune Signalverteilung. In dieser Arbeit werden verschiedene Methoden der elektrooptischen Aufwärtskonversion erforscht und die wichtigsten Eigenschaften dieser untersucht. Die Erzeugung eines optischen Zweiseitenbandsignales mit unterdrücktem Träger (DSB-SC) ist eine einfache Methode, da nur ein optischer Modulator, betrieben mit der halben elektrischen Trägerfrequenz, benötigt wird. Eine oder beide Seitenbänder konnten mit Bitraten bis zu 10 Gbps amplitudenmoduliert werden. Optische Einseitenbandmodulation ist extrem tolerant bezüglich der chromatischen Dispersion der Faser, wie die fehlerfreie Übertragung nach 53 km Glasfaser beweist. Drahtlose Links bis zu 7 m wurden realisiert und zeigen die Möglichkeit dieser Verfahren für breitbandige drahtlose Inhouse-Zugangssysteme.

When the Swedish electricity market was re-regulated in 1996 the trading with electricity was exposed to competition and the net service henceforth should be comprised by a monopoly comprised by a regulation. The regulation was based on a review of the costs of the network companies. No attention were paid to if the network was efficient. The following years many of the networks were sold from the municipalities to power companies, to increasing merger prices. The increasing prices in the mergers were followed by increasing prices to the subscribers of the network services. The regulator tried to stop the fast increasing prices, but didn’t succeed. The regulation paradigm couldn’t face the new realities and had to be revised. In 1998 the author of this thesis was commissioned by the Swedish Regulator to propose a new regulation model for the Swedish grid companies. Existing models were reviewed but none of them fulfilled the requirements from the regulator; to be self-regulating and give incentives to improved efficiency and distribution reliability. Therefore a new approach was launched. The new approach was to change perspective from a company focus to a consumer focus – a performance-based regulation. The solution was to base the regulation of the creation of a standard asset, a Reference Network. From this a new model – the Network Performance Assessment Model (NPAM) – was defined. The Reference Network is defined by four definitions, concerning the elements and topology of a Reference Network, the Subscriber Requirements and the Objective Prerequisites. These definitions grants the transparency of the model. The model is sharp and is run into operation in 2004. The final test of the model indicated that the Swedish network companies are overcharging their subscribers with approximately 20%. This thesis is an explanation of the model and the definitions, and a review of the thoughts and research which formed the model. Moreover there is a discussion of some topics reported by others in articles about the model. Finally in the conclusion there are topics of simplicity and transparency. / QC 20101208

<p>This thesis presents a study of the effects of inter-bar currents on inductionmotor starting performance and stray-load losses. The work is focused on theperformance differences between aluminium and copper casted rotors.A method to predict the stator current when starting direct-on-line isdeveloped. This includes modelling of skin-effect, saturation of the leakageflux paths and additional iron losses. The results are verified by measurements.An analytical model accounting for inter-bar currents is derived, andthe dependency of the harmonic rotor currents on the inter-bar resistivity isinvestigated. It is found that the inter-bar currents can have considerableeffect on motor starting performance and stray-load losses, the amount beingstrongly dependent on the harmonic content of the primary MMF.Based on measurements of inter-bar resistivity, the starting performanceof an aluminium and a copper casted rotor is simulated. The results indicatea higher pull-out torque of the aluminium rotor than for the equivalent copperrotor. This is rather due to an increase of the fundamental starting torque ofthe aluminium rotor, than due to braking torques from the space harmonicsin the copper rotor. The results are verified by measurements. It is foundthat the difference between the pull-out torques is even larger than calculatedfrom the model. Thereby, it can be concluded that the inter-bar currents havea considerable effect on motor starting performance.At rated speed the braking torques are larger in the aluminium rotor thanin the copper rotor. This is seen as increased harmonic joule losses in the rotorcage. Simulations have shown, that these losses can be as large as 1% ofthe output power for the studied machine.</p> / QC20100617

<p>Rapid development in CMOS technology has resulted in its suitability for the implementation of readout front-end systems in terms of high integration density, and low power consumption yet at the same time posing many challenges for analog circuits design like readout front-end. One of the significant challenges is the low noise design for high speed front-end systems, while at the same time minimizing the power consumption as much as possible.</p><p>A high speed, low noise, low power, and programmable readout front-end system is designed and implemented for an X-ray detector in CMOS 0.18 m technology in this thesis work. The front-end system has a peaking time of 10 ns, which is the highest speed ever reported in the published work. The front-end system is designed to achieve low noise in terms of ENC, and a low power consumption of 2.9 mW. The detector capacitance is the most dominating parameter to low noise, which in turn is directly related to the power consumption. In this thesis work an ENC of 435 electrons is achieved for a detector capacitance of 5 pF and an ENC of 320 electrons for a detector capacitance of 3 pF. Based on the comparison to related published work, a performance improvement of at least two times is achieved taking peaking time, power, ENC, and detector capacitance all into consideration. The output pulse after amplification has peak amplitude of 300 mV for a maximum injected charge of 40000 electrons from the detector.</p><p>The readout front-end system noise performance is strongly dependent on the input MOSFET type, size, and biasing. In this work a PMOS has been selected and optimized as the input device due to its smaller 1/f noise and high gain as compare to NMOS when biased at same currents. The architecture designed in this work consists of a folded cascode CSA with extra cascode in first stage, a pole-zero cancellation circuit to eliminate undershoot, a shaper amplifier, and integrators using Gm-C filter technique. All of these components are optimized for low power while meeting the noise requirements. The whole front-end system is programmed for peaking times of 10, 20, and 40 ns. The programmability is achieved by switching different capacitors and resistors values for all the poles and zeros in the front-end, and by switching parallel transconductance in the Gm-C filters. Finally fine tuning of all the capacitance, resistance, and transconductance values is done to achieve required performance.</p>

<p>In today’s world the multi-standard wireless receivers are gaining more and more popularity. End-users want to access voice, data and streaming media from a single wireless terminal. An ideal approach for multi-standard receiver front-end is to digitize a wide band RF signal available from the antenna. All radio functions such as downconversion, demodulation and channel selection can be then performed in the digital domain. Analog to Digital Converter in such a case should guarantee very high linearity, speed and bandwidth specifications while consuming a lot of power. Unfortunately an ADC with such stringent requirements cannot be realized in today’s CMOS technology. In a typical receiver a mixer is used to downconvert the RF signal to baseband (or IF) before digitization is performed. A passive mixer is often used in this case to mitigate the effect of the low frequency flicker noise. Specially it can be a sampling mixer which also serves as a S/H circuit usually required for A/D conversion. In this thesis a lowpass sigma-delta converter with RF sampling is presented. The ΣΔ modulator is SC passive circuit plus comparator, so an operational amplifier usually needed to realize the integrator is avoided. To reduce the complexity, the sampling mixer in front of the modulator is merged with the passive loop filter. As a result the sampling mixer is closed in the modulator loop, so the overall linearity of the frontend is improved to some extent. Downconversion is combined with digitization that reduces the circuit complexity as well.The challenges while digitizing high frequency RF signal are discussed in details. Switches required to realize the loop filter are very critical and tend to be nonlinear. Parasitic effects associated with MOS transistors strongly show up at GHz frequencies. Optimized transistor sizes are obtained through simulation while addressing the speed and linearity trade-off. Another major challenge is the kT/C noise that is the real bottleneck in high frequency SC circuit design. A thermal noise model for ΣΔ-modulator with second-order loop filter is presented and it is shown that a passive ΣΔ-modulator is  in fact thermal noise limited rather than quantization noise limited. It is because the capacitor values are limited by the very high sampling frequency used in this case.The downconverting lowpass ΣΔ modulator with second order SC passive loop filter and 1-bit quantizer is simulated at transistor level in 90nm CMOS process. This modulator can operate at very high sampling frequency upto 4GHz and can sample RF signal with carrier of upto 4GHz as well. The designed ΣΔ modulator is flexible and supports sub-sampling by 2 to 8 (fs = 500MHz, ... 2GHz). Besides, the presented design is very power efficient as it does not use OpAmps – which consume most of the power in the typical ΣΔ modulators. From schematic simulation on average, signal-to-noise and distortion ratio (SNDR) of 52 dB is obtained (ENOB = 8.3). SNDR results does not vary much for three different cases of baseband digitalization, RF sampling and RF sub-sampling. This SNDR value seems to be a good number for a passive sigma-delta modulator. The detailed simulation results for the three cases discussed in the thesis work shown that, the modulator performs equally well for a wide range of sampling and RF signal frequencies.</p>

<p>A wave digital filter is derived from an analog filter, which is realized as classical doubly resistively terminated reactancefilters. Perfectly designed wave digital filters express good dynamic signal range, low roundoff noise and excellent stabilitycharacteristics with respect to nonlinearity which are produced due to finite wordlength effects. Wave digital filters inheritthe sensitivity properties from analog filters, therefore, coefficients values can be selected to favorable values.Wave digital filters, derived from ladder filters, have low coefficient sensitivity in the passband and stopband. These WDFsare very complicated and are non-modular. The lattice wave digital filters are modular and are not complex. However, theyhave very high sensitivity in the stopband and thus require large coefficient wordlengths. The number of coefficients equalsthe filter order which have to be odd.This thesis discusses the wave digital filter structures that are modular because they are designed by cascading the first-orderand second-order sections. These WDFs can be pipelined. They also exhibit all the above mentioned favorable properties.Similar to lattice WDFs, these structures are restricted to symmetrical and antisymmetrical transfer functions. The synthesisof these structures is based on the factorization of the scattering matrix of lossless two-ports.In this thesis work, lowpass wave digital filters based on circulator-tree structure are designed with different orders startingfrom 3 and going upto 13. In parallel to these circulator-tree wave digital filters, the simple digital filters are also designedwith the same specification. The results of the two filters are compared with each other. It is observed that impulse responseand attenuation response of the two kind of filters perfectly match. Therefore, it is can be concluded that circulator-tree WDFupto Nth order can be synthesized. The implementation examples of two filter with order 3 and order 7 is presented in thisdocumentation for ready reference. It has also been shown that the order of sections does not affect the transfer function ofthe filter. Noise has been introduced and adaptor sections are penetrated. From the results it is concluded that the order of theadaptor sections does not matter and also that the noise does not affect the other adaptors sections, it only propagates throughother adaptors sections.</p>

<p>At Acreo AB located in Norrköping, Sweden, research and development in the field of organic electronics have been conducted since 1998. Several electronic devices and systems have been realized. In late 2003 a commercial printing press was installed to test large scale production of these devices. Prior to the summer of 2005 the project made significant progress. As a step towards industrialisation, the variability and yield of the printing process needed to bee studied. A decision to implement Statistical Process Control (SPC) and Design of Experiments (DOE) to evaluate and improve the process was taken.</p><p>SPC has been implemented on the EC-patterning step in the process. A total of 26 Samples were taken during the period October-December 2005. An - and s-chart were constructed from these samples. The charts clearly show that the process is not in statistical control. Investigations of what causes the variation in the process have been performed. The following root causes to variation has been found: </p><p>PEDOT:PSS-substrate sheet resistance and poorly cleaned screen printing drums. </p><p>After removing points affected by root causes, the process is still not in control. Further investigations are needed to get the process in control. Examples of where to go next is presented in the report. In the DOE part a four factor full factorial experiment was performed. The goal with the experiment was to find how different factors affects switch time and life length of an electrochromic display. The four factors investigated were: Electrolyte, Additive, Web speed and Encapsulation. All statistical analysis was performed using Minitab 14. The analysis of measurements from one day and seven days after printing showed that:</p><p>- Changing Electrolyte from E230 to E235 has small effect on the switch time</p><p>- Adding additives Add1 and Add2 decreases the switch time after 1 and 7 days</p><p>- Increasing web speed decreases the switch time after 1 and 7 days </p><p>- Encapsulation before UV-step decreases the switch time after 7 days</p>