This thesis addresses the development of new gas sensor using surface acoustic wave (SAW) technology. SAW sensors detect the change in mass, modulus, and conductivity of a sensing layer material via absorption or adsorption of an analyte. The advantage of SAW sensor includes low cost, small size, high sensitivity. We investigated the use of nano-crystalline palladium film for sensing hydrogen gas. We also investigated SAW fabrication for radio frequency (RF) range operation where high signal-to-noise ratios can be achieved. A test-bed consisting of a gas dilution system, a temperature-controlled test cell, a network analyzer, and computer-based measurement system was used for evaluating the performance of SAW gas sensors at very low concentrations. Both single and dual delay line SAW devices were fabricated by means of photolithography on a lithium niobate substrate. Tests are carried to determine response speed, resolution, reproducibility, and linear characteristics, over a range of analyte concentrations.

Research Doctorate - Doctor of Philosophy (PhD) / The photochemistry of poly{p-phenylene[1-(tetrahydrothiophen-1-io)ethylene chloride]} (PPTEC), a water soluble precursor of the semiconducting polymer, poly{p-phenylenevinylene} (PPV), has been studied both under atmospheric conditions and in environments devoid of oxygen. UV-visible spectroscopy and photoluminescence data has been used to provide a picture of the mechanistic pathways involved in UV irradiation of the PPTEC material. A new quantitative model for the effect of UV irradiation upon film morphology is presented. The technique of near-field scanning optical lithography (NSOL) has been used to produce arbitrary structures of the semi-conducting polymer poly{p-phenylenevinylene} at sizes comparable with optical wavelengths. Structures on this scale are of interest for integrated optical devices and organic solar cells. The structures are characterised using AFM and SEM and examined in the context of the electric field distribution at the NSOM tip. The Bethe-Bouwkamp model for electric field distribution at an aperture has been used, in combination with the developed model for precursor solubility dependence on UV energy dose, to predict the characteristics of lithographic features produced by NSOL. Fine structure in the lithographic features that are characteristic of the technique are investigated and their origins explained. Suggestions for the improvement of the technique are made. Presented here for the first time is a device manufactured by the technique of NSOL functioning as an optical device. The technique of NSOL is used to manufacture an optical transmission phase grating (or phase mask) of PPV, this was done as a proof of concept for device manufacture by this method and to demonstrate the potential usefulness of the unique characteristics of the technique. The phase mask was characterised using AFM and SEM and examined in the context of how well a diffraction pattern matches with theoretical calculations.

To investigate the ultimate resolution in ion beam lithography (IBL) the resist material poly(methyl methacrylate) PMMA has been modified by single ion impacts. The latent damage tracks have been etched prior to imaging and characterisation. The interest in IBL comes from a unique advantage over more traditional electron beam or optical lithography. An ion with energy of the order of 1 MeV per nucleon evenly deposits its energy over a long range in a straight latent damage path. This gives IBL the ability to create high aspect ratio structures with a resolution in the order of 10 nm. Precise ion counting into a spin coated PMMA film on top of an active substrate enabled control over the exact fluence delivered to the PMMA from homogenously irradiated areas down to separated single ion tracks. Using the homogenous areas it was possible to macroscopically measure the sensitivity of the PMMA as a function of the developing parameters. Separated single ion tracks wer e created in the PMMA using 8 MeV F, 71 MeV Cu and 88 MeV I ions. These ion tracks were etched to create voids in the PMMA film. For characterisation the tracks were imaged primarily with atomic force microscopy (AFM) and also with scanning electron microscopy (SEM). The series of studies presented here show that the sensitivity of the resist-developer combination can be tailored to allow the etching of specific single ion tracks. With the ability to etch only the damage track, and not the bulk material, one may experimentally characterise the damage track of any chosen ion. This offers the scientific community a useful tool in the study and fabrication of etched ion tracks. Finally work has been conducted to allow the precise locating of an ion beam using a nanoscale mask and piezoelectrically driven scanning stage. This method of beam locating has been trailed in conjunction with single ion detection in an effort to test the practical limits of ion beam lithography in the single ion realm.

No description available.

<p>Today, the dominating way of patterning nanosystems is by irradiation-based lithography (e-beam, DUV, EUV, and ions). Compared to the other irradiations, ion tracks created by swift heavy ions in matter give the highest contrast, and its inelastic scattering facilitate minute widening and high aspect ratios (up to several thousands). Combining this with high resolution masks it may have potential as lithography technology for nanotechnology. Even if this ‘ion track lithography’ would not give a higher resolution than the others, it still can pattern otherwise irradiation insensitive materials, and enabling direct lithographic patterning of relevant material properties without further processing. In this thesis ion tracks in thin films of polyimide, amorphous SiO₂ and crystalline TiO₂ were made. Nanopores were used as templates for electrodeposition of nanowires.</p><p>In lithography patterns are defined by masks. To write a nanopattern onto masks e-beam lithography is used. It is time-consuming since the pattern is written serially, point by point. An alternative approach is to use self-assembled patterns. In these first demonstrations of ion track lithography for micro and nanopatterning, self-assembly masks of silica microspheres and porous alumina membranes (PAM) have been used. </p><p>For pattern transfer, different heavy ions were used with energies of several MeV at different fluences. The patterns were transferred to SiO₂ and TiO₂. From an ordered PAM with pores of 70 nm in diameter and 100 nm inter-pore distances, the transferred, ordered patterns had 355 nm deep pores of 77 nm diameter for SiO₂and 70 nm in diameter and 1,100 nm deep for TiO₂. The TiO₂ substrate was also irradiated through ordered silica microspheres, yielding different patterns depending on the configuration of the silica ball layers. </p><p>Finally, swift heavy ion irradiation with high fluence (above 10¹⁵/cm²) was assisting carbon nanopillars deposition in a PAM used as template. </p>

Current research in materials science and engineering continues to drive it's attention to systems on the nanoscale. Thin films, nano-particles, quantum dots, nano-wires, etc are just a few of the areas that are becoming important in projects ranging from biomedical transport to nano-gears. Thus, understanding, producing, and creating these system is also becoming an important challenge for scientists and engineers to overcome. Physically manipulating objects on the atomic scale requires more than just "micro tweezers" to arrange them in a particular system. Another concern is that forces and interactions that could be ignored or approximated at larger scales no longer hold in this regime. It is the goal of this project to use computational models to simulate nano-particles interacting with customized, highly tailored surfaces in order to confine and pattern them to desired specifications. The interactions to be considered include electrostatic attraction and repulsion, hamaker forces, steric effects, dielectric effects of the medium, statistical variability, mechanical induced surface vibrations, etc. The goal is to be able to manufacture such systems for experimentation in order to compare results to the models. If the models do not hold, we hope to understand the origin of these discrepancies in order to create more robust models for this length scale. Lithography, CVD, and chemical etching will be the primary methods used to create these surfaces on glass substrates. TEM analysis will be compared to modeling through various MD program packages. / Singapore-MIT Alliance (SMA)

This thesis investigates technologies directed towards developing photonic crystal display devices. A switching technology based on dye electrophoretic motion within a 1D porous photonic crystal was developed. Dissociated absorbing dye species were moved through the assembled device and reflectance was controllably altered by up to 0.4. Refinement of fabrication techniques yielded a slow switching device, whose time-resolved reflectance data was analyzed. A wavelength dependence of the device switching speed was observed. This phenomenon was described by modelling where bandgap effects match observation. These devices may be improved by employing a 3D photonic crystal. We developed a nanoimprint lithography technique for seeding films deposited by GLAD for the fabrication of 3D square spiral photonic crystals. Parameters for patterning a precisely defined mould pattern using electron beam lithography were established. A large area diamond:1 square spiral photonic crystal was fabricated on the nanoimprinted seeds, and it exhibited a visible wavelength bandgap. / Micro-Electro-Mechanical Systems (MEMS) and Nanosystems

Recent advances in computing technology have highlighted deficiencies with electrical interconnections at the motherboard and card-to-backplane levels. The CPU speeds of computing systems are drastically increasing with on-chip local clock speeds expected to approach 6 GHz by 2010. Yet, card-to-backplane communication speeds have been unable to maintain the same pace. At speeds beyond a few gigahertz the implementation of electronic interconnects gets increasingly complex, thus, alternative optical interconnection techniques are being extensively researched to relieve the expected CPU to data bus bottleneck. Despite the advantages afforded by optical interconnects there are still demands for improved packaging, enhanced signal tapping, and reduced cost expenditures. In this dissertation, we present a novel array waveguide evanescent coupling (AWEC) technology for card-to-backplane applications. The interconnection scheme is based on waveguide directional coupling between a backplane waveguide and a flexible waveguide connected to the access card or daughter board. To gain access to the shared bus media, coupling of evanescent waves is exploited to tap optical signals from the backplane waveguide to the corresponding card waveguide. The approach results in the elimination of micro-mirror out of plane deflectors and local waveguide termination obstacles present in other reported optical interconnect schemes. Most importantly, the AWEC method can yield efficient multi-drop bus architectures, not possible through free-space, fiber, or traditional guided wave approaches, that only achieve point-to-point topologies. The AWEC concept for optical interconnection was introduced through coupled mode theory, numerical simulations and BeamPROP aided CAD models. Subsequent experimental waveguide analysis was performed and shown to reasonably agree with the simulation results. Likewise, a high-resolution, cost-effective, and rapid prototyping approach for AWEC fabrication has been formulated. Significantly, when compared to other soft lithographic methods, the novel vacuum assisted microfluidic (VAM) technique results in improved waveguide structures, polymer background residue elimination and lower propagation losses. Moreover, experimental results show that our evanescent coupling approach facilitates high-speed coupling between card and backplane waveguides at speeds of 10 Gbps per channel; currently limited only by our testing electronics. In addition, satisfactory eye diagram performance comparable to that of a conventional fiber link, was also observed for the AWEC, alluding to possible aggregate speeds of 100 Gbps. Similarly, we implemented an elementary AWEC shared bus architecture and demonstrate a microprocessor-to-memory interconnect prototype through the proposed AWEC link. Notably, we expect that the AWEC scheme will be significant for high-speed optical interconnects in advanced computing systems.

Today, the dominating way of patterning nanosystems is by irradiation-based lithography (e-beam, DUV, EUV, and ions). Compared to the other irradiations, ion tracks created by swift heavy ions in matter give the highest contrast, and its inelastic scattering facilitate minute widening and high aspect ratios (up to several thousands). Combining this with high resolution masks it may have potential as lithography technology for nanotechnology. Even if this ‘ion track lithography’ would not give a higher resolution than the others, it still can pattern otherwise irradiation insensitive materials, and enabling direct lithographic patterning of relevant material properties without further processing. In this thesis ion tracks in thin films of polyimide, amorphous SiO2 and crystalline TiO2 were made. Nanopores were used as templates for electrodeposition of nanowires. In lithography patterns are defined by masks. To write a nanopattern onto masks e-beam lithography is used. It is time-consuming since the pattern is written serially, point by point. An alternative approach is to use self-assembled patterns. In these first demonstrations of ion track lithography for micro and nanopatterning, self-assembly masks of silica microspheres and porous alumina membranes (PAM) have been used. For pattern transfer, different heavy ions were used with energies of several MeV at different fluences. The patterns were transferred to SiO2 and TiO2. From an ordered PAM with pores of 70 nm in diameter and 100 nm inter-pore distances, the transferred, ordered patterns had 355 nm deep pores of 77 nm diameter for SiO2 and 70 nm in diameter and 1,100 nm deep for TiO2. The TiO2 substrate was also irradiated through ordered silica microspheres, yielding different patterns depending on the configuration of the silica ball layers. Finally, swift heavy ion irradiation with high fluence (above 1015/cm2) was assisting carbon nanopillars deposition in a PAM used as template.

Modern communication systems require high performance radio frequency (RF) and microwave circuits and devices. This is becoming increasingly challenging to realize in the content of cost/size constraints. Integrated circuits (ICs) satisfy the cost/size requirement, but performance is often sacri¯ced. For instance, high quality factor (Q factor) passive components are difficult to achieve in standard silicon-based IC processes.<p>In recent years, microelectromechanical systems (MEMS) devices have been receiving increasing attention as a possible replacement for various on-chip passive elements, offering potential improvement in performance while maintaining high levels of integration. Variable capacitors (varactor) are common elements used in various applications. One of the MEMS variable capacitors that has been recently developed is built using deep X-ray lithography (as part of the LIGA process). This type of capacitor exhibits high quality factor at microwave frequencies.<p>The complementary metal oxide semiconductor (CMOS) technology dominates the silicon IC process. CMOS becomes increasingly popular for RF applications due to its advantages in level of integration, cost and power consumption. This research demonstrates a CMOS voltage-controlled oscillator (VCO) design which is used to investigate methods, advantages and problems in integrating LIGA-MEMS devices to CMOS RF circuits, and to evaluate the performance of the LIGA-MEMS variable capacitor in comparison with the conventional on-chip CMOS varactor. The VCO was designed and fabricated using TSMC 0.18 micron CMOS technology. The core of the VCO, including transistors, resistors, and on-chip inductors was designed to connect to either an on-chip CMOS varactor or an off-chip LIGA-MEMS capacitor to oscillate between 2.6 GHz and 2.7 GHz. Oscillator phase noise analysis is used to compare the performance between the two capacitors. The fabricated VCO occupied an area of 1 mm^2.<p>This initial attempt at VCO fabrication did not produce a functional VCO, so the performance of the capacitors with the fabricated VCO could not be tested. However, the simulation results show that with this LIGA-MEMS capacitor, a 6.4 dB of phase noise improvement at 300 kHz offset from the carrier is possible in a CMOS-based VCO design.