Dans cette thèse, les propriétés électriques de transistors à nanofils de silicium liées à l'interface oxyde de grille/canal ont été étudiées par le biais de mesures de bruit basse fréquence (bruit 1/f) et de transport dans le canal. Ces transistors nanofils dont les dimensions ont été réduites jusqu'à quelques nanomètres pour la section, représentent une alternative sérieuse pour les futurs nœuds technologiques CMOS. Cependant, la qualité de l'interface oxyde de grille/canal pose question pour transistors dont l'architecture s'étend dans les 3 dimensions, en raison du fort rapport surface/volume inhérent à ces transistors, des différentes orientations cristallographiques de ces interfaces, ou encore des matériaux contraints utilisés pour améliorer les performances électriques. La compréhension des liens entre les propriétés de transport des porteurs dans le canal, qui garantissent en grande partie les performances électriques des transistors, et la qualité de l'interface avec l'oxyde de grille est fond primordiale pour optimiser les transistors nanofils. Les mesures de bruit, associées à l'étude du transport dans le canal, sont un outil puissant et adapté à ces dispositifs tridimensionnels, sans être limité par la taille ultra-réduite des transistors nanofils. Les transistors nanofils étudiés ont été fabriqués à partir de substrats minces SOI, et intègrent un empilement de grille HfSiON/TiN, qui permet de réduire les dimensions tout en conservant les mêmes propriétés électrostatiques. Pour gagner en performances, des contraintes mécaniques ont été introduites dans le canal en silicium : en tension pour les NMOS, par le biais de substrat contraint (sSOI), et en compression pour les PMOS. Un canal en compression uni-axiale peut être obtenu par l'intégration de source/drain en SiGe et/ou par l'utilisation de couches contraintes de type CESL. Des transistors à canal SiGe sur isolant en compression ont également été fabriqués et étudiés. Les caractéristiques électriques des divers transistors nanofils (courbes Id-Vg, compromis Ion-Ioff, mobilité des porteurs) démontrent l'excellent contrôle électrostatique dû à l'architecture 3D, ainsi que l'efficacité de l'ingénierie de contraintes dans les nanofils jusqu'à de faibles longueurs de grilles (~17nm). Des mesures de bruit basse fréquence ont été réalisées sur ces mêmes dispositifs et analysées en fonction des paramètres géométriques de l'architecture nanofils (largeur W, forme de la section, longueur de grille L), et des diverses variantes technologiques. Nous avons démontré que le bruit 1/f dans les transistors nanofils peut être décrit par le modèle de fluctuations du nombre de porteurs (CNF) corrélées aux fluctuations de mobilité (CMF). Le bruit associé aux régions S/D a pu également être intégré dans ce modèle en ajoutant une contribution, en particulier pour les PMOS. Alors que les différentes variantes technologiques ont peu d'effet sur le bruit 1/f, les variations de géométrie en L et W changent la composante de bruit liée aux fluctuations du nombre de porteurs (CNF) de manière inversement proportionnelle à la surface totale (~1/WL). Cette augmentation du bruit est le reflet du transport qui se produit à proximité des interfaces avec l'oxyde. Les différentes orientations des interfaces supérieures et latérales (110) ou (100) présentent la même quantité de pièges d'interface (extrait à partir des mesures de bruit 1/f, en séparant les contributions des différentes faces du nanofil) bien qu'ayant une rugosité différente essentiellement liée au process. En revanche la composante CMF n'est pas altérée par la réduction des dimensions contrairement à la mobilité des porteurs qui décroit fortement avec L. Finalement, les mesures de bruit 1/f ont été comparées aux spécifications ITRS 2013 pour les transistors multi-grilles en vue des futurs nœuds technologiques de la logique CMOS, et démontrent que nos transistors nanofils satisfont les exigences en la matière. / In this thesis, electrical properties of gate oxide/channel interface in ultra-scaled nanowire (NW) MOSFETs were experimentally investigated by carrier transport and low-frequency noise (LFN) characterizations. NW FETs, which have aggressively downscaled cross-section of the body, are strong candidates for near future CMOS node. However, the interface quality could be a critical issue due to the large surface/volume ratio, the multiple surface orientations, and additional strain technology to enhance the performance. Understanding of carrier transport and channel interface quality in NW FETs with advanced high-k/metal gate is thus particularly important. LFN provides deep insights into the interface properties of MOSFET without lower limit of required channel size. LFN measurement thus can be a powerful technique for ultra-scaled NW FETs. Also, fitting mobility (such as low-field mobility) extraction by Y-function method is an efficient method. Omega-gate NW FETs were fabricated from FD-SOI substrates, and with Hf-based high-k/metal gate (HfSiON/TiN), reducing detrimental effects by device downscaling. In addition, strain technologies to the channel were additively processed. Tensile strained-SOI substrate was used for NMOS, whereas compressive stressors were used for PMOS devices. Strained Si channel for PMOS was processed by raised SiGe S/D and CESL formations. Strained SiGe channel (SGOI) was also fabricated for further high-performance PMOS FETs. Firstly, the most common Id-Vg was characterized in single-channel NW FETs as the basic performance. Reference SOI NWs provided the excellent static control down to short channel of 17nm. Stressors dramatically enhanced on-current owing to a modification of channel energy-band structure. Then, extracted low-field mobility in NWs also showed large improvement of the performance by stressors. The mobility extraction effectively evaluated FET performance even for ultra-scaled NWs. Next, LFN investigated for various technological and architectural parameters. Carrier number fluctuations with correlated mobility fluctuations (CNF+CMF) model described 1/f noise in all our FETs down to the shortest NWs. Drain current noise behavior was basically similar in both N- and PMOS FETs regardless of technological splits. Larger 1/f noise stemming from S/D regions in PMOS FETs was perfectly interpreted by the CNF+CMF model completed with Rsd fluctuations. This observation highlighted an advantage of SGOI NW with the lowest level of S/D region noise. Geometrical variations altered the CNF component with simple impact of device scaling (reciprocal to both Wtot and Lg). No large impact of surface orientation difference between the channel (100) top and (110) side-walls in [110]-oriented NWs was observed. Scaling regularity with both Wtot and Lg, without much quantum effect, could be attributed to the use of HfSiON/TiN gate and carrier transport occurring mostly near top and side-wall surfaces even in NW geometry. Meanwhile, the CMF factor was not altered by decreasing dimensions, while the mobility strongly depends on the impact. Extracted oxide trap density was roughly steady with scaling, structure, and technological parameter impacts. Simple separation method of the contributions between channel top surface and side-walls was demonstrated in order to evaluate the difference. It revealed that oxide quality on (100) top and (110) side-walls was roughly comparable in all the [110]-devices. The density values lie in similar order as the recent reports. An excellent quality of the interface with HfSiON/TiN gate was thus sustained for all our technological and geometrical splits. Finally, our NWs fulfilled 1/f LFN requirements stated in the ITRS 2013 for future MG CMOS logic node. Consequently, we concluded that appropriate strain technologies powerfully improve both carrier transport and LFN property for future CMOS circuits consisting of NW FETs, without any large concern about the interface quality.

O ruído de baixa frequência é um limitador de desempenho em circuitos analógicos, digitais e de radiofrequência, introduzindo ruído de fase em osciladores e reduzindo a estabilidade de células SRAM, por exemplo. Transistores de efeito de campo de metalóxido- semicondutor (MOSFETs) são conhecidos pelos elevados níveis de ruído 1= f e telegráfico, cuja potência pode ser ordens de magnitude maior do que a observada para ruído térmico para frequências de até dezenas de kHz. Além disso, com o avanço da tecnologia, a frequência de corner —isto é, a frequência na qual as contribuições dos ruídos térmico e shot superam a contribuição do ruído 1= f — aumenta, tornando os ruídos 1= f e telegráfico os mecanismos dominantes de ruído na tecnologia CMOS para frequências de até centenas de MHz. Mais ainda, o ruído de baixa frequência em transistores nanométricos pode variar significativamente de dispositivo para dispositivo, o que torna a variabilidade de ruído um aspecto importante para tecnologias MOS modernas. Para assegurar o projeto adequado de circuitos do ponto de vista de ruído, é necessário, portanto, identificar os mecanismos fundamentais responsáveis pelo ruído de baixa frequência em MOSFETs e desenvolver modelos capazes de considerar as dependências do ruído com geometria, polarização e temperatura. Neste trabalho é proposta uma técnica para análise de ruído de baixa frequência baseada na autocorrelação dos espectros de ruído em função de parâmetros como frequência, polarização e temperatura. A metodologia apresentada revela informações importantes sobre os mecanismos responsáveis pelo ruído 1= f que são difíceis de obter de outras formas. As análises de correlação realizadas em três tecnologias CMOS comerciais (140 nm, 65 nm e 45 nm) fornecem evidências contundentes de que o ruído de baixa frequência em transistores MOS tipo-n e tipo-p é composto por um somatório de sinais telegráficos termicamente ativados. / Low-frequency noise (LFN) is a performance limiter for analog, digital and RF circuits, introducing phase noise in oscillators and reducing the stability of SRAM cells, for example. Metal-oxide-semiconductor field-effect-transistors (MOSFETs) are known for their particularly high 1= f and random telegraph noise levels, whose power may be orders of magnitude larger than thermal noise for frequencies up to dozens of kHz. With the technology scaling, the corner frequency — i.e. the frequency at which the contributions of thermal and shot noises to noise power overshadow that of the 1= f noise — is increased, making 1= f and random telegraph signal (RTS) the dominant noise mechanism in CMOS technologies for frequencies up to several MHz. Additionally, the LFN levels from device-to-device can vary several orders of magnitude in deeply-scaled devices, making LFN variability a major concern in advanced MOS technologies. Therefore, to assure proper circuit design in this scenario, it is necessary to identify the fundamental mechanisms responsible for MOSFET LFN, in order to provide accurate LFN models that account not only for the average noise power, but also for its variability and dependences on geometry, bias and temperature. In this work, a new variability-based LFN analysis technique is introduced, employing the autocorrelation of multiple LFN spectra in terms of parameters such as frequency, bias and temperature. This technique reveals information about the mechanisms responsible for the 1= f noise that is difficult to obtain otherwise. The correlation analyses performed on three different commercial mixed-signal CMOS technologies (140-nm, 65-nm and 40-nm) provide strong evidence that the LFN of both n- and p-type MOS transistors is primarily composed of the superposition of thermally activated random telegraph signals (RTS).

O ruído de baixa frequência é um limitador de desempenho em circuitos analógicos, digitais e de radiofrequência, introduzindo ruído de fase em osciladores e reduzindo a estabilidade de células SRAM, por exemplo. Transistores de efeito de campo de metalóxido- semicondutor (MOSFETs) são conhecidos pelos elevados níveis de ruído 1= f e telegráfico, cuja potência pode ser ordens de magnitude maior do que a observada para ruído térmico para frequências de até dezenas de kHz. Além disso, com o avanço da tecnologia, a frequência de corner —isto é, a frequência na qual as contribuições dos ruídos térmico e shot superam a contribuição do ruído 1= f — aumenta, tornando os ruídos 1= f e telegráfico os mecanismos dominantes de ruído na tecnologia CMOS para frequências de até centenas de MHz. Mais ainda, o ruído de baixa frequência em transistores nanométricos pode variar significativamente de dispositivo para dispositivo, o que torna a variabilidade de ruído um aspecto importante para tecnologias MOS modernas. Para assegurar o projeto adequado de circuitos do ponto de vista de ruído, é necessário, portanto, identificar os mecanismos fundamentais responsáveis pelo ruído de baixa frequência em MOSFETs e desenvolver modelos capazes de considerar as dependências do ruído com geometria, polarização e temperatura. Neste trabalho é proposta uma técnica para análise de ruído de baixa frequência baseada na autocorrelação dos espectros de ruído em função de parâmetros como frequência, polarização e temperatura. A metodologia apresentada revela informações importantes sobre os mecanismos responsáveis pelo ruído 1= f que são difíceis de obter de outras formas. As análises de correlação realizadas em três tecnologias CMOS comerciais (140 nm, 65 nm e 45 nm) fornecem evidências contundentes de que o ruído de baixa frequência em transistores MOS tipo-n e tipo-p é composto por um somatório de sinais telegráficos termicamente ativados. / Low-frequency noise (LFN) is a performance limiter for analog, digital and RF circuits, introducing phase noise in oscillators and reducing the stability of SRAM cells, for example. Metal-oxide-semiconductor field-effect-transistors (MOSFETs) are known for their particularly high 1= f and random telegraph noise levels, whose power may be orders of magnitude larger than thermal noise for frequencies up to dozens of kHz. With the technology scaling, the corner frequency — i.e. the frequency at which the contributions of thermal and shot noises to noise power overshadow that of the 1= f noise — is increased, making 1= f and random telegraph signal (RTS) the dominant noise mechanism in CMOS technologies for frequencies up to several MHz. Additionally, the LFN levels from device-to-device can vary several orders of magnitude in deeply-scaled devices, making LFN variability a major concern in advanced MOS technologies. Therefore, to assure proper circuit design in this scenario, it is necessary to identify the fundamental mechanisms responsible for MOSFET LFN, in order to provide accurate LFN models that account not only for the average noise power, but also for its variability and dependences on geometry, bias and temperature. In this work, a new variability-based LFN analysis technique is introduced, employing the autocorrelation of multiple LFN spectra in terms of parameters such as frequency, bias and temperature. This technique reveals information about the mechanisms responsible for the 1= f noise that is difficult to obtain otherwise. The correlation analyses performed on three different commercial mixed-signal CMOS technologies (140-nm, 65-nm and 40-nm) provide strong evidence that the LFN of both n- and p-type MOS transistors is primarily composed of the superposition of thermally activated random telegraph signals (RTS).

No description available.

No description available.

This thesis work contains electrical transport and low frequency (1/f) noise measurements in ultrathin graphene and Molybdenum disulphide (MoS2) field effect transistors (FET). From the measurements, We mainly focus on the origin of disorder in both the materials. To address the orgin of disorder in graphene, we study single and bilayer graphene-FET devices on SiO2 substrate. We observe that both conductivity and mobility are mainly determined by substrate induced long range, short range, and polar phonon scattering. For further confirmation, we fabricate suspended graphene devices which show extremely high mobility. We find that, in contrast to substrate-supported graphene, conductivity and mobility in suspended graphene are governed by the longitudinal acoustic phonon scattering at high temperature and the devices reach a ballistic limit at low temperature. We also conduct low frequency 1/f noise measurements, known to be sensitive to disorder dynamics, to extract more information on the nature of disorder. The measurements are carried out both in substrate-supported and suspended graphene devices. We find that 1/f noise in substarted graphene is mainly determined by the trap charges in the SiO2 substrate. On the other hand, noise behaviour in suspended graphene devices can not be explained with trap charge dominated noise model. More-over, suspended devices exhibit one order of magnitude less noise compared to graphene on SiO2 substrate. We believe noise in suspended graphene devices probably originate from metal-graphene contact regions. In the second part of our work, We present low temperature electrical transport in ultrathin MoS2 fields effect devices, mechanically exfoliated onto Si/SiO2 substrate. Our experiments reveal that the electronic states in MoS2 are localized well up to the room temperature over the experimentally accessible range of gate voltage. This manifests in two dimensional (2D) variable range hopping (VRH) at high temperatures, while below ~ 30 K the conductivity displays oscillatory structures in gate voltage arising from resonant tunneling at the localized sites. From the correlation energy (T0) of VRH and gate voltage dependence of conductivity, we suggest that the charged impurities are the dominant source of disorder in MoS2. To explore the origin of the disorder, we perform temperature dependent I - V measurements at high source-drain bias. These measurements indicate presence of an exponentially distributed trap states in MoS2 which originate from the structural inhomogeneity. For more detailed investigation, we employ 1/f noise which further confirms possible presence of structural disorder in the system. The origin of the localized states is also investigated by spectroscopic studies, which indicate a possible presence of metallic 1T-patches inside semiconducting 2H phase. From all these evidences, we suggest that the disorder is internal, and achieving high mobility in MoS2 FET requires a greater level of crystalline homogeneity.

Low-frequency noise (LFN) is characterized using in-house measurement systems in a variety of SiGe HBT generations. As technology scales to improve the performance and integration level, a large low-frequency noise variation in small geometry SiGe HBTs is first observed in 90 GHz peak fT devices. The fundamental mechanism of this geometry dependent noise variation is thought to be the superposition of individual Lorentzian spectra due to the presence of G/R centers in the device. The observed noise variation is the result of a trap quantization effect, and is thus best described by number fluctuation theory rather than mobility fluctuation theory. This noise variation continues to be observed in 120 GHz and 210 GHz peak fT SiGe HBT BiCMOS technology. Interestingly, the noise variation in the 210 GHz technology generation shows anomalous scaling behavior below about 0.2-0.3um2 emitter geometry, where the noise variation rapidly decreases. Data shows that the collector current noise is no longer masked by the base current noise as it is in other technology generations, and becomes the dominant noise source in these tiny 210 GHz fT SiGe HBTs. The proton response of LFN in SiGe HBTs is also investigated in this thesis. The results show that the relative increase of LFN is minor in transistors with small emitter areas, but significant in transistors with large emitter areas after radiation. A noise degradation model is proposed to explain this observed geometry dependent LFN degradation. A 2-D LFN simulation is applied to SiGe HBTs for the first time in order to shed light on the physical mechanisms responsible for LFN. A spatial distribution of base current noise and collector current noise reveals the relevant importance of the physical locations of noise sources. The impact of LFN in SiGe HBTs on circuits is also examined. The impact of LFN variation on phase noise is demonstrated, showing VCOs with small geometry devices have relatively large phase noise variation across samples.

The rapid progress of complementary-metal-oxide-semiconductor (CMOS) integrated circuit technology became feasible through continuous device scaling. The implementation of high-k/metal gates had a significantcontribution to this progress during the last decade. However, there are still challenges regarding the reliability of these devices. One of the main issues is the escalating 1/fnoise level, which leads to degradation of signal-to-noise ratio (SNR) in electronic circuits. The focus of this thesis is on low-frequency noise characterization and modeling of various novel CMOS devices. The devices include PtSi Schottky-barriers  for source/drain contactsand different high-kgatestacksusingHfO2, LaLuO3 and Tm2O3 with different interlayers. These devices vary in the high-k material, high-k thickness, high-k deposition method and interlayermaterial. Comprehensive electrical characterization and low-frequency noise characterization were performed on various devices at different operating conditions. The noise results were analyzed and models were suggested in order to investigate the origin of 1/f noise in these devices. Moreover, the results were compared to state-of-the-art devices. High constant dielectrics limit the leakage current by offering a higher physical dielectric thickness while keeping the Equivalent Oxide Thickness (EOT) low. Yet, the 1/f noise increases due to higher number of traps in the dielectric and also deterioration of the interface with silicon compared to SiO2. Therefore, in order to improve the interface quality, applying an interfacial layer (IL) between the high-k layer and silicon is inevitable. Very thin, uniform insitu fabricated SiO2 interlayers with HfO2 high-k dielectric have been characterized. The required thickness of SiO2 as IL for further scaling has now reached below 0.5 nm. Thus, one of the main challenges at the current technology node is engineering the interfacial layer in order to achieve both high quality interface and low EOT. High-k ILs are therefore proposed to substitute SiOx dielectrics to fulfill this need. In this work, we have made the first experiments on low-frequency noise studies on TmSiO as a high-k interlayer with Tm2O3 or HfO2 on top as high-k dielectric. The TmSiO/Tm2O3 shows a lower level of noise which is suggested to be related to smoother interface between the TmSiO and Tm2O3. We have achieved excellentnoise performancefor TmSiO/Tm2O3 and TmSiO/HfO2 gate stacks which are comparableto state-of-the-art SiO2/HfO2 gate stacks. / <p>QC 20151130</p>

Disertacijoje nagrinėjama triukšmo sklaidos nuo vėjo jėgainių problema. Pagrindiniai tyrimo objektai yra vėjo jėgainių parkų skleidžiamas triukšmas ir aplinkai nekenksmingos, cilindrinę struktūrą turinčios, žemo dažnio triukšmą slopinančios medžiagos. Darbe sprendžiami keli pagrindiniai uždaviniai: nustatomas ir įvertinamas žemo dažnio triukšmo ir infragarso susidarymas ir sklaida pramoninių vėjo jėgainių parkuose ir jų išorėje, taip pat nustatomos efektyvios gyvenviečių apsaugos priemonės nuo vėjo jėgainių keliamo žemo dažnio triukšmo. Disertaciją sudaro įvadas, trys skyriai, bendrosios išvados, rekomendacijos, naudotos literatūros ir autoriaus publikacijų disertacijos tema sąrašai. Įvadiniame skyriuje aptariama tiriamoji problema, darbo aktualumas, aprašomas tyrimų objektas, formuluojamas darbo tikslas bei uždaviniai, aprašoma tyrimų metodika, darbo mokslinis naujumas, darbo rezultatų praktinė reikšmė, ginamieji teiginiai. Įvado pabaigoje pristatomos disertacijos tema autoriaus paskelbtos publikacijos ir pranešimai konferencijose bei disertacijos struktūra. Pirmasis skyrius skirtas literatūros analizei. Jame pateikta vėjo jėgainių ir jų keliamo triukšmo apžvalga. Apžvelgtos vėjo energetikos būklė Lietuvoje, vėjo jėgainių konstrukcijos, vėjo jėgainių triukšmo formavimosi principas, triukšmo matavimo metodikos. Analizuojamos skleidžiamo aerodinaminio triukšmo mažinimo priemonės bei žemo dažnio triukšmo slopinimo būdai ir izoliuojančių medžiagų panaudojimas. Skyriaus... [toliau žr. visą tekstą] / The dissertation examines the issue of noise emission from the wind farms. The objects of investigation are wind farm noise and environmentally friendly low-frequency noise-deadening materials with cylindrical structure. The paper addresses a number of key objectives: to determine and assess low frequency noise and infrasound emission and dispersion both inside and outside the industrial wind farms, as well as to establish effective measures for protection of settlements against low-frequency noise generated by wind turbines. The dissertation consists of an introduction, three chapters, conclusions, recommendations, list of references and the author's publications on the topics. The introductory chapter discusses the research problem, the relevance of the investigation, describes the object of the research, states the aims and objectives, presents the research methodology, scientific novelty, practical significance of the results, and the statements for defending. It also highlights practical significance of the dissertation presents the author's publications and presentations at conferences, and explains the structure of the thesis. The first chapter is devoted to literature review. It provides an overview of general problems related to wind and noise produced by wind turbines, an overview of the outlook on wind energy in Lithuania, and a discussion of wind turbine constructions. The chapter presents the analysis of aerodynamic noise emitted by means of low-frequency noise... [to full text]

The dissertation examines the issue of noise emission from the wind farms. The objects of investigation are wind farm noise and environmentally friendly low-frequency noise-deadening materials with cylindrical structure. The paper addresses a number of key objectives: to determine and assess low frequency noise and infrasound emission and dispersion both inside and outside the industrial wind farms, as well as to establish effective measures for protection of settlements against low-frequency noise generated by wind turbines. The dissertation consists of an introduction, three chapters, conclusions, recommendations, list of references and the author's publications on the topics. The introductory chapter discusses the research problem, the relevance of the investigation, describes the object of the research, states the aims and objectives, presents the research methodology, scientific novelty, practical significance of the results, and the statements for defending. It also highlights practical significance of the dissertation presents the author's publications and presentations at conferences, and explains the structure of the thesis. The first chapter is devoted to literature review. It provides an overview of general problems related to wind and noise produced by wind turbines, an overview of the outlook on wind energy in Lithuania, and a discussion of wind turbine constructions. The chapter presents the analysis of aerodynamic noise emitted by means of low-frequency noise... [to full text] / Disertacijoje nagrinėjama triukšmo sklaidos nuo vėjo jėgainių problema. Pagrindiniai tyrimo objektai yra vėjo jėgainių parkų skleidžiamas triukšmas ir aplinkai nekenksmingos, cilindrinę struktūrą turinčios, žemo dažnio triukšmą slopinančios medžiagos. Darbe sprendžiami keli pagrindiniai uždaviniai: nustatomas ir įvertinamas žemo dažnio triukšmo ir infragarso susidarymas ir sklaida pramoninių vėjo jėgainių parkuose ir jų išorėje, taip pat nustatomos efektyvios gyvenviečių apsaugos priemonės nuo vėjo jėgainių keliamo žemo dažnio triukšmo. Disertaciją sudaro įvadas, trys skyriai, bendrosios išvados, rekomendacijos, naudotos literatūros ir autoriaus publikacijų disertacijos tema sąrašai. Įvadiniame skyriuje aptariama tiriamoji problema, darbo aktualumas, aprašomas tyrimų objektas, formuluojamas darbo tikslas bei uždaviniai, aprašoma tyrimų metodika, darbo mokslinis naujumas, darbo rezultatų praktinė reikšmė, ginamieji teiginiai. Įvado pabaigoje pristatomos disertacijos tema autoriaus paskelbtos publikacijos ir pranešimai konferencijose bei disertacijos struktūra. Pirmasis skyrius skirtas literatūros analizei. Jame pateikta vėjo jėgainių ir jų keliamo triukšmo apžvalga. Apžvelgtos vėjo energetikos būklė Lietuvoje, vėjo jėgainių konstrukcijos, vėjo jėgainių triukšmo formavimosi principas, triukšmo matavimo metodikos. Analizuojamos skleidžiamo aerodinaminio triukšmo mažinimo priemonės bei žemo dažnio triukšmo slopinimo būdai ir izoliuojančių medžiagų panaudojimas. Skyriaus... [toliau žr. visą tekstą]