La miniaturització de la industria microelectrònica és un fet del tot inqüestionables i la tecnologia CMOS no n'és una excepció. En conseqüència la comunitat científica s'ha plantejat dos grans reptes: En primer lloc portar la tecnologia CMOS el més lluny possible ('Beyond CMOS') tot desenvolupant sistemes d'altes prestacions com microprocessadors, micro - nanosistemes o bé sistemes de píxels. I en segon lloc encetar una nova generació electrònica basada en tecnologies totalment diferents dins l'àmbit de les Nanotecnologies. Tots aquests avanços exigeixen una recerca i innovació constant en la resta d'àrees complementaries com són les d'encapsulat. L'encapsulat ha de satisfer bàsicament tres funcions: Interfície elèctrica del sistema amb l'exterior, Proporcionar un suport mecànic al sistema i Proporcionar un camí de dissipació de calor. Per tant, si tenim en compte que la majoria d'aquests dispositius d'altes prestacions demanden un alt nombre d'entrades i sortides, els mòduls multixip (MCMs) i la tecnologia flip chip es presenten com una solució molt interessant per aquests tipus de dispositiu. L'objectiu d'aquesta tesi és la de desenvolupar una tecnologia de mòduls multixip basada en interconnexions flip chip per a la integració de detectors de píxels híbrids, que inclou: 1) El desenvolupament d'una tecnologia de bumping basada en bumps de soldadura Sn/Ag eutèctics dipositats per electrodeposició amb un pitch de 50µm, i 2) El desenvolupament d'una tecnologia de vies d'or en silici que permet interconnectar i apilar xips verticalment (3D packaging) amb un pitch de 100µm. Finalment aquesta alta capacitat d'interconnexió dels encapsulats flip chip ha permès que sistemes de píxels tradicionalment monolítics puguin evolucionar cap a sistemes híbrids més compactes i complexes, i que en aquesta tesi s'ha vist reflectit transferint la tecnologia desenvolupada al camp de la física d'altes energies, en concret implantant el sistema de bump bonding d'un mamògraf digital. Addicionalment s'ha implantat també un dispositiu detector híbrid modular per a la reconstrucció d'imatges 3D en temps real, que ha donat lloc a una patent. / The scaling down of microelectronic's industry is a fact completely unquestionable and the technology CMOS is not an exception. Consequently, the scientific community has considered two great challenges: In first place to bring the technology CMOS the most far away possible ('Beyond CMOS') while developing advanced systems such as microprocessors, micro - nanosystems or pixel systems. On the other hand to begin a new electronic generation based on technologies totally different inside the Nanotechnologies area.All these advances require a research and constant innovation in the rest of complementary areas such as Packaging. Any packaging system has to satisfy three functions in a basic way: Electrical interface of the system with the exterior, to provide a mechanical support to the system and to provide a way of heat dissipation. In order to satisfy the requirements of advanced systems with high number of I/Os, the multichip modules (MCMs) and the flip chip technology are presented as a very interesting solution.The goal of this thesis consist of developing a multichip module technology based on flip chip interconnections for the integration of hybrid pixel detectors, which includes: 1) The development of a bumping technology based on electrodeposited Sn/Ag eutectic solder bumps with a pitch of 50µm, and 2) The development of a technology of gold vias in silicon that allows to interconnect and to stack chips vertically (3D packaging) with a pitch of 100µm.Finally this high capacity of flip chip interconnection has allowed that traditional monolithic pixel systems can evolve towards hybrid systems more compact and complex, and that in this thesis has been reflected transferring the technology developed in the field of the high energies physics, implanting the bump bonding system of a digital mammography system in particular. Additionally also a modular hybrid detecting device (CMOS Image Sensor) has been implanted for the reconstruction of 3D images in real time, which has caused a patent.

In future, computing platforms will invoke massive parallelism by using a huge number of processing elements. These elements need broadband interconnects to communicate with each other. Following More-than-Moore concepts, soon large numbers of processors will be arranged in 3D chip-stacks. This trend to stack multiple dies produces a demand for high-speed intraconnects (within the 3D stack) which enable an efficient operation. Besides wireless electronic solutions (inductive or capacitive as well as using antennas), optical connectivity is an option for bit rates up to the Tbit/s range, too. We investigated different candidates for optical TSVs. For optical transmission via optical Through-Silicon-Vias, we were able to demonstrate negligible losses and dispersion.

Abstract This investigate is designated to the viewpoint that arrangement array of multichip modules are both staggered and in-line. Moreover, here we will discuss and compare the effects and differences of the relevantparameters caused by change Reynolds number (Re) in the experiment.In this experiment, I adopt ¡§transient heat transfer method with thermochromic liquid crystal¡¨ to research multichip modules array change to 3 ¡Ñ 5 and in-line or staggered multichip modules array to probe into the effects of over high density electronic multichip array space to length ratio to heat transfer effects when over high density electronic multichip array space to length ratio are S/L= 4/20,6/20,8/20 in the 8mm¡B12m¡B16mm respectively. The conditions are as following when every row center of chip convection heat transfer coefficient are measured: standard height to length ratio is H/L=10/20 and the height is 20mm. By observing the relationship of the varying parameters, as we can see in the analyze multichip of the experiment Re range form 1394 to 5025, we are able to improve thermal management. The experimentresule: (1) At higher values of Re the heat transfer effects are gain more,atteribute main flow field separation and reattachment is form behind the downstream modules. (2) In over high density multichip array 12S (S/L=6/20) proper are use for Re higher 4135 more than, at 8S (S/L=4/20)the lower Re can be thermocumulate in chip center. (3)When Re is 4135~5025,the heat transfer effects from staggered array is superior to in-line array. If Re range is 1394~3210,the thermal conduction is opposite. Therefore, Re is still the key that decides the efficacy of over high density electronic multichip array heat transfer effects.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2007. / Includes bibliographical references.

Thesis (Ph. D.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2008. / Includes bibliographical references.

International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / This paper presents a new architecture of the end-to-end ground system to reduce overall mission support costs. The present ground system of the Jet Propulsion Laboratory (JPL) is costly to operate, maintain, deploy, reproduce, and document. In the present climate of shrinking NASA budgets, this proposed architecture takes on added importance as it will dramatically reduce all of the above costs. Currently, the ground support functions (i.e., receiver, tracking, ranging, telemetry, command, monitor and control) are distributed among several subsystems that are housed in individual rack-mounted chassis. These subsystems can be integrated into one portable laptop system using established MultiChip Module (MCM) packaging technology. The large scale integration of subsystems into a small portable system will greatly reduce operations, maintenance and reproduction costs. Several of the subsystems can be implemented using Commercial Off-The-Shelf (COTS) products further decreasing non-recurring engineering costs. The inherent portability of the system will open up new ways for using the ground system at the “point-of-use” site as opposed to maintaining several large centralized stations. This eliminates the propagation delay of the data to the Principal Investigator (PI), enabling the capture of data in real-time and performing multiple tasks concurrently from any location in the world. Sample applications are to use the portable ground system in remote areas or mobile vessels for real-time correlation of satellite data with earth-bound instruments; thus, allowing near real-time feedback and control of scientific instruments. This end-to-end portable ground system will undoubtedly create opportunities for better scientific observation and data acquisition.

Thesis (Ph. D.)--State University of New York at Binghamton, Department of Systems Science and Industrial Engineering, Thomas J. Watson School of Engineering and Applied Science, 2008. / Includes bibliographical references.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Mechanical Engineering, 2009. / Includes bibliographical references.