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97% des articles publiés sur les études climatiques racontent que le réchauffement climatique est entièrement causé par les activités humaines. Les gaz émis lors de la production d'énergie électrique ainsi que d'autres gaz rejetés par les voitures ont un réel impact sur l'atmosphère. Une solution consiste à mettre au point des composants présentant des pertes de conduction plus faibles et des caractéristiques de claquage plus élevées qui pourraient être utilisés dans des centrales nucléaires, des cellules de commutation à haute puissance, des voitures hybrides (électriques), etc.De nos jours, les composants à base de silicium contrôlent environ 95% des dispositifs électroniques. Le carbure de silicium SiC et le nitrure de gallium GaN sont actuellement à l’étape de R&D, et commencent à être intégrés dans certains circuits électroniques. D'autres matériaux tels que Ga2O3, AlN ou le diamant sont encore à l’étape de recherche. Les derniers sont connus sous le nom de matériaux à bande ultra large et semblent être la solution requise pour les faibles pertes de puissance. Le diamant est reconnu comme le matériau ultime pour la prochaine génération de composants de puissance en raison de ses propriétés physiques exceptionnelles telles qu'un champ de claquage élevé (>10 MV/cm) permettant d'utiliser le dispositif pour une commande de puissance élevée, une mobilité de porteurs élevée (2 000 cm^2/V.s pour les trous), une vitesse de saturation élevée, une conductivité thermique élevée (22 W/cm.K) pour une parfaite dissipation de chaleur et une faible constante diélectrique. Théoriquement, le diamant est le semi-conducteur offrant le meilleur compromis entre résistance à l'état passant et tension de claquage. En particulier, en raison de l'ionisation incomplète des dopants, il est encore plus efficace à haute température. Diverses diodes Schottky en diamant (SBD) avec de bonnes performances à l’état passant et bloqué (7,7 MV/cm) ont été rapportées. En plus des SBDs, des transistors à effet de champ (FET) ont également été étudiés à travers des oxyde-métal semi-conducteur FETs (MOSFETs) utilisant une surface hydrogénée avec des densités de courant élevées à l'état passant ou des surface oxygéné avec de bonnes caractéristiques de blocage. Pour les composants de haute-tension, il est nécessaire de changer l’architecture de l’électrode afin d’éviter un claquage prématuré due à l’encombrement du champ électrique aux bords. Dans ce but, les techniques de terminaison de bord sont utilisées pour atteindre les caractéristiques idéales. La tâche évidente avant toute fabrication de composant est la partie simulation qui prédit l’optimisation de l’architecture et les caractéristiques attendues. Une bonne prédiction nécessite la connaissance des paramètres du matériau. Les paramètres importants pour le claquage sont les coefficients d'ionisation par impact. Plusieurs coefficients ont été publiés pour le diamant. Toutefois, ils ont été extraits en « fittant » des structures non optimisées, d'où un manque de précision.Dans cette étude, deux structures de terminaisons de bord pour des diodes Schottky, appelées plaque de champ et anneaux à champ flottant, ont été étudiées. Leur efficacité de distribution du champ de surface par analyse de courant induit par faisceau d'électrons (EBIC) a été observée. De plus, des FETs ont été fabriqués et caractérisés, un MESFET et un RB-MESFET. Les FETs présentent un claquage élevé, jusqu’à 3 kV et une faible résistance. Le développement des transistors est indissociable de la diode Schottky, car ils sont tous deux nécessaires à la fabrication de cellules de commutation. Et enfin, les coefficients d'ionisation par impact pour les électrons ont été mesurés à l'aide d’EBIC pour un champ >0,5 MV/cm dans une région sans défaut. Les valeurs mesurées sont (sous l’equation de Chynoweth) an = 971 /cm et bn=2,39x10^6 V/cm. Ces valeurs sont proches des coefficients mesurés expérimentalement et rapportés dans la littérature. / 97% of the published climate studies articles agree with the fact that recent global warming is entirely caused by human activities. The gases emitted to produce electrical energy plus other gases rejected by cars impact considerably on the atmosphere by greenhouse effect (without referring other factors). A solution to this problem is the development of components with lower power conduction losses and higher breakdown characteristics that could be used in nuclear power plants, high power commutation cells, hybrid (electric) cars and so on.The choice of the material to reach low power conduction losses and higher breakdown is of great importance. Nowadays, silicon-based devices control about 95% of all electronic components. Silicon carbide SiC and gallium nitride GaN are at present under research and development and start to be integrated into some electronic circuits. Other materials like Ga2O3, AlN or diamond are under research for power electronic application. The last ones are known as ultra wide bandgap materials and they seem to be the required solution to low power losses. Diamond is recognized as the ultimate material for the next next-generation of power devices owing to its exceptional physical properties such as high breakdown field (>10 MV/cm) to use the device for high power control, high carrier mobility (2000 cm^2/V.s for holes) for fast switching and high frequency devices, high saturation velocity, high thermal conductivity (22 W/cm.K) for a perfect heat dissipation and low dielectric constant. Theoretically, diamond is the best semiconducting material showing the best trade-off between on-resistance and breakdown voltage. Especially, due to the incomplete ionization of the dopant, it is even more efficient at high temperature. Various diamond Schottky barrier diodes (SBDs) with good forward and reverse performances (7.7 MV/cm) were reported. In addition to SBDs, switches diamond field effect transistors (FETs) were also investigated through metal-oxide-semiconductor FETs (MOSFETs) using either an H-terminated diamond surface with high current densities in on-state or an O-terminated one with high blocking characteristics. For the high blocking voltage devices, one needs to properly terminate the edge of the electrode at the surface in order to avoid premature breakdown of the devices due to electric field crowding at the borders. In that aim, edge termination (ET) techniques are used to push the limit of the devices and reach ideal features. The obvious task before any device fabrication if the simulation part that predicts the device optimization and expected characteristics. A good device prediction requires knowledge of the material parameters. Important parameters for device breakdown in the off-state are the impact ionization coefficients. At present, several ionization coefficients were reported for diamond, however, they were extracted by fitting non-optimized structures and hence there is a lack of accuracy.In this study, two edge terminations structures for Schottky barrier diodes called field plate (FP) oxide and floating field rings were investigated. Their effectiveness in surface field distribution via electron beam induced current (EBIC) analysis was observed. In addition, normally-on FETs were fabricated and characterized, a MESFET and a reverse blocking (RB)-MESFET. The FETs exhibited a high BV, up to 3 kV and a low on-resistance. The development of transistors is inseparable from the Schottky diode since both are required to fabricate commutation cells. And finally, impact ionization coefficients for electrons were measured using EBIC for a field >0.5 MV/cm in a defect-free region. The measured values are (in a Chynoweth form) an = 971 /cm and bn = 2.39x10^6 V/cm. These values are close to the experimentally measured coefficients reported in the literature.

Silicon carbide bipolar junction transistors (BJTs) are attractive power switching devices because of the unique material properties of SiC with high breakdown electric field, high thermal conductivity and high saturated drift velocity of electrons. The SiC BJT has potential for very low specific on-resistances and this together with high temperature operation makes it very suitable for applications with high power densities. For SiC BJTs the common emitter current gain (β), the specific on-resistance (RSP_ON), and the breakdown voltage are important to optimize for competition with silicon based power devices. In this thesis, power SiC BJTs with high current gain β ≈ 60 , low on-resistance RSP_ON ≈ 5 mΩcm2, and high breakdown voltage BVCEO ≈ 1200 V have been demonstrated. The 1200 V SiC BJT that has been demonstrated has about 80 % lower on-state power losses compared to a typical 1200 V Si IGBT chip. A continuous epitaxial growth of the base-emitter layers has been used to reduce interface defects and thus improve the current gain. A significant influence of surface recombination on the current gain was identified by comparing the experiments with device simulations. In order to reduce the surface recombination, different passivation layers were investigated in SiC BJTs, and thermal oxidation in N2O ambient was identified as an efficient passivation method to increase the current gain. To obtain a low contact resistance, especially to the p-type base contact, is one critical issue to fabricate SiC power BJTs with low on-resistance. Low temperature anneal (~ 800 oC) of a p-type Ni/Ti/Al contact on 4H-SiC has been demonstrated. The contact resistivity on the ion implanted base region of the BJT was 1.3 × 10-4 Ωcm2 after annealing. The Ni/Ti/Al p-type ohmic contact was adapted to 4H-SiC BJTs fabrication indicating that the base contact plays a role for achieving a low on-resistance of SiC BJTs. To achieve a high breakdown voltage, optimized junction termination is important in a power device. A guard ring assisted Junction Termination Extension (JTE) structure was used to improve the breakdown voltage of the SiC BJTs. The highest breakdown voltage of the fabricated SiC BJTs was obtained for devices with guard ring assisted JTE using the base contact implant step for a simultaneous formation of guard rings. As a new approach to fabricate SiC BJTs, epitaxial regrowth of an extrinsic base layer was demonstrated. SiC BJTs without any ion implantation were successfully demonstrated using epitaxial regrowth of a highly doped p-type region and an etched JTE using the epitaxial base. A maximum current gain of 42 was measured for a 1.8 mm × 1.8 mm BJT with a stable and reproducible open base breakdown voltage of 1800 V. / QC 20100819

Made available in DSpace on 2016-03-15T19:37:54Z (GMT). No. of bitstreams: 1 Fernando Biazi Nascimento.pdf: 3885211 bytes, checksum: 52d266afc3ffddce2e0abc915e2471a1 (MD5) Previous issue date: 2014-10-23 / Fundo Mackenzie de Pesquisa / The present work consists of an implementation of time distribution protocol based on PTP disclosed in the IEC 61588:2009 / IEEE 1588-2008 standard to be used in low-power wireless devices. The distribution of time is important to determine the order of occurrence of events marked in distinct counts that can then be related. And the problems of lack of synchronicity are evident in circumstances ranging from the study of historical facts up to the investigation of intruders in modern equipments connected to the internet. The work included development of a completely new software for the microcontroller MSP430F2274TM using the CC2480TMnetwork controller. The implementation of the protocol considers one of the mechanisms described by the standard and remains very close to it, not fully conformant mainly because of lack of resources on the used device, but the expected behavior was kept. The devices synchronize the time between them and sintonize their time counting, in a way to reduce, as much as possible, the adjustments of further synchronizations. / O presente trabalho consiste em uma implementação de protocolo de distribuição de tempo baseado no PTP, definido na norma IEC 61588:2009/IEEE 1588-2008 a ser utilizado em dispositivos sem fio de baixo consumo de energia. A distribuição de tempo é importante para determinar a ordem de ocorrência de eventos marcados em contagens distintas que podem então ser relacionadas. E os problemas de falta de sincronia são evidentes em circunstâncias que vão de estudo de fatos históricos até a verificação de intrusos em equipamentos modernos conectados à internet. O trabalho contou com desenvolvimento de um software completamente novo para o micro-controlador MSP430F2274TM utilizando o controlador de rede CC2480TM. A implementação do protocolo considera um dos mecanismos apresentados pela norma e ficou muito próxima, não atendendo-a plenamente principalmente por falta de recursos no dispositivo utilizado, mas manteve o comportamento previsto. Os dispositivos sincronizam os tempos entre eles e sintonizam suas contagens de tempo, de forma a reduzir, tanto quanto possível, o ajuste de futuras sincronizações.

As a power device material, SiC has gained remarkable attention to its high thermal conductivity and high breakdown electric field. SiC bipolar junction transistors (BJTs) are interesting for applications as power switch for 600 V-1200 V applications. The SiC BJT has potential for very low specific on-resistances and this together with high temperature operation makes it very suitable for applications with high power densities. One disadvantage of the BJT compared with MOSFETs and Insulated Gate Bipolar Transistors (IGBTs) is that the BJT requires a more complex drive circuit with higher power capability. For the SiC BJT to become competitive with field effect transistors, it is important to achieve high current gains to reduce the power required by the drive circuit. Although much progress in SiC BJTs has been made, SiC BJTs still have low common emitter current gain typically in the range 10-50. In this work, a record high current gain exceeding 60 has been demonstrated for a SiC BJT with a breakdown voltage of 1100 V. This result is attributed to an optimized device design, a stable device process and state-of-the-art epitaxial base and emitter layers. A new technique to fabricate the extrinsic base using epitaxial regrowth of the extrinsic base layer was proposed. This technique allows fabrication of the highly doped region of the extrinsic base a few hundred nanometers from the intrinsic region. An important factor that made removal of the regrowth difficult was that epitaxial growth of very highly doped layers has a faster lateral than vertical growth rate and the thickness of the p+ layer therefore has a maximum close to the base-emitter sidewall. A remaining p+ regrowth spacer at the edge of the base-emitter junction is proposed to explain the low current gain. Under high power operation, the SiC BJTs were strongly influenced by self-heating, which significantly limits the performance of device. The DC I-V characteristics of 4H-SiC BJTs have also been studied in the temperature range 25 °C to 300 °C. The DC current gain at 300 °C decreased 56 % compared to its value at 25 °C. Selfheating effects were quantified by extracting the junction temperature from DC measurements. To form good ohmic contacts to both n-type and p-type SiC using the same metal is one important challenge for simplifying SiC Bipolar Junction Transistor (BJT) fabrication. Ohmic contact formation in the SiC BJT process was investigated using sputter deposition of titanium tungsten to both n-type and p-type followed by annealing at 950 oC. The contacts were characterized with linear transmission line method (LTLM) structures. The n+ emitter structure and the p+ base structure contact resistivity after 30 min annealing was 1.4 x 10-4 Ωcm2 and 3.7 x 10-4 Ωcm2, respectively. Results from high-resolution transmission electron microscopy (HRTEM), suggest that diffusion of Si and C atoms into the TiW layer and a reaction at the interface forming (Ti,W)C1-x are key factors for formation of ohmic contacts. / QC 20101208

ABSTRACT The Lateral Double-Diffused Metal-Oxide-Semiconductor Field Effect Transistor (LDMOSFET or LDMOS) has made an enormous impact in the field of power electronics. Its integration, low cost, and power performance have made it the popular choice for power system on chips (SoC's). Over the years, much research has gone into ways of optimizing this crucial power device. Particularly, the safe operating area (SOA) has become a focus of research in order to allow a wide range of various bias schemes. More so, device ruggedness is an important factor in the usability of these devices as there are many circuits in which high current and voltage are present in a device. In this study, a conventional LDMOS is simulated using a 2-D device simulator. Two specific device enhancement techniques are implemented and analyzed, including a p+ bottom layer and an n-adaptive layer. The parasitic BJT of the LDMOS and its effect on SOA is investigated by using meaningful and in depth device cross-section analysis. The ruggedness of these devices are then considered and analyzed by means of an undamped inductive switching test (UIS). The purpose is to realize the relationship and the possible trade-offs between safe operating area enhancement and device ruggedness.

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Les composants de puissance grand gap présentent d'ores et déjà des caractéristiques statiques et dynamiques supérieures à leurs homologues en silicium. Mais ces composants d'un nouvel ordre s'accompagnent de différences susceptibles de modifier le fonctionnement de la cellule de commutation. Les travaux qui furent menés au cours de cette thèse se sont intéressés aux composants grand gap et à leur commande au sein d'un convertisseur de puissance synchrone robuste, haut rendement et haute densité de puissance. En particulier deux points critiques ont été identifiés et étudiés. Le premier est la grande sensibilité des composants grand gap aux composants parasites. Le second est l'absence de diode parasite interne entre le drain et la source de nombreux transistors grand gap. Pour répondre aux exigences de ces nouveaux composants et en tirer le meilleur profit, nous proposons des solutions innovantes, robustes, efficaces et directement intégrables aux circuits de commande. Des circuits de commande entièrement intégrés ont ainsi été conçus spécifiquement pour les composants grand gap. Ceux-ci permettent entre autres le contrôle précis des formes de commutation par l'adaptation de l'impédance de grille, et l'amélioration de l'efficacité énergétique et de la robustesse d'un convertisseur de puissance à base de composants grand sans diodes par une gestion dynamique et locale de temps morts très courts. / Wide band gap devices already demonstrate static and dynamic performances better than silicon transistors. Compared to conventional silicon devices these new wide band gap transistors have some different characteristics that may affect power converter operations. The work presented in this PhD manuscript deals with a specific gate drive circuit for a robust, high power density and high efficiency wide band gap devices-based power converter. Two critical points have been especially studied. The first point is the higher sensitivity of wide band gap transistors to parasitic components. The second point is the lack of parasitic body diode between drain and source of HEMT GaN and JFET SiC. In order to drive these new power devices in the best way we propose innovative, robust and efficient solutions. Fully integrated gate drive circuits have been specifically developed for wide band gap devices. An adaptive output impedance gate driver provides an accurate control of wide band gap device switching waveforms directly on its gate side. Another gate drive circuit improves efficiency and reliability of diode-less wide band gap devices-based power converters thanks to an auto-adaptive and local dead-time management.