Thesis (M.S.)--Oregon State University, 2010. / Printout. Includes bibliographical references (leaves 81-86). Also available on the World Wide Web.

Thesis (Ph.D.)--Ohio University, August, 2004. / Title from PDF t.p. Includes bibliographical references (p. 177-183)

Thesis (M.S.)--Ohio University, June, 2005. / Title from PDF t.p. Includes bibliographical references (p. 85-86)

Thesis (Masters Diploma (Technology))--Cape Technikon, Cape Town, 1989 / The document initially describes the operation of the decoder and the production system. Thereafter actual engineering problems are stated and their solutions discussed. The project involves the accurate identification of problem areas on the production line and the systematic solving for each case. Subjects include static electricity pretesting and automatic insertion machine defects. Analysis of these problems provides one with a better perspective towards the production line and its inherent problems. Results and solutions are presented photographically as well as tabulated in the annexure. In some cases, such as defect classification, deductions were concluded that were very different from those initially expected.

Thesis submitted in partial fulfilment of the requirements for the degree Master of Technology: Electrical Engineering in the Faculty of Engineering at the Cape Peninsula University of Technology 2015 / Space-borne GPS receivers designed for nano-satellites are faced with various challenges. This research is undertaken to address the problems of inefficiency and high-costs associated with space-borne GPS receivers. The problem of inefficiency relates to poor performances of the GPS receiver in terms of the algorithmic models, execution speed, memory usage and errors proness. The problem of high-costs relates to the spacegrade hardware cost, implementation complexity, development time, as well as the manufacturing, production and the testing processes involved. The research objectives are to i) establish an efficient high-dynamics software-defined GPS receiver, ii) demonstrate a firmware approach and then iii) postulate a low-cost hardware implementation roadmap. The research methodology employed to address the problems and to attain the objectives is based-on using Matlab computing platform to i) implement a software-defined GPS receiver using free open-source GPS receiver algorithms, ii) further develop the software GPS receiver and lastly iii) convert the improved GPS receiver algorithms to firmware. The GPS receiver was successfully implemented in Matlab floating-point algorithms with a ±100kHz Doppler search bins and was used to post-process a pre-captured real GPS L1 C/A signal dataset. The pre-captured GPS signal was acquired, tracked, decoded and post-processed to extract the navigation message; use to compute the GPS receiver position, UTC date and time. Attempt to convert the entire Matlab floating-point GPS receiver algorithms to equivalent VHDL implementations failed; however, three of the Matlab floating-point algorithms (check_t.m, deg2dms.m and findUtmZone.m), were successfully converted to equivalent fixed-point formats in Matlab, Simulink and finally VHDL. These three algorithms, now created and optimised to fixed-point formats (efficient and enable implementation unto a low-cost microcontroller), set the basis for the firmware implementation. They were simulated and verified in Matlab, Simulink and VHDL using the Matlab HDL Coder workflow. Altera Quartus II software was then used to compile (synthesise, place & route and generate programming files) the three converted generic VHDL algorithms to embedded firmware, suitable for a FPGA programming. The Matlab HDL Coder workflow used in this research is feasible and can be used to accurately design and implement an improved GPS receiver and furthermore achieve it in three equivalent algorithms. This conclusion was drawn and the proposed recommendations are to address the conversion issues in the other Matlab floating-point GPS receiver algorithms that failed in the conversion process and to further develop and implement the GPS receiver as a fully functional unit, based-on the Xilinx space-grade, radiation hardened and low-cost Virtex 5QV FPGA.

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No description available.

As wireless communication systems continue to push the limits of energy and spectral efficiency, increased demands are placed on the capabilities of the receiver. At the same time, the computational resources available for processing received signals will continue to grow. This opens the door for iterative algorithms to play an increasing role in the next generation of communication receivers. In the context of receivers, the goal of iterative probabilistic processing is to approximate maximum a posteriori (MAP) symbol-by-symbol detection of the information bits and estimation of the unknown channel or signal parameters. The sum-product algorithm is capable of efficiently approximating the marginal posterior probabilities desired for MAP detection and provides a unifying framework for the development of iterative receiver algorithms. However, in some applications the sum-product algorithm is computationally infeasible. Specifically, this is the case when both continuous and discrete parameters are present within the model. Also, the complexity of the sum-product algorithm is exponential in the number of variables connected to a particular factor node and can be prohibitive in multi-user and multi-antenna applications. In this dissertation we identify three key problems which can benefit from iterative probabilistic processing, but for which the sum-product algorithm is too complex. They are (1) joint synchronization and detection in multipath channels with emphasis on frame timing, (2) detection in co-channel interference and non-Gaussian noise, and (3) joint channel estimation and multi-signal detection. This dissertation presents the advances we have made in iterative probabilistic processing in order to tackle these problems. The motivation behind the work is to (a) compromise as little as possible on the performance that is achieved while limiting the computational complexity and (b) maintain good theoretical justification to the algorithms that are developed. / Ph. D.

This research addresses the performance degradation in receivers due to poor selectivity. Poor selectivity is expected to be a primary limitation on the performance of Dynamic-Spectrum-Access (DSA) and millimeter wave (mmWave) technologies. Both DSA and mmWave are highly desired technologies because they can address the spectrum-deficit problem that is currently challenging the wireless industry. Accordingly, addressing poor receiver selectivity is necessary to expedite the adoption of these technologies into the main street of wireless. This research develops two receiver design concepts to enhance the performance of poorly-selective receivers. The first concept is called cognitive RF front-end control (CogRF). CogRF operates by cognitively controlling the local-oscillator and sampling frequencies in receivers. This research shows that CogRF can fulfil the objective of pre-selectors by minimizing the effects of weak and moderately-powered neighboring-channel signals on the desired signal. This research shows that CogRF can be an alternative to high-performance pre-selectors, and hence, CogRF is a viable architecture to implement reliable DSA and mmWave receivers. The theoretical design and hardware implementation of a cognitive engine and a spectrum sensor of CogRF are reported in this dissertation. Measurement results show that CogRF significantly reduces the rate of communication outage due to interference from neighboring-channel signals in poorly-selective receivers. The results also indicate that CogRF can enable a poorly-selective receiver to behave like a highly-selective receiver. The second receiver design concept addresses very strong neighboring-channel signals. The performance of poorly selective receivers can easily suffer due to a strong, unfiltered neighboring-channel signal. A strong neighboring-channel signal is likely for a DSA radio that is operating in military radar bands. Traditionally, strong neighboring signals are addressed using an Automatic-Gain-Control (AGC) that attempt to accommodate the strong received signal into the dynamic range of the receiver. However, this technique potentially desensitizes the receiver because it sacrifices the Signal-to-Noise-Ratio (SNR) of the desired signal. This research proposes the use of auxiliary-receive path to address strong neighboring-channel signals with minimal penalty on the SNR of the desired signal. Through simulation based analysis, and hardware-based measurement, this research shows that the proposed technique can provide significant improvement in the neighboring-channel-interference handling capability of the receiver. / Ph. D.

Thesis (MScIng)--University of Stellenbosch, 2004. / ENGLISH ABSTRACT: The preliminary development of a FM radio receiver module is discussed. An existing narrowband system operating between 48MHz and 50MHz will be replaced. Digital components were investigated, compared and used with analogue techniques to build a more flexible two-way radio receiver system. A direct digital synthesizer was considered as a replacement for the current synthesized phased lock loop local oscillator and much attention was given to the local oscillator and mixer design, characteristics and measurement procedures. A detailed study of receiver systems was undertaken to determine the specifications needed for every receiver component to achieve satisfactory receiver performance in the end. Receiver characteristics as well as receiver measurement procedures are defined. A software tool was developed to aid the design process, establishing computationally whether the receiver specifications are met prior to the final design. The complete design process, from fundamental specifications through to the developed final receiver module is discussed. A modular design approach was used to guarantee easy manufacturing, substitution and testing. This approach comprises the break-down of the receiver into well defined components that are each matched to 50O. The separate components of the system were designed, measured and characterized to make it possible to replace only a single component instead of the entire system when a part becomes redundant. / AFRIKAANSE OPSOMMING: Die grondslag vir die ontwikkeling van ‘n FM radio ontvanger module word in hierdie dokument gelê. ‘n Bestaande noubandstelsel wat tussen 48MHz and 50MHz ontvang word vervang deur hierdie nuwe stelsel wat aangewend sal kan word in die bestaande tweerigtingradio se omhulsel. Digitale komponente is ondersoek, vergelyk en gebruik saam met analoogtegnieke om ‘n meer buigsame radiostelsel te bewerkstellig. ‘n Direkte digitale sintitiseerder is oorweeg as ‘n vervanging vir die huidige fasesluitlus ossillator met heelwat klem op die oscillator-en mengerontwerp, komponent spesifikasies en metingsprosedures. ‘n Diepgaande studie van ontvangerstelsels is gedoen om te bepaal wat die tipiese spesifikasies vir elke ontvangerstadium is, sodat die finale ontvanger se spesifikasies behaal kan word. Ontvanger eienskappe en meetprosedures word volledig gedefinieer. ‘n Sagtewareprogram is ontwikkel om die ontvanger-ontwerpsproses te vergemaklik deur vooraf te kan vasstel watter ontvangerspesifikasies bereik sal kan word al dan nie. Die volledige ontwerpsproses, vanaf fundamentele spesifikasies tot by die finale ontvanger word omskryf. ‘n Modulere-ontwerp prosedure is gebruik ter versekering van die maklike vervaardiging, vervanging en toetsing van elke komponent. Die radio is tydens ontwerp opgebreek in boublokkies wat elkeen aangepas word na 50O. Elke aparte boublokkie van die ontvangerstelsel is afsonderlik ontwerp, gemeet en volledig gespesifiseer om dit moontlik te maak om slegs een komponent te vervang in plaas van die hele stelsel wanneer ‘n enkele komponent nie meer beskikbaar is nie.