Global ETD Search

1	Sampling Ocsilloscope On-Chip Forsgren, Niklas January 2003 (has links) Signal-integrity degradation from such factors as supply and substrate noise and cross talk between interconnects restricts the performance advances in Very Large Scale Integration (VLSI). To avoid this and to keep the signal-integrity, accurate measurements of the on-chip signal must be performed to get an insight in how the physical phenomenon affects the signals. High-speed digital signals can be taken off chip, through buffers that add delay. Propagating a signal through buffers restores the signal, which can be good if only information is wanted. But if the waveform is of importance, or if an analog signal should be measured the restoration is unwanted. Analog buffers can be used but they are limited to some hundred MHz. Even if the high-speed signal is taken off chip, the bandwidth of on-chip signals is getting very high, making the use of an external oscilloscope impossible for reliable measurement. Therefore other alternatives must be used. In this work, an on-chip measuring circuit is designed, which makes use of the principle of a sampling oscilloscope. Only one sample is taken each period, resulting in an output frequency much lower than the input frequency. A slower signal is easier to take off-chip and it can easily be processed with an ordinary oscilloscope. Electronics sampling high-speed sampling subsampling sampling oscilloscope on-chip source follower common source sampling switch transmission gate sample and hold track and hold MOS transistor Elektronik Electronics Elektronik
2	Sampling Ocsilloscope On-Chip Forsgren, Niklas January 2003 (has links) <p>Signal-integrity degradation from such factors as supply and substrate noise and cross talk between interconnects restricts the performance advances in Very Large Scale Integration (VLSI). To avoid this and to keep the signal-integrity, accurate measurements of the on-chip signal must be performed to get an insight in how the physical phenomenon affects the signals. </p><p>High-speed digital signals can be taken off chip, through buffers that add delay. Propagating a signal through buffers restores the signal, which can be good if only information is wanted. But if the waveform is of importance, or if an analog signal should be measured the restoration is unwanted. Analog buffers can be used but they are limited to some hundred MHz. Even if the high-speed signal is taken off chip, the bandwidth of on-chip signals is getting very high, making the use of an external oscilloscope impossible for reliable measurement. Therefore other alternatives must be used. </p><p>In this work, an on-chip measuring circuit is designed, which makes use of the principle of a sampling oscilloscope. Only one sample is taken each period, resulting in an output frequency much lower than the input frequency. A slower signal is easier to take off-chip and it can easily be processed with an ordinary oscilloscope.</p> Electronics sampling high-speed sampling subsampling sampling oscilloscope on-chip source follower common source sampling switch transmission gate sample and hold track and hold MOS transistor Elektronik Electronics Elektronik
3	High Speed On-Chip Measurment Circuit / Inbyggd krets för höghastighetsmätning på chip Stridfelt, Arvid January 2005 (has links) <p>This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. </p><p>It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. The circuit is a master and slave, track-and-hold architecture incorporated with a capacitive voltage divider and a NMOS source follower as input buffer to protect the measuring node and increase the input voltage range. </p><p>This thesis presents the implementation process and the theory needed to understand the design decisions and consideration throughout the design. The results are based on transistor level simulations performed in Cadence Spectre. </p><p>The results show that it is possible to observe the analog behaviour of a high speed signal by down converting it to a lower frequency that can be brought off-chip. The trade off between capacitive load added to the measuring node and input bandwidth of the measurment circuit is also presented.</p> Electronics CMOS 0.13 sampling periodic sampling digital oscilloscope time equivalent sampling track and hold master and slave sampling clock generator voltagedivider source follower sampling switch transmission gate RLC-line Elektronik Electronics Elektronik
4	High Speed On-Chip Measurment Circuit / Inbyggd krets för höghastighetsmätning på chip Stridfelt, Arvid January 2005 (has links) This master thesis describes a design exploration of a circuit capable of measuring high speed signals without adding significant capacitive load to the measuring node. It is designed in a 0.13 CMOS process with a supply voltage of 1.2 Volt. The circuit is a master and slave, track-and-hold architecture incorporated with a capacitive voltage divider and a NMOS source follower as input buffer to protect the measuring node and increase the input voltage range. This thesis presents the implementation process and the theory needed to understand the design decisions and consideration throughout the design. The results are based on transistor level simulations performed in Cadence Spectre. The results show that it is possible to observe the analog behaviour of a high speed signal by down converting it to a lower frequency that can be brought off-chip. The trade off between capacitive load added to the measuring node and input bandwidth of the measurment circuit is also presented. Electronics CMOS 0.13 sampling periodic sampling digital oscilloscope time equivalent sampling track and hold master and slave sampling clock generator voltagedivider source follower sampling switch transmission gate RLC-line Elektronik Electronics Elektronik

1

Page generated in 0.0475 seconds