The continual development of high-power-density power electronic converters is driven particularly by modern transportation applications like electrical vehicles and more electric aircraft where the space and carrier capability is limited. However, there are several challenges related to transportation applications such as fault tolerance for safety concern, high temperature operation in extreme environments and more strict electromagnetic compatibility requirement. These challenges will increase difficulties for more electrical system adoption in the transportation applications. In this dissertation, comprehensive methodologies including more efficient energy storage solution, better power electronics devices capability, better packaging performance and more compact EMI filter design are analyzed and proposed for the goal of high power density converter design in transportation applications. / Ph. D.

Catalysts consisting of silver on α-Al₂O₃, α-SiC, and β-SiC supports were synthesized and tested for catalytic performance in the gas-phase direct oxidation of ethylene to ethylene oxide. For this study, which used no promoters, ethylene oxidation selectivity of SiC-supported catalysts ranged from 10 to 60% and conversion from 0-4.5%. Silicon carbide supported catalysts exhibited poor performance except for a surface-modified β-SiC-supported catalyst, which demonstrated conversion and selectivity similar to that of an α-Al₂O₃-supported catalyst. This Ag/β-SiC catalyst was further investigated with a kinetic study, and the reaction orders were found to be 0.18 with respect to ethylene and 0.34 with respect to oxygen. The kinetic results were consistent with Langmuir-Hinshelwood rate expressions developed from single-site and dual-site reaction mechanisms. Gold nanoparticles on titanium oxide and titania-silica supports are active for the formation of propylene oxide by the oxidation of propylene with hydrogen and oxygen mixtures. This study investigates the effect of cyanide treatment on gold supported on titanosilicate zeolite supports (Au/TS-1). Catalysts treated with weak solutions of sodium cyanide resulted in preferential removal of small gold particles, while catalysts treated with strong solutions resulted in dissolution of the gold and re-precipitation as gold (+1) cyanide. X-ray absorption spectroscopy demonstrated that catalysts which produce propylene oxide in the presence of hydrogen and oxygen mixtures had supported gold (+3) oxide nanoparticles of 3 nm size after synthesis, which were reduced to gold metal at reaction conditions. Samples treated with strong solutions of sodium cyanide resulted in supported gold (+1) cyanide particles of large size, 9-11 nm. These particles did not produce propylene oxide but, surprisingly, showed high selectivity toward propylene hydrogenation. Increasing gold (+1) cyanide particle size resulted in a decrease in hydrogenation activity. TS-1 and Au/TS-1 surfaces were studied with laser Raman spectroscopy. Surface fluorescence was substantially reduced with a low-temperature ozone treatment, allowing observation of titanosilicate framework bands. Hydrocarbon vibrations are observed for TS-1 and Au/TS-1 under propylene. Density functional theory models indicated that propylene adsorbed to a metal site along the Ï bond would show a Raman spectrum very similar to gas-phase propylene except for out-of-plane C-H vibrations, which would be moved to higher energy. This adsorption spectrum, with out-of-plane vibrations shifted to higher energy, was observed for both TS-1 and Au/TS-1. Langmuir adsorption isotherms were generated for both TS-1 and Au/TS-1, and a scaling factor derived from propylene uptake experiments allowed these isotherms to be scaled to propylene coverage of titanium. / Ph. D.

This dissertation presents control, analysis, and design of silicon carbide (SiC)-based critical conduction mode (CRM) high-frequency soft-switching three-phase ac-dc converters (inverter and rectifier). The soft-switching technique with SiC devices grounded in CRM makes the operation of the ac-dc converter at hundreds of kHz possible while maintaining high efficiency with high power density. This is beneficial for rapidly growing fields such as electric vehicle charging, photovoltaic (PV) systems, and uninterruptable power supplies, etc. However, for the soft-switching technique to be practically adopted to real products in the markets, there are a lot of challenges to overcome. In this dissertation, four types of the challenges are carefully studied and discussed to address them. First, the grid-tied inverters used for distributed energy resources, such as PV systems, must continue operating to deliver power to the grid, when it faces flawed grid conditions such as voltage drop and voltage rise. During abnormal grid conditions, delivering constant active power from the inverter to the grid is essential to avoid large voltage ripples on the dc side because it could trigger over-voltage protection or harm the circuitries, eventually shutting down the inverter. Hence, in such cases, unbalanced ac currents need to be injected into the grid. When the grid voltages and the ac currents are not balanced, there is a chance for the CRM soft-switching inverter to lose its soft-switching capability. Continuous conduction mode operation emerges, causing hard-switching where discontinuous conduction mode (DCM) operation is expected. This leads to huge turn-on loss and high dv/dt noise at the active switch's turn-on moment. To eradicate the hard-switching problem, two improved modulation schemes are developed; one with off-time extension in the CRM phase, the other by skipping switching pulses in the DCM phase. The DCM pulse skipping is applied for a variety of grid imbalance cases, and it is proven that it can be a generalized solution for any kinds of unbalanced grid conditions. Second, the CRM soft-switching scheme with 2-channel interleaving achieves high efficiency at heavy load. Nevertheless, the efficiency plunges as the output load is reduced. This is not suitable for PV inverters, which take account of light load efficiency in terms of "weighted efficiency". Small inductor currents at light load cause the switching frequency to soar because of its CRM-based operation characteristic, causing large switching loss. To increase the inductor current dealt with by the first channel, a phase shedding control is proposed. Gate signals for the second channel are not excited, increasing the first channel's inductor current, thus cutting down the first channel's switching frequency. To prevent the unwanted circulating current formed by shared zero-sequence voltage in the paralleled structure, only two phases in the second channel working in high frequency are shed. The proposed phase shedding control achieves a 0.5 to 3.9 % efficiency improvement with light loads. Third, due to the usage of SiC devices, high dv/dt generated at switching nodes over the system parasitic capacitance causes substantial common mode (CM) noise compared to that with Si devices. In this case, a balance technique with PCB winding inductors can effectively reduce the CM noise. First, winding interleaving structure is selected to minimize the eddy current loss in the windings. But the interwinding capacitance caused by the winding interleaving structure aggravates the CM noise. Impact of the interwinding capacitance on the CM noise is analyzed with a new inductor model containing the interwinding capacitance. Then, finally, a novel inductor structure is proposed to remove the interwinding capacitance and to improve the CM noise reduction performance. The soft-switching ac-dc converter built with the final PCB magnetics features almost similar efficiency compared to that with litz-wire inductor and 14 to 18 dB CM noise reduction up to 15 MHz. Lastly, the soft-switching technique is extended to inverters in standalone mode. To meet tight ac voltage total harmonic distortion requirements, a current control in dq-frame is introduced. As for the ac voltage regulation at no-load, on top of the improved phase shedding control, a frequency limiting with fixed frequency DCM method is applied to prevent excessive increase in the switching frequency. Then, how to deal with short-circuit at the output load is investigated. Since the soft-switching modulation violates inductor voltage-second balance during the short-circuit, the modulation method is switched to a conventional sinusoidal PWM at fixed frequency. It is concluded that all the additional requirements for the standalone inverters can be satisfied by the introduced control strategies. / Doctor of Philosophy / The world is facing an unprecedented weather crisis. Global warming is getting more severe because of excessive amount of carbon emission. In an effort to overcome this crisis, paradigm of energy and lifestyle of people have changed. Penetration of distributed energy resources (DERs) such as wind turbines, and photovoltaic systems has been dramatically increased. Instead of internal combustion engine vehicles (EVs), electric vehicles hit the mainstream. In these changes, power electronics plays a critical role as the key element of the systems. Especially, three-phase inverter/rectifiers are essential parts in such applications. Most important aspects of the three-phase inverter/rectifier are efficiency and power density. In the past decades, Silicon (Si) power devices were mostly used for the systems and the technology based on Si has almost reached to its physical limits. The switching frequency of Si-based inverter/rectifier is limited below 20 – 30 kHz to reduce switching loss. This impedes high power density due to bulky passive components such as inductors and capacitors. Nowadays, the advent of wideband gap such as Silicon Carbide (SiC) and Gallium Nitride (GaN) power devices gives us a great opportunity to improve the efficiency and the power density with its high switching speed capability, low switching energy and low on-resistance. The SiC power devices are more suitable for DERs and EVs due to higher voltage rating. Using SiC power devices allows to increase inverter/rectifier' switching frequency about five times to have similar efficiency with those based on Si power devices, making the power density high. However, there is still room to push the switching frequency even higher to hundreds of kHz with soft-switching. In this sense, studies on soft-switching techniques for three-phase inverter/rectifier have been intensively conducted. Particularly, soft-switching techniques based on critical conduction mode (CRM) are regarded as the most promising solutions because it does not have any additional circuits to achieve the soft-switching, keeping the system as straightforward as possible. However, most of the studies for the CRM-based soft-switching three-phase inverter/rectifier mainly focus on limited occasions such as ideal operation conditions. For this technique to be widely used and adopted in industry, more practical cases for the systems need to be studied. In this dissertation, the soft-switching three-phase inverter/rectifier under diverse situations are investigated in depth. First, behavior of the soft-switching inverter/rectifier under unbalanced grid conditions are analyzed and control methods are developed to maintain its soft-switching capability. Second, how to improve light load efficiency is explored. Circulating current issue for the light load efficiency improvement is analyzed and a control method is proposed to eliminate the circulating current. Third, a design methodology and considerations of inductors based on PCB magnetics are discussed to reduce electromagnetic noise and improve system efficiency. Lastly, the soft-switching technique is extended to standalone mode applications dealing with strict voltage regulation, no-load operation, and output short-circuit.

The emergence of silicon-carbide (SiC) devices has been a 'game changer' in the field of power electronics. With desirable material properties such as low-loss characteristics, high blocking voltage, and high junction temperature operation, they are expected to drastically increase the power density of power electronics systems. Recent state-of-the-art designs show the power density over 17 ; however, certain factors limit the power density to increase beyond this limit. In this dissertation, three key factors are selected to increase the power density of SiC-based grid-connected three-phase converters. Throughout this dissertation, the techniques and strategies to increase the power density of SiC three-phase converters were investigated. Firstly, a magnetic integration method was introduced for the coupled inductors in the interleaved three-phase converters. Due to limited current-capacity compared to the silicon insulated-gate bipolar transistors (Si-IGBTs), discrete SiC devices or SiC modules, operate in parallel to handle a large current. When three-phase inverters are paralleled, interleaving can be used, and coupled inductors are employed to limit the circulating current. In Chapter 2, the conventional integration method was extended to integrate three coupled inductors into two; one for differential-mode circulating current and the other for common-mode circulating current. By comparing with prior research work, a 20% reduction in size and weight is demonstrated. From Chapter 3 to Chapter 5, a full-SiC uninterruptible power supply (UPS) was investigated. With the high switching frequency and fast switching dynamics of SiC devices, strategies on electromagnetic inference become more important, compared to Si-IGBT based inverters. Chapter 3 focuses on a common-mode equivalent circuit model for a topology and pulse width modulation (PWM) scheme selection, to set a noise mitigation strategy in the design phase. A three terminal common-mode electromagnetic interference (EMI) model is proposed, which predicts the impact of the dc-dc stage and a large battery-rack on the output CM noise. Based on the model, severe deterioration of noise by the dc-dc stage and battery-rack can be predicted. Special attention was paid on the selection of the dc-dc stage's topology and the PWM scheme to minimize the impact. With the mitigation strategy, a maximum 16 dB reduction on CM EMI can be achieved for a wide frequency range. In Chapter 4, an active PWM scheme for a full-SiC three-level back-to-back converter was proposed. The PWM scheme targets the size reduction of two key components: dc-link capacitors and a common-mode EMI filter. The increase in switching frequency calls for a large common-mode EMI filter, and dc-link capacitors in the three-level topology may take a considerable portion in the total volume. To reduce the common-mode noise emission, different combinations of the voltage vectors are investigated to generate center-aligned single pulse common-mode voltage. By such an alignment of common-mode voltage with different vector combinations, noise cancellation between the rectifier and the inverter can be maximally utilized, while the balancing of neutral point voltage can be achieved by the transition between the combinations. Also, to reduce the size of the dc-link capacitor for the three-level back-to-back converter, a compensation algorithm for neutral point voltage unbalance was developed for both differential-mode voltage and the common-mode voltage of the ac-ac stage. The experimental results show a 4 dB reduction on CM EMI, which leads to a 30% reduction on the required CM inductance value. When a 10% variation of neutral point voltage can be handled, the dc-link capacitance can be reduced by 56%. In Chapter 5, a 20 kW full-SiC UPS prototype was built to demonstrate a possible size-reduction with the proposed PWM scheme, as well as a selection of topologies and PWM schemes based on the model. The power density and efficiency are compared with the state-of-the-art Si-IGBT based UPSs. Chapter 6 seeks to improve power density by a change in a modulation method. Triangular conduction mode (TCM) operation of the three-level full-SiC inverter was investigated. The switching loss of SiC devices is reported to be concentrated on the turn-on instant. With zero-voltage turn-on of all switches, the switching frequency of a three-level three-phase SiC inverter can be drastically increased, compared to the hard-switching operation. This contributes to the size-reduction of the filter inductors and EMI filters. Based on the design to achieve a 99% peak efficiency, a comparison was made with a full-SiC three-level inverter, operating in continuous conduction mode (CCM), to verify the benefit of the soft switching scheme on the power density. A design procedure for an LCL filter of paralleled TCM inverters was developed. With 3.5 times high switching frequency, the total weight of the filter stage of the TCM inverter can be reduced by 15%, compared to that of the CCM inverter. Throughout this dissertation, techniques for size reduction of key components are introduced, including coupled inductors in parallel inverters, an EMI filter, dc-link capacitors, and the main boost inductor. From Chapter 2 to 5, the physical size or required value of these key components could be reduced by 20% to 56% by different schemes such as magnetic integration, EMI mitigation strategy through modeling, and an active PWM scheme. An optimization result for a full-SiC UPS showed a 40% decrease in the total volume, compared to the state-of-the-art Si-IGBT solution. Soft-switching modulation for SiC-based three-phase inverters can bring a significant increase in the switching frequency and has the potential to enhance power-density notably. A three-level three-phase full-SiC 40 kW PV inverter with TCM operation contributed to a 15% reduction on the filter weight. / Doctor of Philosophy / The power density of a power electronics system is regarded as an indicator of technological advances. The higher the power density of the power supply, the more power it can generate with the given volume and weight. The size requirement on power electronics has been driven towards tighter limits, as the dependency on electric energy increases with the electrification of transportation and the emergence of grid-connected renewable energy sources. However, the efficiency of a power electronics system is an essential factor and is regarded as a trade-off with the power density. The size of power electronics systems is largely impacted by its magnetic components for filtering, as well as its cooling system, such as a heatsink. Once the switching frequency of power semiconductors is increased to lower the burden on filtering, more loss is generated from filters and semiconductors, thus enlarging the size of the cooling system. Therefore, considering the efficiency has to be maintained at a reasonable value, the power density of Si-based converters appears to be saturated. With the emergence of wide-bandgap devices such as silicon carbide (SiC) or gallium nitride (GaN), the switching frequency of power devices can be significantly increased. This is a result of superior material properties, compared to Si-based power semiconductors. For grid-connected applications, SiC devices are adopted, due to the limitations of voltage ratings in GaN devices. Before commercial SiC devices were available, the power density of SiC- based three-phase inverters was expected to go over 20 𝑘𝑊 𝑑𝑚3 ⁄ . However, the state-of-the art designs shows the power density around 3 ~ 4 𝑘𝑊 𝑑𝑚3 ⁄ , and at most 17 𝑘𝑊 𝑑𝑚3 ⁄ . The SiC devices could increase the power density, but they have not reached the level expected. The adoption of SiC devices with faster switching was not a panacea for power density improvement. This dissertation starts with an analysis of the factors that prevent power density improvement of SiC-based, grid-connected, three-phase inverters. Three factors were identified: a limited increase in the switching frequency, large high-frequency noise generation to be filtered, and smaller but still significant magnetic components. Using a generic design procedure for three-phase inverters, each chapter seeks to frame a strategy and develop techniques to enhance the power density. For smaller magnetic components, a magnetic integration scheme is proposed for paralleled ac-dc converters. To reduce the size of the noise filter, an accurate modeling approach was taken to predict the noise phenomena during the design phase. Also, a modulation scheme to minimize the noise generation of the ac-ac stage is proposed. The validity of the proposed technique was verified by a full-SiC three-phase uninterruptible power supply with optimized hardware design. Lastly, the benefit of soft-switching modulation, which leads to a significant increase in switching frequency, was analyzed. The hardware optimization procedure was developed and compared to hard-switched three-phase inverters.

The emergence of wide-bandgap-based (WBG) devices, such as silicon carbide (SiC) and gallium nitride (GaN), have unveiled unprecedented opportunities, enabling the realization of superior power conversion systems. Among the potential areas of advancement are medium-voltage (MV) and high-voltage (HV) applications, due to the growing demand for high-power-density and high-efficiency power electronics converters. These advancements have propelled a wide adoption of electric vehicles (EV), which in the future will require great improvements in the charging time of these vehicles. Thereby, this thesis attempts to address such a challenge and bring about technological improvements, enabling faster, more efficient, and more effective ways of charging an electric vehicle through the application of MV 3.3 kV SiC MOSFETs. The current fast-charging solution involves heavy and bulky MV-LV transformers, which add installation complexity for EV charging stations. However, this thesis presents an alternative power-delivery solution utilizing an MV dual-active-bridge (DAB) converter. The proposed architecture is designed to directly interface with the MV grid for high-power, fast-charging capabilities while eliminating the need for an installation of the MV-LV transformer. The MV DAB converter utilizes 3.3 kV SiC MOSFETs to realize the next 800 V EV charging system, along with an extended zero-voltage-switching (ZVS) scheme, in order to provide an efficient charging strategy across a wide range of battery voltage levels. Lastly, a detailed design comparison analysis of an MV Flyback converter, targeted for the auxiliary power supply for the proposed MV EV charging architecture, is presented. / The field of power electronics, which controls and manages the conversion of electrical energy, is an important topic of discussion, as new technologies like electric vehicles (EV) are quickly emerging and disrupting the current status-quo of vehicle-choice. In order to promote timely and extensive adoption of such an enabling EV technology, it is critical to understand the current challenges involving EV charging stations and seek out opportunities to engender future innovations. Indeed, wide-bandgap (WBG) devices, such as silicon carbide (SiC) and gallium nitride (GaN), have unveiled unprecedented opportunities in enabling the realization of superior power conversion systems. Thus, utilizing these WGB devices in EV charging applications can bring about improved design and development of EV fast chargers that are faster-charging, more efficient, and more effective. Hence, this thesis presents an opportunity in EV charging station applications with the utilization of medium-voltage SiC MOSFETs. Because the current fast-charging solution involves a heavy and bulky transformer, it adds installation complexity for EV charging stations. However, this thesis presents an alternative power-delivery solution that could potentially provide an efficient and fast-charging mechanism of EVs while reducing the size of EV chargers. All things considered, this thesis provides in-depth evaluation-studies of medium-voltage 3.3 kV SiC MOSFET-based power converters, targeted for future fast EV charging applications. The development and design of the hardware prototype is presented in this thesis, along with testing and verification of experimental results.

The increasing shift towards more electric or all electric aircraft urgently necessitates dc/ac converter systems with high power density. Silicon Carbide (SiC) devices, known for their superior performance over traditional silicon-based devices, facilitate this increase in power density. Nonetheless, achieving optimal power density faces challenges due to the unique requirements and conditions of aircraft applications. A primary obstacle is optimizing the topology and parameters of the dc/ac converter system to achieve high power density while adhering to the stringent aerospace EMI standard DO-160 and bearing current limitations. Electric aircraft demand unmatched reliability, necessitating strict control over EMI noise and bearing currents. These considerations significantly impact the selection of topology and parameters to maximize power density. This dissertation assesses how dc voltage, topology, and switching frequency affect component weight, seeking an optimal mix to enhance power density. The methodology and conclusions are validated through a 200-kW motor drive system designed for electric aircraft. Moreover, traditional dc/ac systems are burdened by the weight and space occupied by separate current sensors and short-circuit protection circuits. This work introduces two innovative current sensors that integrate device current sampling with the functionality of traditional shunt resistors, AC hall sensors, and short-circuit protection circuits, thus improving system density and bandwidth. The first sensor, a PCB-based Rogowski coil, integrates with the gate driver and commutation loops, enhancing power density despite challenges in managing CM noise. The second sensor utilizes parasitic inductance in the power loop, with an integrator circuit and an adaptive compensation algorithm correcting errors from parasitic resistance, ensuring high bandwidth accuracy without needing parasitic resistance information. Variable operation conditions from motors pose another challenge, potentially leading to oversized inverters due to uneven loss distribution among switching devices, exacerbated at extreme operating points like motor start-up. This dissertation investigates the loss distribution in multi-level T-Type neutral point clamped (NPC) topology and proposes a novel loss-balance modulation scheme. This scheme ensures even loss distribution across switches, independent of power factor and modulation index, and is applicable to T-type inverters of any level count. Finally, thermal management and insulation at high altitudes present significant challenges. While power devices may be cooled using conventional liquid cooling solutions, components like AC and EMI filters struggle with complex geometries that can create hot spots or high E-field points, complicating filter design for high current applications. A comprehensive design and optimization methodology based on planar heavy-copper PCB design is proposed. By utilizing flexible 2D or 3D E-field shaping and maximizing thermal transfer from copper to ambient, this methodology significantly improves power density and ensures effective heat dissipation and insulation at altitudes up to 50,000 feet. / Doctor of Philosophy / The increasing shift towards more electric or all electric aircraft urgently necessitates dc/ac converter systems with high power density. Silicon Carbide (SiC) devices, known for their superior performance over traditional silicon-based devices, facilitate this increase in power density. Nonetheless, achieving optimal power density faces challenges due to the unique requirements and conditions of aircraft applications. A primary obstacle is optimizing the topology and parameters of the dc/ac converter system to achieve high power density while adhering to the stringent aerospace EMI standard DO-160 and bearing current limitations. Electric aircraft demand unmatched reliability, necessitating strict control over EMI noise and bearing currents. These considerations significantly impact the selection of topology and parameters to maximize power density. This dissertation assesses how dc voltage, topology, and switching frequency affect component weight, seeking an optimal mix to enhance power density. The methodology and conclusions are validated through a 200-kW motor drive system designed for electric aircraft. Moreover, traditional dc/ac systems are burdened by the weight and space occupied by separate current sensors and short-circuit protection circuits. This work introduces two innovative current sensors that integrate device current sampling with the functionality of traditional shunt resistors, AC hall sensors, and short-circuit protection circuits, thus improving system density and bandwidth. The first sensor, a PCB-based Rogowski coil, integrates with the gate driver and commutation loops, enhancing power density despite challenges in managing CM noise. The second sensor utilizes parasitic inductance in the power loop, with an integrator circuit and an adaptive compensation algorithm correcting errors from parasitic resistance, ensuring high bandwidth accuracy without needing parasitic resistance information. Variable operation conditions from motors pose another challenge, potentially leading to oversized inverters due to uneven loss distribution among switching devices, exacerbated at extreme operating points like motor start-up. This dissertation investigates the loss distribution in multi-level T-Type neutral point clamped (NPC) topology and proposes a novel loss-balance modulation scheme. This scheme ensures even loss distribution across switches, independent of power factor and modulation index, and is applicable to T-type inverters of any level count. Finally, thermal management and insulation at high altitudes present significant challenges. While power devices may be cooled using conventional liquid cooling solutions, components like AC and EMI filters struggle with complex geometries that can create hot spots or high E-field points, complicating filter design for high current applications. A comprehensive design and optimization methodology based on planar heavy-copper PCB design is proposed. By utilizing flexible 2D or 3D E-field shaping and maximizing thermal transfer from copper to ambient, this methodology significantly improves power density and ensures effective heat dissipation and insulation at altitudes up to 50,000 feet.

Doctor of Philosophy / Department of Industrial & Manufacturing Systems Engineering / Zhijian Pei / Titanium alloy is one of the most important materials used in major segments of industries such as aerospace, automobile, sporting goods, medical and chemical. Market survey has stated that the titanium shipment in the USA has increased significantly in last two decades, indicating its increased usage. Industries are always under tremendous pressure to meet the ever-increasing demand to lower cost and improve quality of the products manufactured from titanium alloy. Similar to titanium alloys, silicon carbide and dental ceramics are two important materials used in many applications. Rotary ultrasonic machining (RUM) is a non-traditional machining process that combines the material removal mechanisms of diamond grinding and ultrasonic machining. It comprises of a tool mounted on a rotary spindle attached to a piezo-electric transducer to produce the rotary and ultrasonic motion. No study has been reported on RUM of titanium alloy, silicon carbide and dental ceramics. The goal of this research was to provide new knowledge of machining these hard-to-machine materials with RUM for further improvements in the machining cost and surface quality. A thorough research has been conducted based on the feasibility study, effects of tool variables, effects of machining variables and wheel wear mechanisms while RUM of titanium alloy. The effects of machining variables (such as spindle speed, feed rate, ultrasonic vibration power) and tool variables (grit size, diamond grain concentration, bond type) have been studied on the output variables (such as cutting force, material removal rate, surface roughness, chipping size) and the wheel wear mechanisms for titanium alloy. Feasibility of machining silicon carbide and dental ceramics is also conducted along with a designed experimental study.

Résumé : L’isolation thermique est essentielle dans de nombreux types de MEMS (micro-systèmes électro-mécaniques). Elle permet de réduire la consommation d’énergie, améliorer leurs performances, ou encore isoler la zone chaude du reste du dispositif, ce qui est essentiel dans les systèmes sur puce. Il existe quelques matériaux et techniques d’isolation pour les MEMS, mais ils sont limités. En effet, soit ils ne proposent pas un niveau d’isolation suffisant, sont trop fragiles, ou imposent des contraintes trop importantes sur la conception du dispositif et sont difficiles à intégrer. Une approche intéressante pour l’isolation, démontrée dans la littérature, est de fabriquer des pores de taille nanométrique dans le silicium par gravure électrochimique. En nanostructurant le silicium ainsi, on peut diviser sa conductivité thermique par un facteur de 100 à 1000, le transformant en isolant thermique. Cette solution est idéale pour l’intégration dans les procédés de fabrication existants des MEMS, car on garde le silicium qui est déjà utilisé pour leur fabrication, mais en le nanostructurant localement, on le rend isolant là où on en a besoin. Par contre sa porosité cause des problèmes : mauvaise résistance chimique, structure instable au-delà de 400°C, et tenue mécanique réduite. La facilité d’intégration des semiconducteurs poreux est un atout majeur, nous visons donc de réduire les désavantages de ces matériaux afin de favoriser leur intégration dans des dispositifs en silicium. Nous avons identifié deux approches pour atteindre cet objectif : i) améliorer le Si poreux ou ii) développer un nouveau matériau. La première approche consiste à amorphiser le Si poreux en l’irradiant avec des ions à haute énergie (uranium, 110 MeV). Nous avons montré que l’amorphisation, même partielle, du Si poreux entraîne une diminution de sa conductivité thermique, sans endommager sa structure poreuse. Cette technique réduit sa conductivité thermique jusqu’à un facteur de trois, et peut être combinée avec une pré-oxydation afin d’atteindre une réduction d’un facteur cinq. Donc cette méthode permet de réduire la porosité du Si poreux, et d’atténuer ainsi les problèmes de fragilité mécanique causés par la porosité élevée, tout en gardant un niveau d’isolation égal. La seconde approche est de développer un nouveau matériau. Nous avons choisi le SiC poreux : le SiC massif a des propriétés physiques supérieures à celles du Si, et donc à priori le SiC poreux devrait conserver cette supériorité. La fabrication du SiC poreux a déjà été démontrée dans la littérature, mais avec peu d’études détaillées du procédé. Sa conductivité thermique et tenue mécanique n’ont pas été caractérisées, et sa tenue en température que de façon incomplète. Nous avons mené une étude systématique de la porosification du SiC en fonction de la concentration en HF et le courant. Nous avons implémenté un banc de mesure de la conductivité thermique par la méthode « 3 oméga » et l’avons utilisé pour mesurer la conductivité thermique du SiC poreux. Nous avons montré qu’elle est environ deux ordres de grandeur plus faible que celle du SiC massif. Nous avons aussi montré que le SiC poreux est résistant à tous les produits chimiques typiquement utilisés en microfabrication sur silicium. D’après nos résultats il est stable jusqu’à au moins 1000°C et nous avons obtenu des résultats qualitatifs encourageants quant à sa tenue mécanique. Nos résultats signifient donc que le SiC poreux est compatible avec la microfabrication, et peut être intégré dans les MEMS comme isolant thermique. // Abstract : Thermal insulation is essential in several types of MEMS (micro electro-mechanical systems). It can help reduce power consumption, improve performance, and can also isolate the hot area from the rest of the device, which is essential in a system-on-chip. A few materials and techniques currently exist for thermal insulation in MEMS, but these are limited. Indeed, either they don’t have provide a sufficient level of insulation, are too fragile, or restrict design of the device and are difficult to integrate. A potentially interesting technique for thermal insulation, which has been demonstrated in the literature, is to make nanometer-scale pores in silicon by electrochemical etching. By nanostructuring silicon in this way, its thermal conductivity is reduced by a factor of 100 to 1000, transforming it into a thermal insulator. This solution is ideal for integration in existing MEMS fabrication processes, as it is based on the silicon substrates which are already used for their fabrication. By locally nanostructuring these substrates, silicon is made insulating wherever necessary. However the porosity also causes problems : poor chemical resistance, an unstable structure above 400◦C, and reduced mechanical properties. The ease of integration of porous semiconductors is a major advantage, so we aim to reduce the disadvantages of these materials in order to encourage their integration in silicon-based devices. We have pursued two approaches in order to reach this goal : i) improve porous Si, or ii) develop a new material. The first approach uses irradiation with high energy ions (100 MeV uranium) to amorphise porous Si. We have shown that amorphisation, even partial, of porous Si leads to a reduction of its thermal conductivity, without damaging its porous structure. This technique can reduce the thermal conductivity of porous Si by up to a factor of three, and can be combined with a pre-oxidation to achieve a five-fold reduction of thermal conductivity. Therefore, by using this method we can use porous Si layers with lower porosity, thus reducing the problems caused by the fragility of high-porosity layers, whilst keeping an equal level of thermal insulation. The second approach is to develop a new material. We have chosen porous SiC: bulk SiC has exceptional physical properties and is superior to bulk Si, so porous SiC should be superior to porous Si. Fabrication of porous SiC has been demonstrated in the literature, but detailed studies of the process are lacking. Its thermal conductivity and mechanical properties have never been measured and its high-temperature behaviour has only been partially characterised. We have carried out a systematic study of the effects of HF concentration and current on the porosification process. We have implemented a thermal conductivity measurement setup using the “3 omega” method and used it to measure the thermal conductivity of porous SiC. We have shown that it is about two orders of magnitude lower than that of bulk SiC. We have also shown that porous SiC is chemically inert in the most commonly used solutions for microfabrication. Our results show that porous SiC is stable up to at least 1000◦C and we have obtained encouraging qualitative results regarding its mechanical properties. This means that porous SiC is compatible with microfabrication processes, and can be integrated in MEMS as a thermal insulation material.

This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to the SiC junction field-effect transistor (JFET) and the metal-oxide semiconductor field-effect transistor (MOSFET). The potential of employing SiC power devices in applications, ranging from induction heating to high-voltage direct current (HVDC), is presented. The theory behind the state-of-the-art dual-source (2SRC) base driver that was presented by Rabkowski et al. a few years ago is described. This concept of proportional base drivers is introduced with a focus on the discretized proportional base drivers (DPBD). By implementing the DPBD concept and building a prototype it is shown that the steady-state consumption of the base driver can be reduced considerably.  The aspects of the reverse conduction of the SiC BJT are presented. It is shown to be of importance to consider the reduced voltage drop over the base-emitter junction. Last the impact of SiC unipolar and bipolar devices in series-resonant (SLR) converters is presented. Two full-bridges are designed and constructed, one with SiC MOSFETs utilizing the body diode for reverse conduction during the dead-time, and the second with SiC BJTs with anti-parallel SiC Schottky diodes. It is found that the SiC power devices, with their absence of tail current, are ideal devices to fully utilize the soft-switching properties that the SLR converters offer. The SiC MOSFET benefits from its possibility to utilize reverse conduction with a low voltage drop. It is also found that the size of capacitance of the snubbers can be reduced compare to state-of-the-art silicon technology. High switching frequencies of 200 kHz are possible while still keeping the losses low. A dead-time control strategy for each device is presented. The dual control (DuC) algorithm is tested with the SiC devices and compared to frequency modulation (FM). The analytical investigations presented in this thesis are confirmed by experimental results on several laboratory prototype converters. / <p>QC 20150529</p>

Ce travail porte sur la caractérisation structurale et optique d'échantillons de SiC. Les échantillons étudiés ont été répartis en trois groupes : des échantillons massifs, des couches épitaxiales épaisses et enfin des couches minces. La croissance des échantillons massifs a été réalisée avec la technique CF-PVT, utilisant une géométrie « d'étranglement ». L'objectif était de filtrer les défauts afin de créer des germes de 3C de haute pureté. La croissance de des couches épaisses par sublimation avait comme objectif la maitrise d'un dopage résiduel faible de type n et p pour des applications composants. Enfin, dans le but de réaliser des composants de type LED blanche des impuretés Ga ont été introduites dans des couches minces épitaxiées par VLS afin de créer des échantillons fortement dopé de type p. Tous ces échantillons ont été étudiés par photoluminescence, micro-Raman, SIMS et microscopie électronique à transmission. Il a été possible de déterminer la concentration d'impuretés et d'identifier le caractère n ou p de ces échantillons. L'analyse des échantillons a été faite en utilisant à la fois l'observation des défauts structurels et les informations obtenues à partir des techniques de caractérisation optique. Nous avons pu obtenir des informations sur les paramètres physiques de 3C-SiC, comme l'énergie de liaison de Ga et Al, la structure fine des excitons liés à l'Al et celle des paires donneurs accepteurs Al-N et Ga-N. Enfin l'apparition d'un nouveau défaut de structure appelée le « fourfold twin » a été observée. / The main topic of this thesis is the structural and optical characterization of SiC samples. The samples were divided in three groups: bulk, thick and thin epilayers. The bulk samples were grown with the CF-PVT technique and used a modified crystal holder geometry. The objective was to filter the defects to and create high purity and quality seeds of 3C-SiC. The thick epilayers were grown with the sublimation epitaxy technique, trying to demonstrate the creation of low impurity n and p type layers for device applications. Finally the thin epilayers were grown with the vapour-liquid-solid technique and doped with Ga impurities in an effort to create either heavily p-type doped samples and components for white LED applications. The samples were studied with low temperature photoluminescence, micro-Raman, SIMS and transmission electron microscopy. With the help of these techniques it was possible to determine the impurity concentration and identif y the n or p character of these samples. A qualitative analysis of the quality of the samples was done using both the observation of the structural defects and the information from the optical characterization techniques. We were able to acquire information about physical parameters of 3C-SiC like the binding energy of Ga and Al, the Al bound exciton fine structure and the Al-N and Ga-N donor acceptor pair fine structure. The appearance of a new structural defect called the fourfold twin was observed and presented.