The study designs and constructs a three-phase to three-phase direct AC&ndash / AC matrix converter based surface mounted permanent magnet synchronous motor (PMSM) drive system. First, the matrix converter topologies are analyzed and the state-space equations describing the system have been derived in terms of the input and output variables. After that, matrix converter commutation and modulation methods are investigated. A four-step commutation technique based on output current direction provides safe commutation between the matrix converter switches. Then, the matrix converter is simulated for both the open-loop and the closed-loop control. For the closed-loop control, a current regulator (PI controller) controls the output currents and their phase angles. Advanced pulse width modulation and control techniques, such as space vector pulse width modulation and field oriented control, have been used for the closed-loop control of the system. Next, a model of diode-rectified two-level voltage source inverter is developed for simulations. A comparative study of indirect space vector modulated direct matrix converter and space vector modulated diode-rectified two-level voltage source inverter is given in terms of input/output waveforms to verify that the matrix converter fulfills the two-level voltage source inverter operation. Following the verification of matrix converter operation comparing with the diode-rectified two-level voltage source inverter, the simulation model of permanent magnet motor drive system is implemented. Also, a direct matrix converter prototype is constructed for experimental verifications of the results. As a first step in experimental works, filter types are investigated and a three-phase input filter is constructed to reduce the harmonic pollution. Then, direct matrix converter power circuitry and gate-driver circuitry are designed and constructed. To control the matrix switches, the control algorithm is implemented using a DSP and a FPGA. This digital control system measures the output currents and the input voltages with the aid of sensors and controls the matrix converter switches to produce the required PWM pattern to synthesize the reference input current and output voltage vectors, as well. Finally, the simulation results are tested and supported by laboratory experiments involving both an R-L load and a permanent magnet synchronous motor load. During the tests, the line-to-line supply voltage is set to 26 V peak value and a 400 V/3.5 kW surface mounted permanent magnet motor is used.

Submitted by Emanuel Varela Cardoso (emanuel.varela@ufcg.edu.br) on 2018-05-08T00:11:48Z No. of bitstreams: 1 NAYARA BRANDÃO DE FREITAS – DISSERTAÇÃO (PPGEE) 2016.pdf: 3718233 bytes, checksum: f4f88b8a316139fc246558ded5f688d9 (MD5) / Made available in DSpace on 2018-05-08T00:11:48Z (GMT). No. of bitstreams: 1 NAYARA BRANDÃO DE FREITAS – DISSERTAÇÃO (PPGEE) 2016.pdf: 3718233 bytes, checksum: f4f88b8a316139fc246558ded5f688d9 (MD5) Previous issue date: 2016-06-23 / O tema desenvolvido consiste no estudo, caracterização e análise de conversores multiníveis CA/CC/CA monofásicos/monofásicos, monofásicos/bifásicos e monofásicos/trifásicos aplicados a sistemas de conversão e compensação de energia, empregando IGBTs (Transistor Bipolar de Porta isolada) como dispositivos semicondutores. No decorrer do trabalho, diversas topologias são analisadas e comparadas utilizados critérios como quantidade de barramentos CC, valores das tensões dos barramentos CC, WTHD (Distorção Harmônica Total Ponderada) das tensões chaveadas, frequências de chaveamentos dos IGBTs e perdas por condução e chaveamento. Os sistemas de controle das variáveis dos conversores estudados são apresentados e o controle individual dos barramentos CC é abordado com destaque. Implementações experimentais foram utilizadas para comprovar a teoria apresentada e mostrar a viabilidade dos sistemas. / This work consists in the study, characterization, anda analysis of AC/DC/AC multilevel converters are applied to conversion and compensation systems and employ and IGBTs (Insulated Gate Bipolar Transistor) as power semiconductor device. Many topologies are analyzed and compared considering the number of DC-links, DC-links voltages values, WTHDs (Weighted Total Harmonic Distortion) of the generated voltages, and semiconductors conduction and switching losses. The control systems of the studied converters are presented and the individual control of the DC-links voltages in highlighted. Experimental results are provided in order to prove the theoretical results and the viability of the systems.

No description available.

Use of multilevel inverters are inevitable in medium and high voltage drives. This is due to the fact that the multilevel inverters can produce voltages in smaller steps which will reduce the harmonic content and result in more sinusoidal voltages and currents as compared to voltages and currents from two-level inverters. Due to the device limitations, use of two-level inverters is not possible in medium and high voltage drive applications. Though multiple devices can be connected both in series and parallel to achieve two-level operation, the output voltages still suffer from high harmonic content. Multilevel inverters have multiple DC voltage levels with switches that enable one of the voltage steps to be applied to the load. Due to decrease in step size during each switching instant, output voltages and currents of the multilevel inverters have considerably less harmonic content. As the number of levels increase, the switching step reduces thereby the harmonic content also reduces drastically. Due to their advantages, multilevel inverters have gained lot of acceptance in the industry even at lower voltages. The three main configurations that have gained popularity are the neutral point clamped converter, the flying capacitor converter and the cascaded H-bridge converter. Each converter has its own set of advantages and disadvantages. Based on the requirements of various applications, it is possible to fabricate hybrid multilevel topologies that are combinations of the three basic topologies. Researchers around the world have proposed several such converters for diverse applications so as to suit particular requirements like modularity, ease of control, improved reliability, fault tolerant capability etc. The present thesis explores multilevel converters with single DC link to be used for motor drive and grid connected applications. A novel five-level inverter topology formed by cascading a floating capacitor H-bridge module to a regular three-level flying capacitor inverter has been explored in chapter 2. The three-level flying capacitor inverter can generate pole voltages of 0, VDC /2 and VDC . By cascading it with another floating capacitor H-bridge of voltage magnitude VDC /4, pole voltages of 0, VDC /4, VDC/2, 3VDC /4 and VDC . Each of these pole voltage levels can have one or more switching combinations. However each switching combination has a unique effect on the state of the two capacitor voltages. By switching through redundant switching combinations for the same pole voltage, the two capacitors present in each phase can be balanced. The proposed topology also has an advantage that if one of the devices in the H-bridge fails, the topology can still be operated as a regular three-level flying capacitor inverter that can supply full load at rated power by bypassing the faulty H-bridge. This fault tolerant operation of the converter will enable it to be used in applications like traction and marine drives where high reliability is needed. The proposed converter needs a single DC link. All the required voltage levels can be generated from the single DC link. This enables back to back grid connected operation possible where multiple converters can interact with a single DC link. Various pole voltage switching combination and its effect on individual capacitor has been studied. A control algorithm to balance the capacitor voltages by switching through multiple redundancies for the same pole voltage has been developed. The proposed configuration has been implemented in hardware using IGBT H-bridge modules and the control circuitry is realized using DSP and FPGA. The performance of the drive is verified for various frequencies and modulation indices during steady state by running a three phase induction motor at no load. The stability of the drive during transients has been studied by accelerating the machine suddenly at no load and analyzing the performance of the drive. The capacitor voltages are made to deviate from their intended values and the capacitor balancing algorithm has been verified for its ability to bring the capacitor voltages back to their intended values. The experimental results have been presented and discussed in detail in the chapter 2. In the third chapter a common-mode voltage eliminated three-level inverter using a single DC link has been proposed. The power schematic is similar to the one presented in chapter 2. In this chapter the space vector polygon formed by the three phases of the proposed topology has been presented. The common-mode voltage generated by different pole voltage combinations for same space vector location and the redundant switching state combinations has been studied. The pole voltage combinations with zero common mode voltage have been studied. The switching state redundancies for the the pole voltage have been studied. The space vector polygon formed with the pole voltage combinations has been analyzed. A drive is made with the proposed common-mode voltage eliminated inverter. The performance of the drive is tested for various modulation indices and frequencies by running a three phase squirrel cage induction motor at no load. The transient performance is verified by accelerating the motor suddenly and checking the common-mode voltage along with the capacitor voltages. The results have been presented and discussed in detail in chapter 3. This converter has advantages like use of single DC supply, ability to operate as a regular three level converter in case of failure of one of the H-bridges. The work presented in fourth chapter proposes a novel three phase 17-level inverter configuration which utilizes a single DC supply. The rest of voltages are generated using three floating capacitor H-bridges. The redundant switching combinations for generating various pole voltages and their effect on the capacitors have been studied and suitable capacitor balancing algorithm has been developed. The proposed topology has been realized in hardware and the performance of the drive during steady state has been studied by running an induction motor at various modulation indices and frequencies. The transient response of the drive has been observed by accelerating the motor suddenly under no load. The results have been presented in detail in chapter four. This configuration also needs a single DC link. The advantages of this configuration is in case of failure of any devices in the H-bridge, the drive can be operated at reduced number of levels while supplying full load current. This feature helps the drive to be used in fault tolerant applications like marine and traction drives where reliability of the drive is of prime importance. All the topologies that have been presented in the previous chapters have mentioned about the usage of the proposed genre of topologies use single DC link and hence will enable back to back grid tied inverter connection. In the fifth chapter this has has been verified experimentally. The three phase squirrel cage induction motor is driven by using the seventeen-level inverter drive proposed in chapter four. A five-level active front-end is realized by the converter topology proposed in chapter two. The converter is run and the performance of the drive is studied at various modulation indices and speeds of the motor. Various aspects like re-generation operation, acceleration and other aspects of the drive have been studied experimentally and the results are presented in detail. For experimental setup, Semikron SKM75GB12T4 IGBT modules have been used to realize the power topology. These IGBTs are driven by M56972L drivers. The control circuit is realized using TMS320F2812 DSP along with Xilinx Spartan 3 FPGA (XC3S200) has been used. The voltages and currents are sensed using LEM LV-20P and LA 55-P hall effect based sensors.