Com o recente desenvolvimento de tecnologias de redes de altas taxas de transmissão, tais como Asynchronous Transfer Mode (ATM), o problema da carência por largura de banda foi solucionado. A questão atual é a implementação de sistemas que suportem os protocolos ATM de forma nativa e integral. Atualmente tem-se utilizado aplicativos tradicionais baseados nos protocolos TCP(UDP)/IP no topo da pilha de protocolos ATM. Tal modelo traz redundâncias que implicam diretamente em aumento de overhead na comunicação. Muitos modelos têm sido desenvolvidos para levar de forma direta a aplicação os serviços ATM. O propósito deste trabalho foi comparar o desempenho de transmissões de dados utilizando os protocolos TCP(UDP)/IP sobre ATM com transmissões de dados no modo ATM nativo. Para tal, utilizamos a plataforma de pesquisa HARP do sistema operacional FreeBSD. Tal plataforma implementa o modelo Classical IP sobre ATM utilizando os serviços AAL5 e ainda fornece uma API para sockets ATM permitindo que uma aplicação tenha acesso direto a camada AALS. Testes de taxa de transmissão, perda de células, e atraso na rede, foram realizados com base na modificação de parâmetros relacionados à aplicação e sistema operacional, tais como tamanho da mensagem sendo transmitida e tamanho dos buffers de socket. / The solution for the lack of bandwidth was solved by the recent development of high speed networks technologies, such as Asynchronous Transfer Mode - ATM. The question now is the implementation of systems, which provide support for ATM protocols in an integral way. Nowadays, legacy network applications, based in TCP/IP protocols have been used on top of ATM protocol stack. Such approach generates redundances that have as consequence an increase in the communication overhead. Many models have been developed to provide ATM services directly to applications. The goal of this study was to evaluate the performance of data transfers comparing the TCP/IP protocols over ATM with the performance of data transfers in native ATM mode. The Host ATM Research Plataform (HARP) was utilized on the FreeBSD operating system. This plataform implements Classical IP over ATM, utilizing AAL5 services. Furthermore, it provides an API for ATM sockets, allowing that an application directly access the AAL5 services. Measurements of throughput and investigations about cell loss and delay were carried out altering parameters related to the application and operating system. The parameters adopted were message size and socket buffer sizes.

Quality control (QC) plan is an important component of manufacturing planning for mass customization. QC planning is to determine the operational tolerances and the way to control process variation for assuring the production quality against design tolerances. It includes four phases, i.e., tolerance stack-up analysis, tolerance assignment, in-process inspection design, and the procedure of error source diagnosis & process control. Previous work has been done for tolerance stack-up modeling based on the datum-machining surface relationship graph (DMG), machining error analysis, and worst-case/statistical method. In this research, the tolerance stack-up analysis is expanded with a Monte-Carlo simulation for solving the tolerance stack-up problem within multi-setups. Based on the tolerance stack-up model and process capability analysis, a tolerance assignment method is developed to determine the operation tolerance specifications in each setup. Optimal result is achieved by using tolerance grade representation and generic algorithm. Then based on a process variation analysis, a platform is established to identify the necessity of in-process inspection and design/select the inspection methods in quality control planning. Finally a general procedure is developed to diagnose the error sources and control the process variation based on the measurements.

Orientador: Vicente Lopes Júnior / Banca: Luiz de Paula do Nascimento / Banca: Marcus Antonio Viana Duarte / Resumo: Este trabalho apresenta o desenvolvimento analítico da modelagem de estruturas flexíveis do tipo treliça com o objetivo de atenuação de vibrações através do uso de técnicas de controle ativo. Atuadores de pilha piezelétricos são usados para exercer as forças de controle na estrutura, os quais substituem barras inteiras ou somente uma parte delas. Estes tipos de atuadores, também, satisfazem a necessidade de obtenção de estruturas leves. O posicionamento ótimo desses atuadores e de sensores é encontrado através da norma Hx, que é usada como função objetivo. Como técnica de controle é aplicado o Controle no Espaço Modal Independente (IMSC), no qual os estados são estimados por um estimador modal e são realimentados de acordo com a teoria de controle ótimo, o Regulador Linear Quadrático (LQR). O IMSC é eficiente computacionalmente mesmo aplicado a sistemas de alta ordem e também reduz os efeitos de spillover. Uma melhoria do IMSC, o Controle Modal Eficiente (EMC) também é apresentado com o propósito de reduzir as amplitudes das forças de controle. O modelo matemático da estrutura inteligente é obtido a partir do Método dos Elementos Finitos (MEF) considerando o acoplamento eletromecânico entre os atuadores de pilhas piezelétricos e a estrutura base. O projeto de uma treliça espacial, o posicionamento ótimo dos atuadores e sensores e o controle ativo de vibração são apresentados em simulações numéricas. Os resultados mostram que ambos os controladores aumentam o amortecimento da estrutura e, ainda, o EMC reduz as amplitudes das forças de controle. / Abstract: This work presents the analytic development of the modeling of flexible truss structures with the aim to suppress the mechanical vibration using active control techniques. Piezoelectric stack actuators are used to produce control force in the structure, which can replace an entire bar or can be coupled to structural members. They also satisfy the necessity to obtain lighter structures. The optimal placement of actuators and sensors is found through the Hã norm as objective function. As control technique is presented the Independent Modal Space Control (IMSC), in which a modal estimator is used and the Linear Quadratic Regulator (LQR) feedback the estimated states according the optimal control theory. IMSC is computationally efficient also applied in high order system and reduces the negative effects of the control and observer spillover. An improvement in the IMSC is the Efficient Modal Control (EMC) that is proposed to reduce the amplitudes of control forces. The mathematical model of the intelligent structure is obtained from Finite Elements Method (FEM) considering the electromechanical coupling between the piezoelectric stack actuators and the base structure. The design of a space truss structure, the optimal placement of active members and the active damping vibration control is numerically implemented. Two control techniques are tested and compared: IMSC and EMC. Results show that the controllers increase the damping of the structure noticeably. The EMC controller provides better performance, reducing the amplitudes of control forces. / Mestre

Com o recente desenvolvimento de tecnologias de redes de altas taxas de transmissão, tais como Asynchronous Transfer Mode (ATM), o problema da carência por largura de banda foi solucionado. A questão atual é a implementação de sistemas que suportem os protocolos ATM de forma nativa e integral. Atualmente tem-se utilizado aplicativos tradicionais baseados nos protocolos TCP(UDP)/IP no topo da pilha de protocolos ATM. Tal modelo traz redundâncias que implicam diretamente em aumento de overhead na comunicação. Muitos modelos têm sido desenvolvidos para levar de forma direta a aplicação os serviços ATM. O propósito deste trabalho foi comparar o desempenho de transmissões de dados utilizando os protocolos TCP(UDP)/IP sobre ATM com transmissões de dados no modo ATM nativo. Para tal, utilizamos a plataforma de pesquisa HARP do sistema operacional FreeBSD. Tal plataforma implementa o modelo Classical IP sobre ATM utilizando os serviços AAL5 e ainda fornece uma API para sockets ATM permitindo que uma aplicação tenha acesso direto a camada AALS. Testes de taxa de transmissão, perda de células, e atraso na rede, foram realizados com base na modificação de parâmetros relacionados à aplicação e sistema operacional, tais como tamanho da mensagem sendo transmitida e tamanho dos buffers de socket. / The solution for the lack of bandwidth was solved by the recent development of high speed networks technologies, such as Asynchronous Transfer Mode - ATM. The question now is the implementation of systems, which provide support for ATM protocols in an integral way. Nowadays, legacy network applications, based in TCP/IP protocols have been used on top of ATM protocol stack. Such approach generates redundances that have as consequence an increase in the communication overhead. Many models have been developed to provide ATM services directly to applications. The goal of this study was to evaluate the performance of data transfers comparing the TCP/IP protocols over ATM with the performance of data transfers in native ATM mode. The Host ATM Research Plataform (HARP) was utilized on the FreeBSD operating system. This plataform implements Classical IP over ATM, utilizing AAL5 services. Furthermore, it provides an API for ATM sockets, allowing that an application directly access the AAL5 services. Measurements of throughput and investigations about cell loss and delay were carried out altering parameters related to the application and operating system. The parameters adopted were message size and socket buffer sizes.

Most people in the United States (US) spend considerable amount of time indoors—about 90% of their time as compared to outdoors, which makes the US population vulnerable to adverse health effects of indoor air contaminants. Volatile organic compound (VOC) concentrations are well-known to be higher in indoor air than outdoor air. One source of VOC concentrations in indoor air that has gained considerable attention in public health and environmental regulatory communities is vapor intrusion. Vapor intrusion is the process by which subsurface vapors enter indoor spaces from contaminated soil and groundwater. It has been documented to cause indoor air contamination within hundreds of thousands of communities across the US. Vapor intrusion is well-known to be difficult to characterize because indoor air concentrations exhibit considerable temporal and spatial variability in homes throughout impacted communities. Unexplained variations in field data have not been systematically investigated using theoretical fate and transport processes. This study incorporates the use of numerical models to better understand processes that influence spatial and temporal variability in field data. The overall research hypothesis is that variability in indoor air VOC concentrations can be (partially) explained by variations in building air exchange rate (AER) and pressure differentials between indoor spaces and outdoor spaces. Neither AER nor pressure differentials are currently calculated by existing vapor intrusion numerical models. To date, most vapor intrusion models have focused on subsurface fate and transport processes; however, there is a need to understand the role of aboveground processes in the context of vapor intrusion exposure risks, which are commonly measured as indoor air VOC concentrations. Recent field studies identify these parameters as potentially important and their important role within the broader field of indoor air quality sciences has been well-documented, but more research is needed to investigate these parameters within the specific context of vapor intrusion. To test the overall hypothesis, the dissertation research developed a new vapor intrusion modeling technique that combines subsurface fate and transport modeling with building science approaches for modeling driving forces, such as wind and stack effects. The modeling results are compared with field data measurements from actual vapor intrusion sites and confirms that the research is relevant to not only academic researchers, but also policy decision makers.

Considering the significant investment of higher education made by students and their families, graduating in a timely manner is of the utmost importance. Delay attributed to drop out or the retaking of a course adds cost and negatively affects a student’s academic progression. Considering this, it becomes paramount for institutions to focus on student success in relation to term scheduling. Often overlooked, complexity of a course schedule may be one of the most important factors in whether or not a student successfully completes his or her degree. More often than not students entering an institution as a first time full time (FSFT) freshman follow the advised and published schedule given by administrators. Providing the optimal schedule that gives the student the highest probability of success is critical. In efforts to create this optimal schedule, this thesis introduces a novel optimization algorithm with the objective to separate courses which when taken together hurt students’ pass rates. Inversely, we combine synergistic relationships that improve a students probability for success when the courses are taken in the same semester. Using actual student data at the University of Kentucky, we categorically find these positive and negative combinations by analyzing recorded pass rates. Using Julia language on top of the Gurobi solver, we solve for the optimal degree plan of a student in the electrical engineering program using a linear and non-linear multi-objective optimization. A user interface is created for administrators to optimize their curricula at main.optimizeplans.com.

<div>Remote Direct Memory Access, or RDMA, is a technology that allows one computer server to direct access the memory of another server without involving its CPU. Compared with traditional network technologies, RDMA offers several benefits including low latency, high throughput, and low CPU utilization. These features are especially attractive to datacenters, and because of this, datacenters have started to adopt RDMA in production scale in recent years.</div><div>However, RDMA was designed for confined, single-tenant, High-Performance-Computing (HPC) environments. Many of its design choices do not fit datacenters well, and it cannot be readily used by datacenter applications. To use RDMA, current datacenter applications have to build customized software stacks and fine-tune their performance. In addition, RDMA offers limited scalability and does not have good support for resource sharing or protection across different applications.</div><div>This dissertation sets out to seek solutions that can solve issues of RDMA in a systematic way and makes it more suitable for a wide range of datacenter applications.</div><div>Our first task is to make RDMA more scalable, easier to use, and have better support for safe resource sharing in datacenters. For this purpose, we propose to add an indirection layer on top of native RDMA to virtualize its low-level abstraction into a high-level one. This indirection layer safely manages RDMA resources for different datacenter applications and also provide a means for better scalability.</div><div>After making RDMA more suitable for datacenter environments, our next task is to build applications that can exploit all the benefits from (our improved) RDMA. We designed a set of systems that store data in remote persistent memory and let client machines access these data through pure one-sided RDMA communication. These systems lower monetary and energy cost compared to traditional datacenter data stores (because no processor is needed at remote persistent memory), while achieving good performance and reliability.</div><div>Our final task focuses on a completely different and so far largely overlooked one — security implications of RDMA. We discovered several key vulnerabilities in the one-sided communication pattern and in RDMA hardware. We exploited one of them to create a novel set of remote side-channel attacks, which we are able to launch on a widely used RDMA system with real RDMA hardware.</div><div>This dissertation is one of the initial efforts in making RDMA more suitable for datacenter environments from scalability, usability, cost, and security aspects. We hope that the systems we built as well as the lessons we learned can be helpful to future networking and systems researchers and practitioners.</div>

<p>The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: </p><p>A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. </p><p>The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. </p><p>The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG.</p>

The purpose of this thesis is to construct a"Program Address Generator"(PAG) to a 24-bit Harvard type, RISC DSP processor using the VHDL language. The PAG is a part of the program control unit, and should consist of the following units: A system stack for storing jump and loop information. A program counter, a status register, a stack pointer, an operating mode register and two registers called loop address and loop counter register, to support hardware loops. The PAG handles the fetch stage of the processor pipeline, and should handle instructions such as the jump, subroutine jump, return from subroutine/interrupt and loop instructions, among others. The PAG was successfully designed, and its function verified through extensive tests, where common combinations of ASM instructions were tested. Files for automated testing was created, to support easy testing if only small changes are applied to the PAG.

The study of microstructures in brightfield microscopy using unbiased stereology plays a large and growing role in bioscience research. Stereology enables objective quantitative analysis of biological structures within a tissue sample. A first step in the stereology process is to calculate the thickness of a tissue sample by locating the top and bottom surfaces of the sample. The aim of this project is to fully automate this location process by using the relative optical focus measure as an indicator of tissue surface boundary. The current method for identification of focus bounding planes requires a trained user to manually select the top and bottom of the tissue at each sample position examined. To automate finding the correct focal planes, i.e. the "just out of focus" planes at the top and bottom surfaces of the tissue sections, a novel approach was developed. Several gray scale focusing functions were analyzed, but while the traditional emphasis of microscopy focus functions is to find global maximums on the focus curve, in this project the aim was to find the sharp "knees" on the focus curve. Starting with a low focus measure value when the focal plane of the objective lens is out of focus above the tissue sample, the objective focal plane is moved downward through the tissue. The ideal focus measure should increase sharply as the upper surface of the tissue passes into the depth of field of the objective lens. As the focal plane is moved through the tissue, the focus measure value rises and falls as objects within the tissue come in and out of focus. As the bottom tissue surface passes into the depth of field the ideal focus measure should reflect some level of focus, dropping precipitously as the surface passes out of the depth of field into the unfocused region below the tissue.