Global ETD Search

1	Novel Double-Deposited-Aluminum (DDA) Process for Improving Al Void and Refresh Characteristics of DRAM Hong, Seok-Woo, Kang, Seung-Mo, Choi, In-Hyuk, Jung, Seung-Uk, Park, Dong-Sik, Kim, Kyoung-Ho, Choi, Yong-Jin, Lee, Tae-Woo, Lee, Haebum, Cho, In-Soo 22 July 2016 (has links) (PDF) In order to resolve the Al void formation originated from the severe stress issues in dynamic random access memory (DRAM), double-deposited-aluminum (DDA) layer process was proposed. This novel metallization process can be effectively and simply performed with the native oxide such as Al 2 O 3 between upper and lower Al metal layer by ex-situ deposition technique. We could effectively control the Al void by adapting the DDA layers with different grain structure. From this novel metallization process, we have confirmed the optimal thickness of Al barrier metal to 100Å to be free from Al voids, which makes it possible to improve the static refresh characteristics of DRAM by 17%. DRAM refresh characteristics DDA (Double Deposited Al) Al void stress migration ddc:620 Dynamisches RAM
2	Novel Double-Deposited-Aluminum (DDA) Process for Improving Al Void and Refresh Characteristics of DRAM Hong, Seok-Woo, Kang, Seung-Mo, Choi, In-Hyuk, Jung, Seung-Uk, Park, Dong-Sik, Kim, Kyoung-Ho, Choi, Yong-Jin, Lee, Tae-Woo, Lee, Haebum, Cho, In-Soo 22 July 2016 (has links) In order to resolve the Al void formation originated from the severe stress issues in dynamic random access memory (DRAM), double-deposited-aluminum (DDA) layer process was proposed. This novel metallization process can be effectively and simply performed with the native oxide such as Al 2 O 3 between upper and lower Al metal layer by ex-situ deposition technique. We could effectively control the Al void by adapting the DDA layers with different grain structure. From this novel metallization process, we have confirmed the optimal thickness of Al barrier metal to 100Å to be free from Al voids, which makes it possible to improve the static refresh characteristics of DRAM by 17%. info:eu-repo/classification/ddc/620 ddc:620 Dynamisches RAM
3	System-level modeling and reliability analysis of microprocessor systems Chen, Chang-Chih 12 January 2015 (has links) Frontend and backend wearout mechanisms are major reliability concerns for modern microprocessors. In this research, a framework which contains modules for negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), hot carrier injection (HCI), gate-oxide breakdown (GOBD), backend time-dependent dielectric breakdown (BTDDB), electromigration (EM), and stress-induced voiding (SIV) is proposed to analyze the impact of each wearout mechanism on state-of-art microprocessors and to accurately estimate microprocessor lifetimes due to each wearout mechanism. Taking into account the detailed thermal profiles, electrical stress profiles and a variety of use scenarios, composed of a fraction of time in operation, a fraction of time in standby, and a fraction of time when the system is off, this work provides insight into lifetime-limiting wearout mechanisms, along with the reliability-critical microprocessor functional units for a system. This enables circuit designers to know if their designs will achieve an adequate lifetime and further make any updates in the designs to enhance reliability prior to committing the designs to manufacture. Microprocessor Reliability Modeling Negative bias temperature instability Positive bias temperature instability Hot carrier injection Timing analysis Aging SRAM Cache Gate oxide breakdown Wearout Electromigration Stress-induced voiding Stress migration

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