This master´s thesis describes switch mode power supply and discusses the design of its individual parts. It also contains a simulation of the power part of the converter and a reseach in the area of DC/DC converters.

This project deals with a design of power and control circuits for a laboratory power supply source, consisting of a continuous conduction mode active rectifier and DC/DC converter. Detailed design of input rectifier with active power factor correction, DC/DC converter and control circuits with their implementation to digital signal processor are the project results.

While a lot of time and resources have been placed into transceiver design, due to the pace of a conventional engineering design process, the design of a power amplifier is often completed using scattered resources; and not always in a methodological manner, and frequently even by an iterative trial and error process. In this thesis, a research question is posed which enables for the investigation of the possibility of streamlining the design flow for power amplifiers. After thorough theoretical investigation of existing power amplifier design methods and modelling, inductors inevitably used in power amplifier design were identified as a major drawback to efficient design, even when examples of inductors are packaged in design HIT-Kits. The main contribution of this research is engineering of an inductor design process, which in-effect contributes towards enhancing conventional power amplifiers. This inductance search algorithm finds the highest quality factor configuration of a single-layer square spiral inductor within certain tolerance using formulae for inductance and inductor parasitics of traditional single-π inductor model. Further contribution of this research is a set of algorithms for the complete design of switch-mode (Class-E and Class-F) power amplifiers and their output matching networks. These algorithms make use of classic deterministic design equations so that values of parasitic components can be calculated given input parameters, including required output power, centre frequency, supply voltage, and choice of class of operation. The hypothesis was satisfied for SiGe BiCMOS S35 process from Austriamicrosystems (AMS). Several metal-3 and thick-metal inductors were designed using the abovementioned algorithm and compared with experimental results provided by AMS. Correspondence was established between designed, experimental and EM simulation results, enabling qualification of inductors other than those with experimental results available from AMS by means of EM simulations with average relative errors of 3.7% for inductors and 21% for the Q factor at its peak frequency. For a wide range of inductors, Q-factors of 10 and more were readily experienced. Furthermore, simulations were performed for number of Class-E and Class-F amplifier configurations with HBTs with ft greater than 60 GHz and total emitter area of 96 μm² as driving transistors to complete the hypothesis testing. For the complete PA system design (including inductors), simulations showed that switch-mode power amplifiers for 50 Ω load at 2.4 GHz centre frequency can be designed using the streamlined method of this research for the output power of about 6 dB less than aimed. This power loss was expected, since it can be attributed to non-ideal properties of the driving transistor and Q-factor limitations of the integrated inductors, assumptions which the computations of the routine were based on. Although these results were obtained for a single micro-process, it was further speculated that outcome of this research has a general contribution, since streamlined method can be used with a much wider range of CMOS and BiCMOS processes, when low-gigahertz operating power amplifiers are needed. This theory was confirmed by means of simulation and fabrication in 180 nm BiCMOS process from IBM, results of which were also presented. The work presented here, was combined with algorithms for SPICE netlist extraction and the spiral inductor layout extraction (CIF and GDSII formats). This secondary research outcome further contributed to the completeness of the design flow. All the above features showed that the routine developed here is substantially better than cut-and-try methods for design of power amplifiers found in the existing body of knowledge. / Thesis (PhD(Eng))--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted

This thesis presents an active clamp forward converter for use in the Energy Harvesting From Exercise Machines project. Ideally, this converter will find use as the centerpiece in a process that links elliptical trainers to the California grid. This active clamp forward converter boasts a 14V-60V input voltage range and 150W power rating, which closely match the output voltage and power levels from the elliptical trainer. The isolated topology outputs 51V, higher than previous, non-isolated attempts, which allows the elliptical trainers to interact with a central grid-tied inverter instead of many small ones. The final converter operated at greater than 86% efficiency over most of the elliptical trainer’s input range, and produced very little noise, making it a solid choice for this implementation.

Σκοπός της παρούσας εργασίας είναι η μελέτη των βασικών τμημάτων που απαρτίζουν ένα ηλεκτρικό όχημα, με άμεσο στόχο τη μέγιστη δυνατή εξοικονόμηση ενέργειας. Προς την κατεύθυνση αυτή μελετάται αρχικά η βαθμίδα φόρτισης των συσσωρευτών. Παρουσιάζονται οι προδιαγραφές και προτείνεται ως βέλτιστη τοπολογία αυτή του Flyback η οποία αντιμετωπίζει λειτουργικές δυσκολίες. Έτσι προτείνεται μια ειδική μεθοδολογία σχεδιασμού βασιζόμενη στην επιλογή του λόγου του Μ/Τ. Επίσης προτείνεται ένα νέο κύκλωμα καταστολής των υπερτάσεων λόγω σκέδασης. Η αποτελεσματική λειτουργία επιβεβαιώνεται μέσω εξομοιώσεων και πειραματικών δοκιμών. Στο δεύτερο μέρος παρουσιάζεται ένα νέο κύκλωμα τροφοδοσίας. Πρόκειται για μετατροπέα μονής βαθμίδας με ένα τρανζίστορ κα αποτελεσματική καταστολή υπερτάσεων. Παράλληλα πραγματοποιεί βελτίωση του συντελεστή ισχύος του κυκλώματος. Στο τρίτο μέρος μελετάται το κινητήριο σύστημα και προτείνεται μια μέθοδος ελέγχου της μαγνητικής ροής και του λόγου μετάδοσης του κιβωτίου ταχυτήτων ώστε να επιτυγχάνεται η ελάχιστη δυνατή ενεργειακή κατανάλωση του οχήματος. Τα αποτελέσματα εξομοίωσης επιβεβαιώνουν την αποτελεσματικότητα της προτεινόμενης μεθόδου. / Basic aim of the present work is the analytical study of the basic part of an EV, in order to be obtained a good energy saving. For this purpose the charging unit of an EV is studied. The specifications which must fulfill this device are exhibited and the Flyback topology is suggested as the optimal. However it appears some important problems. For this purpose, a new strategy of design based on the transformer.

This Master of Applied Science thesis proposes a new design of low power, power factor corrected (PFC), power supplies. By lifting the hold up time restriction for devices that have a battery built in, the energy storage elements of the converter can be reduced, permitting a small and inexpensive power converter to be built. In addition, a new control technique for controlling cascaded converters is presented, named duty mode control (DMC). Its advantages are shown through simulations. The system was proven using a prototype developed in the laboratory designed for a universal ac input voltage (85 - 265VRMS at 50 - 60Hz) and a 40W output at 12V. It consisted of two interleaved phases sensed and digitally controlled on the isolated side of the converter. The prototype was able to achieve a power factor of greater than 0.98 for all operating conditions, and input harmonic current distortion well below any set of standards.

This Master of Applied Science thesis proposes a new design of low power, power factor corrected (PFC), power supplies. By lifting the hold up time restriction for devices that have a battery built in, the energy storage elements of the converter can be reduced, permitting a small and inexpensive power converter to be built. In addition, a new control technique for controlling cascaded converters is presented, named duty mode control (DMC). Its advantages are shown through simulations. The system was proven using a prototype developed in the laboratory designed for a universal ac input voltage (85 - 265VRMS at 50 - 60Hz) and a 40W output at 12V. It consisted of two interleaved phases sensed and digitally controlled on the isolated side of the converter. The prototype was able to achieve a power factor of greater than 0.98 for all operating conditions, and input harmonic current distortion well below any set of standards.

Ce travail de thèse s’inscrit dans la démarche engagée depuis quelques années et concernant l’intégration monolithique en électronique de puissance avec pour objectif de faire émerger une nouvelle structure de bras d’onduleur plus compacte, plus fiable et plus performante. En s'appuyant sur des technologies à base de transistors « complémentaires » sur substrat N et P, la nouvelle structure étudiée présente de nombreux avantages vis-à-vis de la CEM conduite, de la simplification de commande rapprochée et de la mis en œuvre. Ces aspects sont abordés et validés de manières "théoriques" et expérimentales. Le point pénalisant concernant le rendement de la structure par l’introduction du transistor sur substrat P est également analysé et de nouvelles topologies sont proposées afin d’améliorer cette limitation. Des techniques d’alimentation pour la commande bipolaire offrant un niveau maximal intégration sont ainsi développées. / The work presented in this Phd manuscript was targeted to the monolithic integration of the generic power stage of static converters with the goal of bringing out a new inverter leg structure. It is based on "complementary" transistors, N and P types, and it presents several advantages regarding the conducted EMC reduction, the simplification of the gate driver and its implementation. These aspects are studied and validated thanks to experimental results. The drawback concerning the lack of performance due to the introduction of the P type transistor is also analyzed. Several evolutions are proposed to improve the structure’s efficiency while maintaining the obtained advantages at their highest levels. Finally, bipolar gate driver supply techniques, offering high integration levels, are also developed.

This master´s thesis describes switch mode power supply. The aim of this master´s thesis is the design and the construction of the switch mode power supply, which will be used as a laboratory tool.

In the thesis the design of the Data Storage System (DSS) is proposed with the respect to the V-Model methodology. The design is based on users requirements, from which the system requirements are created and the technical specification of the DSS is developed. In the technical specifications the functionality of the DMM and HMI DSS subsystems are described and sub-system requirements are assigned to them, then they are subdivided and assigned to individual DMM (Data memory module) and HMI hardware items. Moreover, requirements are analyzed on hardware items, specific electronic components, are selected and implemented into the block design of the DMM hardware. Based on the block design of hardware, the hardware of the DMM subsystem is designed, selectively simulated and implemented along with the printed circuit board. On the implemented hardware of the DMM subsystems measurements are performed in order to verify the basic functionality of the hardware and the calculated, assimilated and measured values are compared as well. At the end of the thesis there is a short description of the implementation of the software design and its use for basic initialization of the selected processor, together with the verification of its basic function - measuring the frequency of the internal clock sources and the clock domains. The work is completed by sending a message of defined parameters to the selected communication line and sapling it by an oscilloscope, so that the basic function of the DMM subsystem is verified.