The thesis consisted of three parts. The first part introduced designed trend of the embedded passive component and the process flow of organic substrate. A design flow of spiral inductor embedded in 4 layer organic substrate has been demonstrated. Part 2 focused on the extraction equations of conventional PI model and modified T model. These two models have been applied to develop the equivalent circuits of the organic spiral inductors . The comparison between modeling and measurement results shows their difference on modeling accuracy. Part 3 introduced the scalable equations in both modeling techniques to find the equivalent circuit parameters from inductor¡¦s geometrical parameters. A 2.4GHz band-pass filter was simulated to illustrate the application of wide band scalable modeling techniques.

This thesis includes the study of hybrid microwave integrated circuits (HMIC), miniaturization techniques applied on HMICs and its application on a frequency modulated continuous wave (FMCW) range sensor transceiver. In the scope of study, hybrid and monolithic microwave integrated circuits (HMIC and MMIC) are introduced, advantages and disadvantages of these two types are discussed. Large size of HMICs is the main disadvantage especially for military and civil applications requiring miniature volumes. This thesis is mainly devoted on miniaturization work of HMICs in order to cope with this problem. In this scope, miniaturization techniques of some HMICs such as 3 dB hybrid couplers and stubs are examined and analyzed. Their simulation and measurement results cohere with original circuit results. Nevertheless, considerable size reduction up to 80% is achieved. Moreover, planar interdigital capacitors (IDC), spiral inductors (SI) and their equivalent circuit models are introduced. Design technique is discussed with illustrative electromagnetic (EM) simulations. Furthermore, FMCW radar is introduced with its basic operation principles, brief history and usage areas. In addition, FMCW range sensor transceiver is designed with its sub&amp / #8208 / parts / power amplifier, low noise amplifier (LNA), coupler and front end. Multi technology based on chip transistors, interdigital capacitors, spiral inductors and hybrid couplers with wire&amp / #8208 / bond connections is used in the design. As the result of using hybrid miniaturized components small layout size is achieved for the transceiver system with its all components.

In order to address the challenges of capacitive sensing in harsh environment, self resonant passive wireless sensors are studied. The capacitive sensing elements based on interdigitated capacitor (IDC) sensor are used. A semi-empirical model providing accurate capacitance calculation for IDCs over a wide range of dimensions and dielectric constants is developed. An equivalent circuit model based on electric field distribution is proposed, leading to a closed form approximation for IDC capacitance calculation. The conductivity of the material under test is also considered and a model is proposed to calculate effective capacitance as a function of conductivity and measurement frequency. The model is used to study the design optimization of IDC sensor and suggested design procedure is proposed. To wirelessly interrogate the capacitive sensor, it is connected to an inductive element to form a resonant circuit, while the measurement is made at remote reader coil. Advantages and disadvantages of different type of resonant structure design are analyzed. In order to assist the design process, a SPICE circuit model is developed to estimate the resonant frequency of the self resonant sensor. Miniaturized sensors with different dimensions are designed, fabricated and tested. The sensor is integrated with silicon nanowire fabric coated with polymer. Measurements are made to illustrate the enhancement in sensing capability by integrating chemical selective material. / text

Passive components are indispensable in the design and development of microchips for high-frequency applications. Inductors in particular are used frequently in radio frequency (RF) IC's such as low-noise amplifiers and oscillators. High performance inductor has become one of the critical components for voltage controlled oscillator (VCO) design, for its quality factor (Q) value directly affects the VCO phase noise. The optimization of inductor layout can improve its performance, but the improvement is limited by selected technology. Inductor performance is bounded by the thin routing metal and small distance from lossy substrate. On the other hand, the in-accurate inductor modeling further limits the optimization process. The on-chip inductor has been an important research topic since it was first proposed in early 1990's. Significant amount of study has been accomplished and reported in literature; whereas some methods have been used in industry, but not released to public. It is of no doubt that a comprehensive solution is not exist yet. A comprehensive study of previous will be first address. Later author will point out the in-adequacy of skin effect and proximity effect as cause of current crowding in the inductor metal. A model method embedded with new explanation of current crowding is proposed and its applicability in differential inductor and balun is validated. This study leads to a robust optimization routine to improve inductor performance without any addition technology cost and development.

This thesis presents the design and fabrication of coplanar waveguide to microstrip transitions and planar spiral inductors, and the design of metal-insulator-metal capacitors, a planar band-pass, and a low-pass filter structures as an application for the inductors and capacitors using the RF MEMS technology. This thesis also includes a packaging method for RF MEMS devices with the use of benzocyclobutene as bonding material. The transition structures are formed by four different methods between coplanar waveguide end and microstrip end, and they are analyzed in 1-20 GHz. Very low loss transitions are obtained by maintaining constant characteristic impedance which is the same as the port impedance through the transition structures. The planar inductors are formed by square microstrip spirals on a glass substrate. Using the self-inductance propery of a conductive strip and the mutual inductance between two conductor strips in a proper arrangement, the inductance value of each structure is defined. Inductors from 0.7 nH up to 20 nH have been designed and fabricated. The metal-insulator-metal capacitors are formed by two coplanar waveguide structures. In the intersection, one end of a coplanar waveguide is placed on top of the end of the other coplanar waveguide with a dielectric layer in between. Using the theory of parallel plate capacitors, the capacitance of each structure is adjusted by the dimensions of the coplanar waveguides, which obviously adjust the area of intersection. Capacitors from 0.3 pF up to 9.8 pF have been designed. A low-pass filter and a band-pass filter are designed using the capacitors and inductors developed in this thesis. In addition to lumped elements, the interconnecting transmission lines, junctions and input-output lines are added to filter topologies. The RF MEMS packaging is realized on a coplanar waveguide structure which stands on a silicon wafer and encapsulated by a silicon wafer. The capping chip stands on the BCB outer ring which promotes adhesion and provides semi hermeticity. Keywords: Transition between transmission lines, planar spiral inductor, metal-insulator-metal capacitor, RF MEMS packaging, surface micromachining.

While a lot of time and resources have been placed into transceiver design, due to the pace of a conventional engineering design process, the design of a power amplifier is often completed using scattered resources; and not always in a methodological manner, and frequently even by an iterative trial and error process. In this thesis, a research question is posed which enables for the investigation of the possibility of streamlining the design flow for power amplifiers. After thorough theoretical investigation of existing power amplifier design methods and modelling, inductors inevitably used in power amplifier design were identified as a major drawback to efficient design, even when examples of inductors are packaged in design HIT-Kits. The main contribution of this research is engineering of an inductor design process, which in-effect contributes towards enhancing conventional power amplifiers. This inductance search algorithm finds the highest quality factor configuration of a single-layer square spiral inductor within certain tolerance using formulae for inductance and inductor parasitics of traditional single-π inductor model. Further contribution of this research is a set of algorithms for the complete design of switch-mode (Class-E and Class-F) power amplifiers and their output matching networks. These algorithms make use of classic deterministic design equations so that values of parasitic components can be calculated given input parameters, including required output power, centre frequency, supply voltage, and choice of class of operation. The hypothesis was satisfied for SiGe BiCMOS S35 process from Austriamicrosystems (AMS). Several metal-3 and thick-metal inductors were designed using the abovementioned algorithm and compared with experimental results provided by AMS. Correspondence was established between designed, experimental and EM simulation results, enabling qualification of inductors other than those with experimental results available from AMS by means of EM simulations with average relative errors of 3.7% for inductors and 21% for the Q factor at its peak frequency. For a wide range of inductors, Q-factors of 10 and more were readily experienced. Furthermore, simulations were performed for number of Class-E and Class-F amplifier configurations with HBTs with ft greater than 60 GHz and total emitter area of 96 μm² as driving transistors to complete the hypothesis testing. For the complete PA system design (including inductors), simulations showed that switch-mode power amplifiers for 50 Ω load at 2.4 GHz centre frequency can be designed using the streamlined method of this research for the output power of about 6 dB less than aimed. This power loss was expected, since it can be attributed to non-ideal properties of the driving transistor and Q-factor limitations of the integrated inductors, assumptions which the computations of the routine were based on. Although these results were obtained for a single micro-process, it was further speculated that outcome of this research has a general contribution, since streamlined method can be used with a much wider range of CMOS and BiCMOS processes, when low-gigahertz operating power amplifiers are needed. This theory was confirmed by means of simulation and fabrication in 180 nm BiCMOS process from IBM, results of which were also presented. The work presented here, was combined with algorithms for SPICE netlist extraction and the spiral inductor layout extraction (CIF and GDSII formats). This secondary research outcome further contributed to the completeness of the design flow. All the above features showed that the routine developed here is substantially better than cut-and-try methods for design of power amplifiers found in the existing body of knowledge. / Thesis (PhD(Eng))--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted

Rapid growth in the field of communications industry has led to newer opportunities and challenges in the design of CMOS based monolithic integrated circuits. ASK modulators are a class of digital modulators which are known for their relative simplicity of implementation for low cost applications in the industrial and biomedical domains. This thesis presents a LC-based CMOS Amplitude Shift Keying (ASK) modulator scheme which demonstrates promising capability for radio frequency designs. This work describes the design and implementation of differential cross-coupled NMOS only LC power oscillator with ASK modulation to operate at 2.4 GHz frequency. In this work, 65nm CMOS process technology has been used for implementation. The work mainly focused on system parameters such as oscillation frequency, output signal power, power consumption and phase noise. The LC tank was created with a centre-tap on-chip differential spiral inductor and a Metal Insulator Metal (MIM) capacitor. The method of a current mirror with switching technique is employed for biasing the LC oscillator as well as ASK modulation output. The oscillator circuit has been optimised by using a simulation based approach to study the design and measurements to gain a greater insight into the performance of the ASK modulator. An output signal power of -1.59dBm at 2.30 GHz with a phase noise of -115.39dBc/Hz@1MHz and a power consumption of 5.92mW has been achieved at the layout level. Optimal ASK modulated output performance has been obtained for the data rate of up to around 40Mbits/s. In this thesis, simulation results have been presented for both the schematic and the layout levels.

Silicon-on-Insulator (SOI) CMOS technology constitutes a good candidate for mixed signal RF CMOS applications. Due to its low junction capacitance and reduced leakage current, SOI provides reduced static and dynamic power consumption of the digital logic combined with increased cut-off frequencies. Moreover, in terms of passive device integration the major benefit of SOI when compared to the conventional bulk is the possibility to use a high resistivity substrate which allows a drastic reduction of substrate losses allowing a high quality factor of the passive devices. Another issue is the harsh environment applications. Electronics capable of operating at high temperatures are required in several industrial applications, including the automobile industry, the aerospace industry, the electrical and nuclear power industries, and the well-logging industry. The capability of SOI circuits to expand the operating temperature range of integrated circuits up to 300°C has been demonstrated. SOI devices and circuits present advantages in this field over bulk counterparts such as the absence of thermally-activated latch up and reduced leakage current. In this context, various topologies of integrated transmission lines and spiral inductors implemented on standard and high substrate resistivities have been analyzed over a large temperature range. The temperature behavior of the SOI transistors is presented. The main figures-of-merit of the SOI MOSFETs are analyzed and the extraction of the extrinsic and intrinsic parameters of the small signal equivalent circuit is performed. Also, an example of RF circuit applications of the SOI technology, based on a fully integrated Low-Noise Amplifier for low-power and narrow-band applications, is investigated and characterized at high temperature. The main figures-of-merit of the designed circuit are extracted and discussed. The good results show that the SOI technology is now emerging as a good candidate for the realization of analog integrated circuits for low-power and high-temperature applications.

A wearable body temperature sensor would allow for early detection of fever or infection, as well as frequent and accurate hassle-free recording. This thesis explores the design of a body-temperature-sensing device inkjet-printed on a flexible substrate. All structures were first modeled by first-principles, theoretical calculations, and then simulated in HFSS. A variety of planar square inductor geometries were studied before selecting an optimal design. The designs were fabricated using multiple techniques and compared to the simulation results. It was determined that inductance must be carefully measured and documented to ensure good functionality. The same is true for parallel-plate and interdigitated capacitors. While inductance remains relatively constant with temperature, the capacitance of the device with a temperature-sensitive dielectric layer will result in a shift in the resonant frequency as environmental or ambient temperature changes. This resonant frequency can be wirelessly detected, with no battery required for the sensing device, from which the temperature can be deduced. From this work, the optimized version of the design comprises of conductive silver in with a temperature-sensitive graphene oxide layer, intended for inkjet-printing on flexible polyimide substrates. Graphene oxide demonstrates a high dielectric permittivity with good sensing capabilities and high accuracy. This work pushes the state-of-the-art in applying these novel materials and techniques to enable flexible body temperature sensors for future biomedical applications.