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This thesis aims to bring clarity to the dimensioning aspects and limiting factors of the modular multilevel converter (MMC). Special consideration is given to the dc capacitors in the submodules as they are a driving factor for the size and weight of the converter. It is found that if the capacitor voltages are allowed to increase by 10% the stored energy must be 21 kJ/MW in order to compensate the capacitor voltage ripple. The maximum possible output power can, however, be increased by injecting a second-order harmonic in the circulating current. A great advantage of cascaded converters is the possibility to achieve excellent harmonic performance at low switching frequencies. Therefore, this thesis also considers the relation between switching harmonics, capacitor voltage ripple, and arm quantities. It is shown that despite subharmonics in the capacitor voltages, it is still possible to achieve periodic arm quantities. The balancing of the capacitor voltages is also considered in further detail. It is found that it is possible to balance the capacitor voltages even at fundamental switching frequency although this will lead to a comparably large capacitor voltage ripple. Therefore, in order to limit the peak-to-peak voltage ripple, it is shown that a predictive algorithm can be used in which the resulting switching frequency is approximately 2–3 times the fundamental frequency. This thesis also presents two new submodule concepts. The first submodule simply improves the trade-off between the switching frequency and capacitor voltage balancing. The second submodule includes the possibility to insert negative voltages which allows higher modulation indices compared to half-bridge submodules. A brief comparison of cascaded converters for ac-ac applications is also presented. It is concluded that the MMC appears to be well suited for ac-ac applications where input and output frequencies are close or equal, such as in interconnection of ac grids. In low-frequency applications such as low-speed drives, however, the difficulties with handling the energy variations in the converter arms are much more severe in the MMC compared to the other considered topologies. / <p>QC 20141010</p>

Permanent magnet brushless dc (PMBDC) and synchronous machines (PMSM) drives are favored in variable speed applications for their high efficiency operation. Energy efficiency improvement in such motor drives is of interest in recent times because of rising cost of energy. Accordingly, two current control options for improving efficiency of these drives are taken for study and they are; (i) injecting sinusoidal and non-sinusoidal currents in PMBDC machines and (ii) lowering switching frequency of inverter driving the PMSM but without having significant low ordered sidebands of currents. Both these methods are applicable to existing types of permanent magnet motors and hence do not upset their existing optimized designs. / Ph. D.

The voltage source inverter (VSI) is certainly the most popular topology used in dc to ac power conversion. Virtually every commercial electric motor is driven by a VSI. There is a need for smaller and more efficient drives in high performance applications that is dictating unprecedented power density requirements on airborne motor drive systems. In reply to this need, higher switching frequencies are being sought and new switching devices like Silicon Carbide (SiC) JFETs have emerged. Although faster switching rates favor a reduction in the size of passive components and alleviate the current ripple in the inverter, a penalty is paid on switching losses. Owing to their low switching energy profile, SiC JFETs stand as promising candidates in high switching frequency environments. Their normally-on nature, however, raises a level of discomfort among designers due to the added complexities in the gate drive circuitry and the increased risk of dc bus shoot-through faults in voltage source inverters. Despite of these challenges the use of SiC JFETs continues proliferating in high power density applications. In an effort to study the new challenges introduced by this trend a 2 kW IGBT-based three-phase voltage source inverter operating at 65 kHz was designed, built, and tested. In addition a novel overcurrent protection residing in the inverter dc link is proposed in response to the concern of using normally-on devices in voltage source inverters. Successful hardware validation of both the VSI and the overcurrent protection circuit is supported with experimental results. / Master of Science

Synchronous buck converter based multiphase architectures are evaluated to determine whether or not the most widespread voltage regulator topology can meet the power delivery requirements of next generation computer microprocessors. According to the prognostications, the load current will rise to 200A along with the decrease of the supply voltage to 0.5V and staggering tight dynamic and static load line tolerances. In view of these demands, researchers face serious challenges to bring forth compliant solutions that can further offer acceptable conversion efficiencies and minimum mainboard area occupancy. Among the most prominent investigation fronts are those surveying fundamental technology improvements aiming at making power semiconductor devices more effective at high switching frequency. The latter is of critical importance as the increase of the switching frequency is fundamentally recognized as the way forward to enhance power density conversion. Provided that switching losses must be kept low to enable the miniaturization of the filter components, one primary goal is to cope with semiconductor and system integration technologies enabling fast dynamic operation of ultra-low ON resistance power switches. This justifies the main focus of this thesis work, centered around a comprehensive analysis of the MOSFET switching behavior in the synchronous buck converter. The MOSFETs dynamic operation, far from being well describable with the traditional clamped inductive hard-switching mode, is strongly influenced by a number of frequently ignored linear and nonlinear parasitic elements that must be taken into account in order to fully predict real switching waveforms, understand their dynamics, and most importantly, identify and quantify the related mechanisms leading to heat generation. This will be revealed from in-depth investigations of the switched converter under fast switching speeds and heavy load. Recognizing the key relevance of appropriate modeling tools that support this task, the second focal point of the thesis aims at developing a number of suitable models for the switching analysis of power MOSFETs. Combined with a series of design guidelines and optimization procedures, these models form the basis of a proposed methodological approach, where numerical computations replace the usually enormous experimental effort to elucidate the most effective pathways towards reducing power losses. This gives rise to the concept referred to as virtual design loop, which is successfully applied to the development of a new power MOSFET technology offering outstanding dynamic and static performance characteristics. From a system perspective, the limits of the power density conversion will be explored for this and other emerging technologies that promise to open up a new paradigm in power integration capabilities.

This dissertation aims at developing techniques to achieve high power density in motor drives under the performance requirements for transportation system. Four main factors influencing the power density are the main objects of the dissertation: devices, passive components, pulse width modulation (PWM) methods and motor control methods. Firstly, the application of SiC devices could improve the power density of the motor drive. This dissertation developed a method of characterizing the SiC device performance in phase-leg with loss estimation, and claimed that with SiC Schottky Barrier Diode the advantage of SiC JFET could benefit the motor drive especially at high temperature. Then the design and improvement of the EMI filter in the active front-end rectifier of the motor drive was introduced in this dissertation. Besides the classical filter design method, the parasitic parameters in the passive filter could also influence the filtering performance. Random PWM could be applied to reduce the EMI noise peak value. The common-mode (CM) noise reduction by PWM methods is also studied in this dissertation. This dissertation compared the different PWM methods’ CM filtering performance. Considering the CM loop, the design of PWM methods and switching frequency should be together with the CM impedance. Variable switching frequency PWM (VSFPWM) methods are introduced in the dissertation for the motor drive’s EMI and loss improvement. The current ripple of the three-phase converter could be predicted. Then the switching frequency could be designed to adapt the current ripple requirements. Two VSFPWM methods are introduced to satisfy the ripple current peak and RMS value requirements. For motor control issue, this dissertation analyzed the principle of the start-up transient and proposed an improved start-up method. The transient was significantly reduced and the motor could push to high speed and high power with speed sensorless control. Next, the hardware development of modular motor drive was introduced. The development and modification of 10kW phase-legs and full power test of a typical 30kW modular converter is realized with modular design method. Finally, the techniques developed in this dissertation for high power density motor drive design and control are summarized and future works are proposed.

abstract: Point of Load (PoL) converters are important components to the power distribution system in computer power supplies as well as automotive, space, nuclear, and medical electronics. These converters often require high output current capability, low form factor, and high conversion ratios (step-down) without sacrificing converter efficiency. This work presents hybrid silicon/gallium nitride (CMOS/GaN) power converter architectures as a solution for high-current, small form-factor PoL converters. The presented topologies use discrete GaN power devices and CMOS integrated drivers and controller loop. The presented power converters operate in the tens of MHz range to reduce the form factor by reducing the size of the off-chip passive inductor and capacitor. Higher conversion ratio is achieved through a fast control loop and the use of GaN power devices that exhibit low parasitic gate capacitance and minimize pulse swallowing. This work compares three discrete buck power converter architectures: single-stage, multi-phase with 2 phases, and stacked-interleaved, using components-off-the-shelf (COTS). Each of the implemented power converters achieves over 80% peak efficiency with switching speeds up-to 10MHz for high conversion ratio from 24V input to 5V output and maximum load current of 10A. The performance of the three architectures is compared in open loop and closed loop configurations with respect to efficiency, output voltage ripple, and power stage form factor. Additionally, this work presents an integrated CMOS gate driver solution in CMOS 0.35um technology. The CMOS integrated circuit (IC) includes the gate driver and the closed loop controller for directly driving a single-stage GaN architecture. The designed IC efficiently drives the GaN devices up to 20MHz switching speeds. The presented controller technique uses voltage mode control with an innovative cascode driver architecture to allow a 3.3V CMOS devices to effectively drive GaN devices that require 5V gate signal swing. Furthermore, the designed power converter is expected to operate under 400MRad of total dose, thus enabling its use in high-radiation environments for the large hadron collider at CERN and nuclear facilities. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2018

A dominating source for the radiated acoustic noise from a train at low speeds is the traction motor. This noise originates from electromagnetic forces acting on the structure resulting in vibrations on the surface and thus radiated noise. It is often perceived as annoying due to its tonal nature. To achieve a desirable acoustic behavior, and also to meet legal requirements, it is of great importance to thoroughly understand the generation of noise of electromagnetic origin in the motor and also to be able to control it to a low level. In this work, experimental tests have been performed on a traction motor operated from pulse width modulated (PWM) converter. A PWM converter outputs a quasi-sinusoidal voltage created from switched voltage pulses of different widths. The resulting main vibrations at PWM operation and their causes have been analyzed. It is concluded that an appropriate selection of the PWM switching frequency, that is the rate at which the voltage is switched, is a powerful tool to influence the noise of electromagnetic origin. Changing the switching frequency shifts the frequencies of the exciting electromagnetic forces. Further experimental investigations show that the trend is that the resulting sound power level decreases with increasing switching frequency and eventually the sound power level reaches an almost constant level. The underlying physical phenomena for the reduced sound power level is different for different frequency ranges. It is proposed that the traction motor, similar to a thin walled cylindrical structure, shows a constant vibration over force response above a certain frequency. This is investigated using numerical simulations of simplified models. Above this certain frequency, where the area of high modal density is dominating, the noise reducing effect of further increasing the switching frequency is limited. / <p>QC 20180109</p>

General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Buck converter is a common circuit topology to fulfill step-down conversion, especially in low-power application since it is well-studied and straightforward. However, it suffers from low duty cycle under high step-down condition, and typically operates in continuous conduction mode (CCM) that generates large switching loss. On the other hand, as an extension of the buck converter, tapped-inductor (TI) buck converter has larger duty cycle while maintaining the structural simplicity. Therefore, the main objective of this thesis is to explore the potential of TI buck converter as a wide conversion range, high power density and high efficiency topology for low power application. To achieve high efficiency at switching frequency of MHz-level, synchronous conduction mode (SCM) is applied for turn-on losses elimination. The operation principle and power stage design of SCM TI buck is first introduced. The design of high switching frequency coupled inductor is emphasized since its size plays a critical role in power density. Loss breakdown is also provided to perform a comprehensive topological study. Secondly, detailed zero-voltage-switching (ZVS) condition of SCM TI buck is derived so that the converter does not experience redundant circulating energy. The experimental results of 15-W SCM TI buck converter prototypes are provided with 90.7% of peak power stage efficiency. The size of coupled inductor is down to 116 mm3. To enhance light-load efficiency, a variable frequency control scheme based on derived ZVS conditions is implemented with the switching frequency ranging from 2 MHz to 2.9 MHz. / Master of Science / General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Typically, the ultimate goals of general-purpose step-down converter are versatility, high efficiency and compact size. Recently, tapped-inductor (TI) buck converter is studied since it could overcome the drawback of commonly used buck converter under high step-down conversion. Therefore, the potential of TI buck converter as a general-purpose step-down converter candidate is explored in this thesis, including control method, hardware design, etc. The thesis verifies that TI buck converter could have compact size while remaining efficient and adaptable.

To develop more competitive solutions, one of the trends in the development of drive systems for electric and hybrid electric vehicles (EVs/HEVs) is to integrate the power electronic converter and the electric motor. This thesis aims to investigate the performance and the operation of modular converters in integrated motor drive systems for EVs/HEVs. In the first part, the concept of integrated modular motor drive systems for EVs/HEVs is introduced. Three suitable modular converter topologies, namely, the stacked polyphase bridges (SPB) converter, the parallel-connected polyphase bridges (PPB) converter and the modular high frequency (MHF) converter, are evaluated and compared with conventional electric drives in terms of power losses, energy storage requirements, and semiconductor costs. In the second part of the thesis, the harmonic content of the dc-link current of the SPB converter is analyzed. By adopting an interleaving modulation the size of the dc-link capacitor can be reduced without increasing the switching frequency, which is beneficial for achieving a compact integrated system. This method allows for around 80% reduction of the dc-link capacitance for vehicle drives, resulting in a significant size reduction of the power converter and improved integration. Finally, a communication-based distributed control system for the SPB converter is presented. The communication delay arising from the serial communication is inevitable, thus a timing analysis is also presented. It has been found that stability is maintained even when the baud rate of the SPI communication is lower than 1 Mbps, indicating that other communication protocols with lower bandwidths can also be adopted for this topology. The analytical investigations provided in this thesis are validated by experiments on a four-submodule laboratory prototype. Experimental results verify the correctness of the theoretical analysis, as well as the dynamic performance of the distributed control system. / <p>QC 20161121</p>