Orientador: Lee Luan Ling / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-08T01:26:33Z (GMT). No. of bitstreams: 1 Vieira_FlavioHenriqueTeles_D.pdf: 4214611 bytes, checksum: 755dfe9865aff1214f8e551afde7541d (MD5) Previous issue date: 2006 / Resumo: A modelagem multifractal generaliza os modelos de tráfego existentes na literatura e se mostra apropriada para descrever as características encontradas nos fluxos de tráfego das redes atuais. A presente tese investiga abordagens para alocação de banda, predição de tráfego e estimação de probabilidade de perda de bytes considerando as características multifractais de tráfego. Primeiramente, um Modelo Multifractal baseado em Wavelets (MMW) é proposto. Levando em consideração as propriedades deste modelo, são derivados o parâmetro de escala global, a função de autocorrelação e a banda efetiva para processos multifractais. A capacidade de atualização em tempo real do MMW aliada à banda efetiva proposta permite o desenvolvimento de um algoritmo de estimação adaptativa de banda efetiva. Através deste algoritmo é introduzido um esquema de provisão adaptativo de banda efetiva. Estuda-se também a alocação de banda baseada em predição de tráfego. Para este fim, propõe-se um preditor adaptativo fuzzy de tráfego, o qual é aplicado em uma nova estratégia de alocação de banda. O preditor fuzzy adaptativo proposto utiliza funções de base ortonormais baseadas nas propriedades do MMW. Com relação à probabilidade de perda para tráfego multifractal, derivase uma expressão analítica para a estimação da probabilidade de perda de bytes considerando que o tráfego obedece ao MMW. Além disso, uma caracterização mais completa do comportamento de fila é efetuada pela obtenção de limitantes para a probabilidade de perda e para a ocupação média do buffer em termos da banda efetiva do MMW. Por fim, é apresentado um esquema de controle de admissão usando o envelope efetivo proposto para o MMW oriundo do cálculo de rede estatístico, que garante que os fluxos admitidos obedeçam simultaneamente aos requisitos de perda e de retardo. As simulações realizadas evidenciam a relevância das propostas apresentadas / Abstract: Multifractal modeling generalizes the existing traffic models and is believed to be appropriate to describe the characteristics of traffic flows of modern communication networks. This thesis investigates some novel approaches for bandwidth allocation, traffic prediction and byte loss probability estimation, by considering the multifractal characteristics of the network traffic. Firstly, a Wavelet based Multifractal Model (WMM) is proposed. Taking into account the properties of this multifractal model, we derive the global scaling parameter, the autocorrelation function and the effective bandwidth for multifractal processes. The real time updating capacity of the WMM in connection with our effective bandwidth proposal allows us to develop an algorithm for adaptive effective bandwidth estimation. Then, through this algorithm, an adaptive bandwidth provisioning scheme is introduced. In this work, we also study a prediction-based bandwidth allocation case. For this end, we develop an adaptive fuzzy predictor, which is incorporated into a novel bandwidth allocation scheme. The proposed adaptive fuzzy predictor makes use of orthonormal basis functions based on the properties of the WMM. Additionally, we derive an analytical expression for the byte loss probability estimation assuming that the traffic obeys the MMW. Besides, a more complete characterization of the queuing behavior is carried out through the estimation of the bounds for the loss probability and mean queue length in buffer in terms of the WMM based effective bandwidth. Finally, an admission control scheme is presented that uses the WMM based effective envelope derived through the statistical network calculus, guaranteeing that the admitted flows simultaneously attend the loss and delay requirements. The computer simulation results confirm the relevance of the presented proposals / Doutorado / Telecomunicações e Telemática / Doutor em Engenharia Elétrica

The diploma thesis deals with microwave directional coupler. The paper presents some of the microwave directional coupler and an analysis of bifurcations. The paper also discussed the various techniques of bifurcations and the bandwidth to which they are making. Proposal is implemented in two selected directional couplers and determining their size. They also performed using the selected simulation program selected two bifurcations. Furthermore, these couplers are made on the perimeter of the analyzer is verified by their actions and are verified by the actual parameters of the coupler.

Diploma thesis is focused on the supporting of Quality of Services in wireless networks, especially in the Linux operation systems. The topic is connected not only with OS, but also with the wireless standard, which supports QoS in wireless networks called IEEE 802.11e. QoS is needed especially for time-consuming data transfers in real time. The theoretical part deals with the theoretical analysis of the issue of the QoS support. There are described parameters, which occurred in quality of services support. This section also deals with the division of services that are used to transmit data across computer networks. It also describes the QoS support in wireless networks according 802.11e, its implementation and methods of accessing a medium with a without possibility of traffic. This part is followed by a description of QoS support in UNIX operating systems. The chapter describes how is the QoS support designed in these operating systems. There are also characterized concrete tools which are used for control the data flow in the operating systems using Linux. At the end the theoretical part deals with different types of queues and methods used in linux OS. In the practical part of the thesis, there are various designed topologies and scenarios to verify the functionality of QoS support in wireless networks using a Unix system. These chapters show the results of different tests at selected transmission data streams that are sensitive to transmission time. There is also verified cooperation of QoS support between devices operating on the network and data link layers. The output of this work is to design a laboratory exercise for the subject Network Architecture. This exercise is focused on familiarization with the QoS support functionality in wireless networks and in Unix-like operating systems. This chapter also describes the devices and programs that are needed to measure this task. The last part of the chapter describes the procedure for the preparation of the measuring station. For this laboratory task, there is an inserted manual in the annex.

Classical Molecular Dynamics simulation (MD) models the interactions of thousands to millions of particles through the iterative application of basic Physics. MD is one of the core methods in High Performance Computing (HPC). While MD is critical to many high-profile applications, e.g. drug discovery and design, it suffers from the strong scaling problem, that is, while large computer systems can efficiently model large ensembles of particles, it is extremely challenging for {\it any} computer system to increase the timescale, even for small ensembles. This strong scaling problem can be mitigated with low-latency, direct communication. Of all Commercial Off the Shelf (COTS) Integrated Circuits (ICs), Field Programmable Gate Arrays (FPGAs) are the computational component uniquely applicable here: they have unmatched parallel communication capability both within the chip and externally to couple clusters of FPGAs. This thesis focuses on the acceleration of the long range (LR) force, the part of MD most difficult to scale, by using FPGAs. This thesis first optimizes LR acceleration on a single-FPGA to eliminate the amount of on-chip communication required to complete a single LR computation iteration while maintaining as much parallelism as possible. This is achieved by designing around application specific memory architectures. Doing so introduces data movement issues overcome by pipelined, toroidal-shift multiplexing (MUXing) and pipelined staggering of memory access subsets. This design is then evaluated comprehensively and comparatively, deriving equations for performance and resource consumption and drawing metrics from previously developed LR hardware designs. Using this single-FPGA LR architecture as a base, FPGA network strategies to compute the LR portion of larger sized MD problems are then theorized and analyzed.

The key requirements of a reliable neural signal recording system include low power to support long-term monitoring, low noise, minimum tissue damage, and wireless transmission. The neural spikes are also detected and sorted on-chip/off-chip to implement closed-loop neuromodulation in a high channel count setup. All these features together constitute an empirical neural recording system for neuroscience research. In this prospectus, we propose to develop a neural signal acquisition system with wireless transmission and feature extraction. We start by designing a prototype entirely built with commercial-off-the-shelf components, which includes recording and wireless transmission of synthetic neural data and feature extraction. We then conduct the CMOS implementation of the low-power multi-channel neural signal recording read-out circuit, which enables the in-vivo recording with a small form factor. Another direction of this thesis is to design a self-powered motion tracking read-out circuit for wearable sensors. As the wearable industry continues to advance, the need for self-powered medical devices is growing significantly. In this line of research, we propose a self-powered motion sensor based on reverse electrowetting-on-dielectric (REWOD) with low-power integrated electronics for remotely monitoring health conditions. We design the low-power read-out circuit for a wide range of input charges, which is generated from the REWOD sensor.

Distributed storage systems provide fast and reliable access to data by intro- ducing redundancy for stored les. The most common approach of adding re- dundant information is by repetition and erasure codes. Two main processes in a distributed storage system are reconstruction of original le and regenerat- ing a new node. These two processes require bandwidth, which are termed as reconstruction-bandwidth and repair-bandwidth. The current literature treat- s these two processes separately. That is, there are methods to reduce the reconstructing bandwidth without considering the repair-bandwidth, and also there are methods to reduce the repair-bandwidth. We study these two pro- cesses together and try to jointly minimize the reconstruction-bandwidth and repair-bandwidth. We observe a method that has the minimum reconstruction- bandwidth might have large amount of repair-bandwidth and vice versa. We propose codes which minimizes the sum of the repair-bandwidth and reconstruction- bandwidth. The main contribution of this thesis is nding an value of repair locality r (number of nodes connected during node repair) and devising two coding meth- ods in which total bandwidth approximates to be half reduced compared with MSR and MBR when k ! 1 under the condition that 1 6 r 6 k.

Large scale data centers (DC) and high performance computing (HPC) systems require more and more computing power at higher energy efficiency. They are already consuming megawatts of power, and a linear extrapolation of trends reveals that they may eventually lead to unrealistic power consumption scenarios in order to satisfy future requirements (e.g., Exascale computing). Conventional complementary metal oxide semiconductor (CMOS)-based electronic interconnects are not expected to keep up with the envisioned future board-to-board and chip-to-chip (within multi-chip-modules) interconnect requirements because of bandwidth-density and power-consumption limitations. However, low-power and high-speed optics-based interconnects are emerging as alternatives for DC and HPC communications; they offer unique opportunities for continued energy-efficiency and bandwidth-density improvements, although cost is a challenge at the shortest length scales. Plasmonics-based interconnects on the other hand, due to their extremely small size, offer another interesting solution for further scaling operational speed and energy efficiency. At the device-level, CMOS compatibility is also an important issue, since ultimately photonics or plasmonics will have to be co-integrated with electronics. In this paper, we survey the available literature and compare the aforementioned interconnect technologies, with respect to their suitability for high-speed and energy-efficient on-chip and offchip communications. This paper refers to relatively short links with potential applications in the following interconnect distance hierarchy: local group of racks, board to board, module to module, chip to chip, and on chip connections. We compare different interconnect device modules, including low-energy output devices (such as lasers, modulators, and LEDs), photodetectors, passive devices (i.e., waveguides and couplers) and electrical circuitry (such as laserdiode drivers, modulator drivers, transimpedance, and limiting amplifiers). We show that photonic technologies have the potential to meet the requirements for selected HPC and DC applications in a shorter term. We also present that plasmonic interconnect modules could offer ultra-compact active areas, leading to high integration bandwidth densities, and low device capacitances allowing for ultra-high bandwidth operation that would satisfy the application requirements further into the future.

This thesis describes theoretic proposal and two practical realization of multi - point wireless network, first for communications between two endpoints and second for wireless signal coverage of a structured space. The wireless network is realized by the equipment working in unlicenced 2,4GHz and 5GHz ISM band. The wireless device are configured in three different wireless mods: WDS, WDS bridge and AP. This paper contains short information about IEEE 802.11a/b/g/n standard and associated proprietary wireless specifications. Practical workshop describes several variants connections and present the result of throughtput measurements, depending on wireless network topology.

The critical bandwidth (CBW) is an auditory phenomenon that has been used to study various aspects of auditory processing, including auditory masking, complex tone processing, and loudness perception. Although the psychoacoustic aspects of the CBW have been well studied, the underlying neurophysiology of the CBW has not been as thoroughly examined. The current study examined the neurophysiology of the CBW in young adults, as well as loudness perception in response to the CBW. Auditory stimuli consisting of complex tones of varying bandwidths were presented to 12 individuals (6 male and 6 female, ages 18-26 years). Complex tones were presented around center frequencies (CFs) of 250, 500, 1000, and 3000 Hz at bandwidths of 2, 5, 8, 10, 20, 50, 100, 200, 500, 1000, and 2000 Hz. Participants made loudness perception judgments while electroencephalography measured and recorded components of the event related potentials (ERPs) in response to the acoustic stimuli. Reaction time (RT) was recorded for each behavioral response, and the latencies of the N1, P2, C3, and C4 components of the ERPs were obtained. The results showed that RT increased with increasing bandwidth followed by a decrease in RT corresponding approximately with the CBW. This indicated that participants perceived a change in loudness at bandwidths greater than the CBW. Significant differences, p < .05, in RT were observed in bandwidths of 5 Hz and greater, although there was not complete consistency in this observation across all CFs and bandwidths. No significant critical band-like behavior amongst ERP latencies was observed. The results indicated that responses to acoustic stimuli originating in the superior temporal gyrus progressed to areas of higher neural function in the mid-temporal lobe. It was observed that each response must be processed temporally and independently to determine if a frequency difference is present for each stimulus. This observation is significant because this type of processing had not been identified prior to the current study.

Optical networks offering ultra-high capacity and low energy consumption per bit are considered as a good option to handle the rapidly growing traffic volume inside data center (DCs). However, most of the optical interconnect architectures proposed for DCs so far are mainly focused on the aggregation/core tiers of the data center networks (DCNs), while relying on the conventional top-of-rack (ToR) electronic packet switches (EPS) in the access tier. A large number of ToR switches in the current DCNs brings serious scalability limitations due to high cost and power consumption. Thus, it is important to investigate and evaluate new optical interconnects tailored for the access tier of the DCNs. We propose and evaluate a passive optical ToR interconnect (POTORI) architecture for the access tier. The data plane of the POTORI consists mainly of passive components to interconnect the servers within the rack as well as the interfaces toward the aggregation/core tiers. Using the passive components makes it possible to significantly reduce power consumption while achieving high reliability in a cost-efficient way. Meanwhile, our proposed POTORI’s control plane is based on a centralized rack controller, which is responsible for coordinating the communications among the servers in the rack. It can be reconfigured by software-defined networking (SDN) operation. A cycle-based medium access control (MAC) protocol and a dynamic bandwidth allocation (DBA) algorithm are designed for the POTORI to efficiently manage the exchange of control messages and the data transmission inside the rack. Simulation results show that under realistic DC traffic scenarios, the POTORI with the proposed DBA algorithm is able to achieve an average packet delay below 10 μs with the use of fast tunable optical transceivers. Moreover, we further quantify the impact of different network configuration parameters on the average packet delay. / <p>QC 20170503</p>