What are the elementary particles and how did the universe originate are the main driving forces in the high energy physics. In order to further demonstrate the standard model and discover new physics, several detectors are built for the high energy physics experiments. CMOS pixel sensors (CPS) can achieve an attractive tradeoff among many performance parameters, such as readout speed, granularity, material budget, power dissipation, radiation tolerance and integrating readout circuitry on the same substrate, compared with the hybrid pixel sensors and charge coupled devices. Thus, the CPS is a good candidate for tracking the charged particles in vertex detectors and beam telescopes.The power distribution becomes an important issue in the future detectors, since a considerable amount of sensors will be installed. Unfortunately, the independent powering has been proved to fail. In order to solve the power distribution challenges and to provide noiseless voltages, this thesis focuses on the design of a low noise, limited area, low power consumption and full on-chip power management in CPS chips. The CPS are firstly introduced drawing the design requirements of the power management. The power distribution dedicated to CPS chips is then proposed, in which the power management is utilized as the second power conversion stage. Two full on-chip regulators are proposed to generate the analog power supply voltage and the reference voltage required by correlated double sampling operation, respectively. Two prototypes have verified these regulators. They can meet the requirements of CPS. Moreover, the power management techniques and the radiation tolerance design are also presented in this thesis.

This work deals with the design of a CMOS pixel sensor prototype (called MIMOSA 31) for the outer layers of the International Linear Collider (ILC) vertex detector. CMOS pixel sensors (CPS) also called monolithic active pixel sensors (MAPS) have demonstrated attractive performance towards the requirements of the vertex detector of the future linear collider. MIMOSA 31developed at IPHC-Strasbourg is the first pixel sensor integrated with 4-bit column-level ADC for the outer layers. It is composed of a matrix of 64 rows and 48 columns. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation in order to reduce the temporal and fixed pattern noise (FPN). At the bottom of the pixel array, each column is terminated with an analog to digital converter (ADC). The self-triggered ADC accommodating the pixel readout in a rolling shutter mode completes the conversion by performing a multi-bit/step approximation. The ADC design was optimized for power saving at sampling frequency. Accounting the fact that in the outer layers of the ILC vertex detector, the hit density is inthe order of a few per thousand, this ADC works in two modes: active mode and inactive mode. This thesis presents the details of the prototype chip and its laboratory test results.

For the X-ray astronomy project Advanced Telescope for High ENergy Astrophysics (Athena) wafer-scale DEpleted P-channel Field Effect Transistor (DEPFET) detectors are proposed as Focal Plane Array (FPA) for the Wide Field Imager (WFI). Prototype structures with different pixel layouts, each consisting of 64 x 64 pixels, were fabricated to study four different DEPFET designs. This thesis reports on the results of the electrical and spectroscopic characterization of the different DEPFET designs. With the electrical qualification measurements the transistor properties of the DEPFET structures are investigated in order to determine whether the design intentions are reflected in the transistor characteristics. In addition, yield and homogeneity of the prototypes can be studied on die, wafer and batch level for further improvement of the production technology with regard to wafer-scale devices. These electrical characterization measurements prove to be a reliable tool to preselect the best detector dies for further integration into full detector systems. The spectroscopic measurements test the dynamic behavior of the designs as well as their spectroscopic performance. In addition, it is revealed how the transistor behavior translates into the detector performance. This thesis, as the first systematic study of different DEPFET designs on die and detector level, shows the limitations of the current DEPFET assessment methods. Thus, it suggests a new concise characterization procedure for DEPFET detectors as well as guidelines for expanded testing in order to increase the general knowledge of the DEPFET. With this study of four different DEPFET variants not only designs suitable for Athena mission have been found but also improvement impulses for the starting wafer-scale device production are provided.

Le sujet de cette thèse est de concevoir un prototype de capteur à pixel CMOS adapté aux couches extérieures du détecteur de vertex de l'International Linear Collider (ILC).Il est le premier prototype de capteur CMOS intégrant un ADC en bas de colonne de 4-bit et une matrice de pixels, dédié aux couches externes. L'architecture du prototype nommé MIMOSA 31 comprend une matrice de pixels de 48 colonnes par 64 lignes, des ADC en bas de colonne. Les pixels sont lus ligne par ligne en mode d'obturation roulant. Les ADCs reçoivent la sortie des pixels en parallèle achève réalisent la conversion en effectuant une approximation de multi-bit/step. Sachant que dans les couches externes de l'ILC, la densité de pixels touchés est de l'ordre de quelques pour mille, !'ADC est conçu pour fonctionner en deux modes (actifs et inactifs) afin de minimiser la consommation d'énergie. Les résultats indiquent que MIMOSA 31 répond aux performances nécessaires pour cette couche de capteurs. / This work deals with the design of a CMOS pixel sensor prototype (called MIMOSA 31) for the outer layers of the International Linear Collider (ILC) vertex detector. CMOS pixel sensors (CPS) also called monolithic active pixel sensors (MAPS) have demonstrated attractive performance towards the requirements of the vertex detector of the future linear collider. MIMOSA 31developed at IPHC-Strasbourg is the first pixel sensor integrated with 4-bit column-level ADC for the outer layers. It is composed of a matrix of 64 rows and 48 columns. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation in order to reduce the temporal and fixed pattern noise (FPN). At the bottom of the pixel array, each column is terminated with an analog to digital converter (ADC). The self-triggered ADC accommodating the pixel readout in a rolling shutter mode completes the conversion by performing a multi-bit/step approximation. The ADC design was optimized for power saving at sampling frequency. Accounting the fact that in the outer layers of the ILC vertex detector, the hit density is inthe order of a few per thousand, this ADC works in two modes: active mode and inactive mode. This thesis presents the details of the prototype chip and its laboratory test results.

For the X-ray astronomy project Advanced Telescope for High ENergy Astrophysics (Athena) wafer-scale DEpleted P-channel Field Effect Transistor (DEPFET) detectors are proposed as Focal Plane Array (FPA) for the Wide Field Imager (WFI). Prototype structures with different pixel layouts, each consisting of 64 x 64 pixels, were fabricated to study four different DEPFET designs. This thesis reports on the results of the electrical and spectroscopic characterization of the different DEPFET designs. With the electrical qualification measurements the transistor properties of the DEPFET structures are investigated in order to determine whether the design intentions are reflected in the transistor characteristics. In addition, yield and homogeneity of the prototypes can be studied on die, wafer and batch level for further improvement of the production technology with regard to wafer-scale devices. These electrical characterization measurements prove to be a reliable tool to preselect the best detector dies for further integration into full detector systems. The spectroscopic measurements test the dynamic behavior of the designs as well as their spectroscopic performance. In addition, it is revealed how the transistor behavior translates into the detector performance. This thesis, as the first systematic study of different DEPFET designs on die and detector level, shows the limitations of the current DEPFET assessment methods. Thus, it suggests a new concise characterization procedure for DEPFET detectors as well as guidelines for expanded testing in order to increase the general knowledge of the DEPFET. With this study of four different DEPFET variants not only designs suitable for Athena mission have been found but also improvement impulses for the starting wafer-scale device production are provided.