Optical fiber access technology is the key to realize a broadband communication for everyone, and the passive optical network (PON) is enabling customers to enjoy high-speed internet access now. As the demand for the broadband access is still growing, a study to find out technologies to realize wider bandwidth for the access system is quite important. At this moment, wavelength division multiplexing (WDM) PON is the most promising technology for the future optical fiber access system. Current PON system covers a reach of within 20km from a central office, because the market of the access system is focusing on well-populated area. It is required to extend the reach of the PON system to enhance the applicable area, because there are many regions in the world where are not so highly populated. Therefore, this master thesis is focusing on to enhance the reach of the WDM-PON system. A little more specifically, a single fiber bidirectional 80 km WDM PON system with symmetric up-and-downstream data rate of 10.66Gb/s is reported. In order to enhance the reach of the WDM-PON system, Raman amplifier is utilized. As the Raman amplifier can amplify both directional optical signals simultaneously, it is quite effective to enhance the reach of the WDM-PON system. Even though, there are several effects that cause performance degradations of the system by introducing the Raman amplifier. It is important to clarify such effects and to provide solutions. This thesis discusses these issues also. One factor to degrade the system performance is the Rayleigh backscattering. As the Raman amplifier amplifies the Rayleigh backscattering, it interferes to the signal and causes the crosstalk penalty. At first, an experimental study has been conducted to clarify the significance of the Rayleigh backscattering, and the method to overcome the crosstalk penalty is presented. Then, another experiment to realize 80km WDM PON system with Raman amplifier is conducted, and it demonstrates a feasibility of such system. Finally, this thesis is concluded by a successful demonstration of the WDM-PON system with an enhanced reach.

The digital product increases widely and vastly. We need a converter to change analog signal to digital one. However, the requirement of analog-to-digital converter is rising due to progress of DSP (Digital Signal Processor). In most ADC structure there have an important building block called the front-end sample-and-hold circuit (SHA) . I will design and implement a high speed and low power sample and hold circuit. In this thesis, the circuits are designed with UMC 90nm 1P9M CMOS process and 1.2V of supply voltage. The speed and resolution of SHA are 100Ms/s and 10bits individually. The circuit is implemented with class AB amplifier.

This thesis is composed of three parts. The first part is devoted to introducing the various noise sources in transistors and their equivalent noise models. Based on the equivalent noise models, the theory of noise cancellation in a low-noise amplifier is derived in detail. The second part is to perform an experiment to validate the theory of low-noise amplifier using common-gate noise cancellation technique. By adjusting the transconductance of individual transistor, the simulated and measured noise figures are compared under different noise cancellation conditions. The third part is to design a low-noise amplifier RFIC using common-source noise cancellation technique for DVB-H applications. This RFIC was implemented in a TSMC 0.18£gm process and measured to show successful noise cancellation capability in a wide frequency range.

Cr4+:YAG is an attractive gain medium due to its broad 3-dB emission spectra all the way from 1253 nm to 1530 nm that just cover the low loss window of silica fiber. Such a broadband characteristic offers a potential to develop a broadband amplified spontaneous emission (ASE) light source, optical amplifier, and tunable laser. Growing the Cr4+:YAG bulk crystal into fiber form is necessary for generating larger gain by the better optical confinement of the waveguide structure. For the application of laser, it is superior to bulk crystal for reduced lasing threshold and better slope efficiency due to also the optical confinement effect and better heat dissipation. Laser heated pedestal growth (LHPG) method has been used to grow high purity crystal fibers due to its crucible free nature. A novel cladding technique, co-drawing LHPG (CDLHPG), was developed to solve core-reduction problem and obtained a double-clad fiber (DCF) structure. But the power fluctuation of heating laser caused large core variation of Cr4+:YAG DCF, and further impaired the optical performance. An innovating method for suppressing the fluctuation of heating power, sapphire tube assisted CDLHPG technique, was developed and combined with power feedback control program. By this technique, 10-£gm-core Cr4+:YAG DCFs which meet the adiabatic propagation criterion were fabricated. By comparing with ASE and optical amplifier experimental data, cross sections of pump absorption, emission, and excited-state absorptions (ESAs) of pump and signal were determined. Pump ESA loss limited the optical performance that could be solve by using cladding pump scheme. A record-low threshold Cr4+:YAG DCF laser with two slopes with respect to absorbed pump power was achieved at room temperature. The threshold pump powers were 2.5 mW and 96 mW in the low and high absorbed pump powers with the same output coupler transmittance of 3.8%, respectively. The slope efficiencies of the fiber laser were 0.4% and 6.9%, respectively. By numerical simulation, 56% slope efficiency can be achieved with a length of 7 cm and an output reflectance of 80%. Our group also firstly used the ASE as the light source of optical coherence tomography, an axial resolution of 3.5 £gm was achieved.

Abstract¡G This thesis studies the memory effect due to bias perturbation on digital predistortion technique, and employs multi-tone continuous wave signal and digital modulation signals with different bandwidth to discuss the performance of digital predistortion technique. Memory effect makes a great impact on the digital predistortion technique, and bias perturbation is one of the major causes. Lowering the bias perturbation can improve the effectiveness of digital predistortion technique. Another focus of this thesis is to design a Class E power amplifier in 0.18 £gm CMOS process. The power amplifier uses cascode structure to alleviate the breakdown voltage problem and employs power combining technique to achieve impedance transformation on chip for the purpose of increasing the output power and efficiency.

Modern day wireless communication systems are constantly facing increasing bandwidth demands due to a growing consumer base. To cope up with it, they are required to have a better power vs performance from the RF devices. The amount of data being exchanged over wireless links has tremendously increased and simultaneously, there is a need to switch to portable RF devices and this has in turn forced the issue of low-power RF system design. Therefore, what we need is an RF transceiver that operates at high data rates and over adverse channels with a low power consumption. A major portion of the power is utilized by the RF front end of the wireless system. Many methods like controlled positive feedback, re-utilizing bias current, etc have been employed to reduce the power consumption of the RF front end. The most modern wireless systems adapt to the channel quality by adjusting the data transmission rates and by adjusting the output power of the RF Power Amplifier. However, each of these methods concentrates on working for the worst case channel and giving the highest data rate. What needs to be known is that the channel conditions are not always worst. Even for a normal channel, the system is going to utilize a lot of power and give the highest possible data rate which may or may not be necessary. And thus, for the most part, the system is going to use up more power than necessary. What we need instead, is a system which works nominally for a normal channel and exhaustively for a harsh channel condition. This requires the system to adapt to the channel conditions. Also another major factor causing fluctuations in the performance is the process variations. This calls for a channel-dependent dynamic transceiver with adequate power management and tuning. In our work, we try to devise a method to dynamically minimize the power considering the varying channel conditions and process variations. We first use companding to reduce the dynamic range of the signal so that it can be used on facilities with smaller dynamic range. This brings down the transmitted power. We also create multiple instances of the Power Amplifier to simulate process variations. After finding the optimum tuning knob settings for one instance of the PA, we try to use it to obtain the optimum settings for another instance. This requires the use of some heuristics and in our work, we have supplemented it with Simulated Annealing. Using SA, we can dynamically tune the power of a system for changing channel conditions and existing process variations. Towards the end, we have also proved that the slower the cooling rate of the experiment, the more elaborate the search space is and the more accurate the result is.

ITC/USA 2012 Conference Proceedings / The Forty-Eighth Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2012 / Town and Country Resort & Convention Center, San Diego, California / This paper details design, development and test of the Low Cost OFDM Transceiver (LCOT) LCT2-040-2200 module at S band. The goal of the project is to provide a low cost transmit and receive unit for demonstrating OFDM communication on a flight platform. The LCOT module is built to transmit and receive OFDM signals. It transmits OFDM signals at 10W power out through a custom built high power amplifier and conforms to the IEEE 802.11.g spectral emissions mask.

The FREIA laboratory is a Facility for REsearch Instrumentation and Acceleratior development at Uppsala University, Sweden, constructed recently to test and develop superconducting accelerating cavities and their high power RF sources. FREIA's activity target initially the European Spallation Source (ESS) requirements for testing spoke cavities and RF power stations, typically 400 kW per cavity. Different power stations will be installed at the FREIA laboratory. The first one is based on vacuum tubes and the second on a combination of solid state modules. In this context, we investigate different related aspects, such as power generation and power combination. For the characterization of solid state amplifier modules in pulsed mode, at ESS specifications, we implement a Hot Sparameter measurement set-up, allowing in addition the measurement of different parameters such as gain and efficiency. Two new solid state amplifier modules are designed, constructed and measured at 352 MHz, using commercially available LDMOS transistors. Preliminary results show a drain efficiency of 71 % at 1300 W pulsed output power. The effects of changing quiescent current (IDq) and drain voltage are investigated, aswell as the possibilities to combine several modules together.

Application of neural prostheses in today's medicine successfully helps patients to increase their activities of daily life and participate in social activities again. These implantable microsystems provide an interface to the nervous system, giving cellular resolution to physiological processes unattainable today with non-invasive methods. The latest developments in genetic engineering, nanotechnologies and materials science have paved the way for these complex systems to interface the human nervous system. The ideal system for neural signal recording would be a fully implantable device which is capable of amplifying the neural signals and transmitting them to the outside world while sustaining a long-term and accurate performance, therefore different sciences from neurosciences, biology, electrical engineering and computer science have to interact and discuss the synergies to develop a practical system which can be used in daily medicine practice. This work investigates the main building blocks necessary to improve the quality of acquired signal from the micro-electronics and MEMS perspectives. While all of these components will be ultimately embedded in a fully implantable recording probe, each of them addresses and deals with a specific obstacle in the neural signal recording path. Specifically we present a low-voltage low-noise low-power CMOS amplifier particularly designed for neural recording applications. This is done by surveying a number of designs and evaluating each design against the requirements for a neural recording system such as power dissipation and noise, and then choosing the most suitable topology for design and implementation of a fully implantable system. In addition a surface modification method is investigated to improve the sacrificial properties and biocompatibility of probe in order to extend the implant life and enhance the signal quality.

Design of the next generation (4G) systems is one of the most active and important area of research and development in wireless communications. The 2G and 3G technologies will still co-exist with the 4G for a certain period of time. Other applications such as wireless LAN (Local Area Network) and RFID are also widely used. As a result, there emerges a trend towards integrating multiple wireless functionalities into a single mobile device. Low noise amplifier (LNA), the most critical component of the receiver front-end, determines the sensitivity and noise figure of the receiver and is indispensable for the complete system. To satisfy the need for higher performance and diversity of wireless communication systems, three LNAs with different structures and techniques are proposed in the thesis based on the 4G applications. The first LNA is designed and optimized specifically for LTE applications, which could be easily added to the existing system to support different standards. In this cascode LNA, the nonlinearity coming from the common source (CS) and common gate (CG) stages are analyzed in detail, and a novel linear structure is proposed to enhance the linearity in a relatively wide bandwidth. The LNA has a bandwidth of 900MHz with the linearity of greater than 7.5dBm at the central frequency of 1.2GHz. Testing results show that the proposed structure effectively increases and maintains linearity of the LNA in a wide bandwidth. However, a broadband LNA that covers multiple frequency ranges appears more attractive due to system simplicity and low cost. The second design, a wideband LNA, is proposed to cover multiple wireless standards, such as LTE, RFID, GSM, and CDMA. A novel input-matching network is proposed to relax the tradeoff among noise figure and bandwidth. A high gain (>10dB) in a wide frequency range (1-3GHz) and a minimum NF of 2.5dB are achieved. The LNA consumes only 7mW on a 1.2V supply. The first and second LNAs are designed mainly for the LTE standard because it is the most widely used standard in the 4G communication systems. However, WiMAX, another 4G standard, is also being widely used in many applications. The third design targets on covering both the LTE and the WiMAX. An improved noise cancelling technique with gain enhancing structure is proposed in this design and the bandwidth is enlarged to 8GHz. In this frequency range, a maximum power gain of 14.5dB and a NF of 2.6-4.3dB are achieved. The core area of this LNA is 0.46x0.67mm2 and it consumes 17mW from a 1.2V supply. The three designs in the thesis work are proposed for the multi-standard applications based on the realization of the 4G technologies. The performance tradeoff among noise, linearity, and broadband impedance matching are explored and three new techniques are proposed for the tradeoff relaxation. The measurement results indicate the techniques effectively extend the bandwidth and suppress the increase of the NF and nonlinearity at high frequencies. The three proposed structures can be easily applied to the wideband and multi-standard LNA design.