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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Creation of standard cell libraries in sub-micron processes / Skapande av standardcellbibliotek i sub-mikrona processer

Jansson, Emil, Johansson, Torgny January 2005 (has links)
Creating an IC (Integrated Circuit) can be very time consuming if high flexibility of the construction is demanded. This report will try to solve this problem by creating own standard cell libraries, which in turn are more flexible since the user designs them. Having these libraries makes it possible to map VHDL or Verilog code to those libraries, using them instead of predefined cell libraries. The procedure of creating the libraries is quite time consuming, and thus the possibilities of making that procedure automatic, or as automatic as possible, has been examined. Unfortunately some manual labour has to be done, butthe process can be speeded up a lot by making parts of it automatic.
2

A Study of Target Frequency Bond for Frequency Control Performance Score Calculations in an Isolated System

Lee, Hung-hsi 06 September 2010 (has links)
Power system frequency is one of the key performance indices of system operation. Abnormal frequency deviations would incur negative impacts to power equipments and service quality. Thus, it is important to operate and regulate the system frequency within an acceptable range. North American Electric Reliability Corporation (NERC) has been using a Control Performance Standard (CPS) for frequency control performance assessment since 1997 which uses system frequency and inter--area power flow to evaluate the power system control performance. This thesis presents a design of CPS for isolated system and the results of Taiwan Power Company frequency control performance based on the proposed CPS1 formulation.
3

ucsCNL A controlled natural language for use case specifications

HORI, Érica Aguiar Andrade 31 January 2010 (has links)
Made available in DSpace on 2014-06-12T15:57:41Z (GMT). No. of bitstreams: 2 arquivo3220_1.pdf: 1307302 bytes, checksum: 42435c33fd14be36778e3c202d24fd2d (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2010 / A maioria das empresas utiliza a linguagem natural livre para documentar software, desde os seus requisitos, até os casos de uso e testes usados para verificar o produto final. Visto que as fases de análise, projeto, implementação e teste do sistema dependem essencialmente dessa documentação, é preciso assegurar inicialmente a qualidade desses textos. Contudo, textos escritos em linguagem natural nem sempre são precisos, devido ao fenômeno da ambigüidade (léxica e estrutural), podendo dar margem a diferentes interpretações. Uma alternativa para se minimizar esse problema é o uso de uma Linguagem Natural Controlada - um subconjunto de alguma língua natural, que usa um vocabulário restrito a um domínio particular, e regras gramaticais que guiam a construção de sentenças com redução de ambigüidade semântica visando padronização e precisão dos textos. Este trabalho, na área de Teste de Software, apresenta a ucsCNL (Use Case Specification CNL), uma Linguagem Natural Controlada para escrever especificações de casos de uso no domínio de dispositivos móveis. A ucsCNL foi integrada à TaRGeT (Test and Requirements Generation Tool), uma ferramenta para geração automática de casos de teste funcionais baseados em cenários de casos de uso escritos em Inglês. A ucsCNL provê um ambiente para geração de casos de teste mais claros, com ambigüidade reduzida, influindo diretamente na qualidade dos testes e na produtividade dos testadores. A ucsCNL já está em uso e tem alcançado resultados satisfatórios
4

The economic analysis of relaxing frequency control

Chown, Graeme Andrew 12 August 2008 (has links)
Abstract will not load on to DSpace
5

Creation of standard cell libraries in sub-micron processes / Skapande av standardcellbibliotek i sub-mikrona processer

Jansson, Emil, Johansson, Torgny January 2005 (has links)
<p>Creating an IC (Integrated Circuit) can be very time consuming if high flexibility of the construction is demanded. This report will try to solve this problem by creating own standard cell libraries, which in turn are more flexible since the user designs them. Having these libraries makes it possible to map VHDL or Verilog code to those libraries, using them instead of predefined cell libraries. The procedure of creating the libraries is quite time consuming, and thus the possibilities of making that procedure automatic, or as automatic as possible, has been examined. Unfortunately some manual labour has to be done, butthe process can be speeded up a lot by making parts of it automatic.</p>
6

An Environment for Automatic Generation of Code Optimizers

Paleri, Vineeth Kumar 07 1900 (has links)
Code optimization or code transformation is a complex function of a compiler involving analyses and modifications with the entire program as its scope. In spite of its complexity, hardly any tools exist to support this function of the compiler. This thesis presents the development of a code transformation system, specifically for scalar transformations, which can be used either as a tool to assist the generation of code transformers or as an environment for experimentation with code transformations. The development of the code transformation system involves the formal specification of code transformations using dependence relations. We have written formal specifications for the whole class of traditional scalar transformations, including induction variable elimination - a complex transformation - for which no formal specifications are available in the literature. All transformations considered in this thesis are global. Most of the specifications given here, for which specifications are already available in the literature, are improved versions, in terms of conservativeness.The study of algorithms for code transformations, in the context of their formal specification, lead us to the development of a new algorithm for partial redundancy elimination. The basic idea behind the algorithm is the new concepts of safe partial availability and safe partial anticipability. Our algorithm is computationally and lifetime optimal. It works on flow graphs whose nodes are basic blocks, which makes it practical.In comparison with existing algorithms the new algorithm also requires four unidirectional analyses, but saves some preprocessing time. The main advantage of the algorithm is its conceptual simplicity. The code transformation system provides an environment in which one can specify a transformation using dependence relations (in the specification language we have designed), generate code for a transformer from its specification,and experiment with the generated transformers on real-world programs. The system takes a program to be transformed, in C or FORTRAN, as input,translates it into intermediate code, interacts with the user to decide the transformation to be performed, computes the necessary dependence relations using the dependence analyzer, applies the specified transformer on the intermediate code, and converts the transformed intermediate code back to high-level. The system is unique of its kind,providing a complete environment for the generation of code transformers, and allowing experimentations with them using real-world programs.
7

Automatic generation of an LC voltage controlled oscillator

Kil, Donghyeok 16 December 2013 (has links)
A Voltage Controlled Oscillator (VCO) is used to generate a signal with a frequency that is a function of an input voltage amplitude, and is an integral part of circuits such as phase locked loops, frequency synthesizers, down conversion receivers, and clock generators. A typical design flow for a VCO involves architecture selection based on specification, calculation of circuit parameters, simulation, and iterations of circuit parameters based on the simulation result. In such a design flow, changes in specification or process can lead to significant redesign. This report focuses on a C++ based LC VCO generation software that seeks to automate the design process and that includes calculation of circuit parameters, creation of Spectre netlist, invocation of simulation, automated checking of the result, and a feedback mechanism to modify circuit parameters until the design can converge to the desired specification. Object Oriented Programming principles such as inheritance, polymorphism, encapsulation, class abstraction are exercised to maximize reusability and portability to other projects which may require different foundry device models and supply voltages. / text
8

Automatic Generation of On-Chip Bus Infrastructure for System-on-Chip

Chen, Chun-Chang 15 December 2004 (has links)
For the on-chip bus, flexibility is the key to reuse by enabling developers to select the optimal architecture to efficiently meet the performance requirements of a wide variety of systems. AMBA is an open standard, on-chip bus specification that details a strategy for the interconnection and management of functional blocks that makes up a System-on-Chip (SoC). AMBA will let designers multiply the total bandwidth available in a system without changing the bus interface on existing intellectual property (IP) cores. Sometimes, the SoC designer to select the optimal combination of bus frequency (to match the peripherals) and number of channels (to achieve the bandwidth), using the AMBA Multi-layer architecture. The AHB of the AMBA System Bus connects embedded processors such as an ARM core to high-performance peripherals, DMA controllers, on-chip memory and interfaces. It is a high-speed, high-bandwidth bus that supports multi-master bus management to maximize system performance. In this thesis, we implement an software, Automatic Generation of On-Chip Bus Infrastructure for SoC, and it supports the AMBA AHB, Multi-layer AHB architecture to optimize system bandwidth, or AHB-Lite to streamline single master layers. By user set up, it can generate the relative on-chip bus infrastructure. We use each AHB Monitor of SDV and Synposys to validate the protocol of infrastructure respectively. In Test Patterns, we use Bus Functional Model to verify all type transfers of bus. In hardware implement, we use SYS32TM, SYS32TME, SYS16TM, and MEMCU to integrate three type AHBs. Every example, we also build FPGA prototyping and chip layout. We do this to validate our on-chip bus infrastructure.
9

Graph-theoretic Sensitivity Analysis of Dynamic Systems

Banerjee, Joydeep 29 July 2013 (has links)
The main focus of this research is to use graph-theoretic formulations to develop an automated algorithm for the generation of sensitivity equations. The idea is to combine the benefits of direct differentiation with that of graph-theoretic formulation. The primary deliverable of this work is the developed software module which can derive the system equations and the sensitivity equations directly from the linear graph of the system. Sensitivity analysis refers to the study of changes in system behaviour brought about by the changes in model parameters. Due to the rapid increase in the sizes and complexities of the models being analyzed, it is important to extend the capabilities of the current tools of sensitivity analysis, and an automated, efficient, and accurate method for the generation of sensitivity equations is highly desirable. In this work, a graph-theoretic algorithm is developed to generate the sensitivity equations. In the current implementation, the proposed algorithm uses direct differentiation to generate sensitivity equations at the component level and graph-theoretic methods to assemble the equation fragments to form the sensitivity equations. This way certain amount of control can be established over the size and complexity of the generated sensitivity equations. The implementation of the algorithm is based on a commercial software package \verb MapleSim[Multibody] and can generate governing and sensitivity equations for multibody models created in MapleSim. In this thesis, the algorithm is tested on various mechanical, hydraulic, electro-chemical, multibody, and multi-domain systems. The generated sensitivity information are used to perform design optimization and parametric importance studies. The sensitivity results are validated using finite difference formulations. The results demonstrate that graph-theoretic sensitivity analysis is an automated, accurate, algorithmic method of generation for sensitivity equations, which enables the user to have some control over the form and complexity of the generated equations. The results show that the graph-theoretic method is more efficient than the finite difference approach. It is also demonstrated that the efficiency of the generated equations are at par or better than the equation obtained by direct differentiation.
10

Unsupervised relation extraction for e-learning applications

Afzal, Naveed January 2011 (has links)
In this modern era many educational institutes and business organisations are adopting the e-Learning approach as it provides an effective method for educating and testing their students and staff. The continuous development in the area of information technology and increasing use of the internet has resulted in a huge global market and rapid growth for e-Learning. Multiple Choice Tests (MCTs) are a popular form of assessment and are quite frequently used by many e-Learning applications as they are well adapted to assessing factual, conceptual and procedural information. In this thesis, we present an alternative to the lengthy and time-consuming activity of developing MCTs by proposing a Natural Language Processing (NLP) based approach that relies on semantic relations extracted using Information Extraction to automatically generate MCTs. Information Extraction (IE) is an NLP field used to recognise the most important entities present in a text, and the relations between those concepts, regardless of their surface realisations. In IE, text is processed at a semantic level that allows the partial representation of the meaning of a sentence to be produced. IE has two major subtasks: Named Entity Recognition (NER) and Relation Extraction (RE). In this work, we present two unsupervised RE approaches (surface-based and dependency-based). The aim of both approaches is to identify the most important semantic relations in a document without assigning explicit labels to them in order to ensure broad coverage, unrestricted to predefined types of relations. In the surface-based approach, we examined different surface pattern types, each implementing different assumptions about the linguistic expression of semantic relations between named entities while in the dependency-based approach we explored how dependency relations based on dependency trees can be helpful in extracting relations between named entities. Our findings indicate that the presented approaches are capable of achieving high precision rates. Our experiments make use of traditional, manually compiled corpora along with similar corpora automatically collected from the Web. We found that an automatically collected web corpus is still unable to ensure the same level of topic relevance as attained in manually compiled traditional corpora. Comparison between the surface-based and the dependency-based approaches revealed that the dependency-based approach performs better. Our research enabled us to automatically generate questions regarding the important concepts present in a domain by relying on unsupervised relation extraction approaches as extracted semantic relations allow us to identify key information in a sentence. The extracted patterns (semantic relations) are then automatically transformed into questions. In the surface-based approach, questions are automatically generated from sentences matched by the extracted surface-based semantic pattern which relies on a certain set of rules. Conversely, in the dependency-based approach questions are automatically generated by traversing the dependency tree of extracted sentence matched by the dependency-based semantic patterns. The MCQ systems produced from these surface-based and dependency-based semantic patterns were extrinsically evaluated by two domain experts in terms of questions and distractors readability, usefulness of semantic relations, relevance, acceptability of questions and distractors and overall MCQ usability. The evaluation results revealed that the MCQ system based on dependency-based semantic relations performed better than the surface-based one. A major outcome of this work is an integrated system for MCQ generation that has been evaluated by potential end users.

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