<p>As the embedded devices has become more and more generalized and as their product cycles keeps shrinking the field has opened up for the Application Specific Instruction set Processor. A mix between the classic generalized microcontroller and the specialized ASIC the ASIP keeps a set of general processing instructions for executing embedded software but combines that with a set of heavily specialized instructions for speeding up the data intense application core algorithms. One important aspect of the ASIP design flow</p><p>research is cutting design time and cost. One way of that is automation of the instruction set design. In order to do so a process is needed where the algorithm to be ASIPed is analyzed and critical operations are found and exposed so that they can be implemented in special hardware. This process is called profiling. This thesis describes an implementation of a fine grained source code profiler for use in an ASIP design flow. The profiler software is based on a static-dynamic workflow where data is assembled from both static</p><p>analysis and dynamic execution of the program and then analyzed together in an specially made analysis software.</p>

We propose in this paper an algebraic approach to hard-ware/software partitioning in Verilog Hardware Description Language (HDL). We explore a collection of algebraic laws for Verilog programs, from which we design a set of syntax-based algebraic rules to conduct hardware/software partitioning. The co-specification language and the target hardware and software description languages are specific subsets of Verilog. Through this, we confirm successful verification for the correctness of the partitioning process by an algebra of Verilog. Facilitated by Verilog’s rich features, we have also successfully studied hw/sw partitioning for environment-driven systems. / Singapore-MIT Alliance (SMA)

Advances in microelectronics allow the integration of more andmore functionality on a single chip. Emerging system-on-a-chiparchitectures include a large amount of heterogeneous componentsand are of increasing complexity. Applications using thesearchitectures require many low-level details in order to yield anefficient implementation. On the other hand constanttime-to-market pressure on electronic systems demands a shortdesign process that allows to model a system at a highabstraction level, not taking low-level implementation detailsinto account. Clearly there is a significant abstraction gapbetween an ideal model for specification and another one forimplementation. This abstraction gap has to be addressed bymethodologies for electronic system design. This thesis presents the ForSyDe (Formal System Design)methodology, which has been developed with the objective to movesystem design to a higher level of abstraction and to bridge theabstraction gap by transformational design refinement. ForSyDe isbased on carefully selected formal foundations. The initialspecification model uses a synchronous model of computation,which separates communication from computation and has anabstract notion of time. ForSyDe uses the concept of processconstructors to implement the synchronous model, to allow fordesign transformation and the mapping of a refined model onto thetarget architecture. The specification model is refined into adetailed implementation model by the stepwise application ofwell-defined design transformation rules. These rules are eithersemantic preserving or they inflict a design decision modifyingthe semantics. These design decisions are used to introduce thelow-level implementation details that are needed for an efficientimplementation. The implementation model is mapped onto thecomponents of the target architecture. At present ForSyDe modelscan be mapped onto VHDL or C/C++ in order to allow commercialtools to generate custom hardware or sequential software. Thethesis uses a digital equalizer to illustrate the concepts andpotential of ForSyDe. Electronic System Design, Hardware/Software Co-Design,Electrical Engineering

The increasing demand towards products and services that perfectly matches the customer needs is evident, so the manufacturing trends are aiming to produce small unit of customized product in large total volumes. The advances in manufacturing and information technologies provided great opportunities to achieve cost-effective mass customization. The purpose of this study was to have a holistic view on under-standing how entrepreneurs in small companies employ and effectively manage mass customization realization. The focus was placed in identifying what are the major factors that influence successful mass customization, how available technologies are enabling this process and how companies achieve value co-creation with the customers. In order to study the practical implementation of mass customization four case studies have been conducted. The information gathered was categorized and the preliminary theoretical framework was used as a template to compare the empirical results. The results show that every strategy for mass customization has to be customizes according to the particular product/service, market, customers, and the available technology for cost efficient implementation of mass customization. In a mass customization system value co-creation is achieved by direct customer integration and is benefiting from economies of integration. The challenge is to balance the system to the right degree, so socially and technologically efficient environment can bring higher value for the customers and better business opportunities for the companies. / This Master Thesis project has been carried out as part of "Production Development and Management" Program at JTH and "Information Technology and Management" program at JIBS.

Problem: In today’s business markets companies are faced with new challenges occurring from globalization, new technologies, deregulation, blurring borders between industries, and outsourcing which change the competitive environment in the market. To deal with these challenges organizations are forced to look for new and innovative ways to differentiate themselves from competitors and to satisfy customers’ demands for more customized products and services. Additionally, nowadays customers strive for fulfilling their needs by being more active. Value co-creation, the collaboration between companies and customers, is as a solution of current interest to cope with these challenges. Due to the close linkage between retailers and customers, value co-creation is of high interest for this part of the SC. Hence, this thesis focuses on the retailer-customer context and co-creation in terms of co-designing of bikes. Purpose: The purpose of this Master of Science thesis is to investigate how and why retailers and customers co-create value. Therefore, retailers’ and customers’ potential motivators, the interaction between them and the actors’ potential outcomes are explored. Method: This thesis conducts an exploratory and qualitative investigation of three case companies; Bike by Me, myownbike, and 718 Cyclery. The empirical material is gathered from interviews with the CEOs of the three companies, the retailers’ customers, and potential customers. The findings have been analyzed using a framework developed based on existing literature, stated in the frame of reference, which is improved by this thesis’ findings. Conclusions: Customers and retailers co-create value due to different potential motivators and outcomes. Retailers are motivated by aspects such as increases in competitive advantage, differentiation, customer loyalty, and better understanding of new needs. Customers’ motivators are amongst others the product itself, individuality, and enjoyment. As retailers’ outcomes increased efficiency and effectiveness, new customer acquisition, and the establishment of long-term relationships are identified. Customers’ outcomes are high customer satisfaction, new knowledge, convenience, and financial aspects. Actions between retailers and customers in value co-creation are identified through a learning phase and an innovation phase. The retailer participates through providing information, the platform for co-creation, and suggestions and assistance. The customers collaborate in terms of designing the product, expression of desires and experiences, feedback, and WOM in interaction with other customers.

Dolby AC-3, the audio signal compression standard adopted by the United States Advanced Television System Committee (ATSC), and wildly used in other applications DVD and digital TV. In order to improve the compression quality, the AC-3 defines two block lengths for IMDCT, one 512-pt.(long block) and the other 256-pt.(short block,). In the thesis, we realize the AC-3 audio decoder on the ARM-based platform. Our simulation results show that the IMDCT takes about 66% computation time of all decode process. Since the pure software decoding time cannot meet the real time requirement in many high speed applications, we design and implement the IMDCT hardware architecture considering of shore/long transform, the memory allocation for IMDCT, and use look-up tables to reduce the computation load. The HW/SW co-design on the ARM-based platform achieves the real-time requirements.

<p>Advances in microelectronics allow the integration of more andmore functionality on a single chip. Emerging system-on-a-chiparchitectures include a large amount of heterogeneous componentsand are of increasing complexity. Applications using thesearchitectures require many low-level details in order to yield anefficient implementation. On the other hand constanttime-to-market pressure on electronic systems demands a shortdesign process that allows to model a system at a highabstraction level, not taking low-level implementation detailsinto account. Clearly there is a significant abstraction gapbetween an ideal model for specification and another one forimplementation. This abstraction gap has to be addressed bymethodologies for electronic system design.</p><p>This thesis presents the ForSyDe (Formal System Design)methodology, which has been developed with the objective to movesystem design to a higher level of abstraction and to bridge theabstraction gap by transformational design refinement. ForSyDe isbased on carefully selected formal foundations. The initialspecification model uses a synchronous model of computation,which separates communication from computation and has anabstract notion of time. ForSyDe uses the concept of processconstructors to implement the synchronous model, to allow fordesign transformation and the mapping of a refined model onto thetarget architecture. The specification model is refined into adetailed implementation model by the stepwise application ofwell-defined design transformation rules. These rules are eithersemantic preserving or they inflict a design decision modifyingthe semantics. These design decisions are used to introduce thelow-level implementation details that are needed for an efficientimplementation. The implementation model is mapped onto thecomponents of the target architecture. At present ForSyDe modelscan be mapped onto VHDL or C/C++ in order to allow commercialtools to generate custom hardware or sequential software. Thethesis uses a digital equalizer to illustrate the concepts andpotential of ForSyDe.</p><p>Electronic System Design, Hardware/Software Co-Design,Electrical Engineering</p>

No description available.

Teachers, locals, a designer, communities, students, materials and co-design are the resources of this written report. These elements have tried to find a balance between each other during the process to stimulate the core of the project: a sustainable future in the local community of Älmhult. Starting of through of changing the global perspective of education to a more local sharing-learning experiences, the project made a turn to focus more on a problematic community namely that of Älmhult, Sweden. This local community has in the recent years changed dramatically because of growth in population and cultures. The community in which international and local do not mingle enough, has split. Instead of using these possibilities of learning from each other’s cultures and languages they have decided to live in mostly separate communities. Through the course of this project a network was built of people from both these communities to start building a stronger community in Älmhult. Education has been used as tool to stimulate this change, bringing the local community to the students. Teaching the students about strong communities they are the tool to develop this into the future. Thereby the student is the seed of change. The project has worked with co-design, using the tools to connect teachers and local initiators to create these meetings between student and local community. The research can be a learning tool to build communities, by using the knowledge of its inhabitants.

As the embedded devices has become more and more generalized and as their product cycles keeps shrinking the field has opened up for the Application Specific Instruction set Processor. A mix between the classic generalized microcontroller and the specialized ASIC the ASIP keeps a set of general processing instructions for executing embedded software but combines that with a set of heavily specialized instructions for speeding up the data intense application core algorithms. One important aspect of the ASIP design flow research is cutting design time and cost. One way of that is automation of the instruction set design. In order to do so a process is needed where the algorithm to be ASIPed is analyzed and critical operations are found and exposed so that they can be implemented in special hardware. This process is called profiling. This thesis describes an implementation of a fine grained source code profiler for use in an ASIP design flow. The profiler software is based on a static-dynamic workflow where data is assembled from both static analysis and dynamic execution of the program and then analyzed together in an specially made analysis software.