Experimental research on high-power converters, particularly in an academic environment, faces severe infrastructural constraints. Usually, power source and loads of required ratings are not available. Further, more importantly, the energy consumption is huge. One possibility is to establish an experimental research platform, comprising of a network of high-power converters, through which power is circulated and which draws only the losses from the mains. This work deals with the establishment of a circulating power test set-up, comprising of two line-side PWM converters, inclusive of control and modulation methods for the two converters. Two types of circulating power test setups are developed. In the first setup, the converters are connected in parallel, on ac as well as dc sides, such that real and/or reactive power is circulated between them. In the second test setup, the dc buses of the converters are separated; hence, only reactive power circulation is possible. These setups are used to conduct heat-run tests with low energy expenditure on the PWM converters at various operating conditions up to power levels of 150 kVA. Further, these are used to validate analytically-evaluated thermal characteristics of high-power PWM converters. A safe thermal limit is derived for such converters in terms of apparent power (kVA) handled, power factor and switching frequency. The effects of voltage sag and of unequal current sharing between parallel IGBT modules on the safe thermal limit are studied. While the power drawn by the circulating-power setup from the grid is much lower than the ratings of the individual converters, the harmonic injection into the mains by the setup could be significant since the harmonics drawn by both converters tend to add up. This thesis investigates carrier interleaving to improve the waveform quality of grid current, drawn by the circulating-power test setup. The study of carrier interleaving is quite general and covers various applications of parallel-connected converters such as unity power factor rectification, static reactive power compensation and grid-connected renewable energy systems. In literature, carrier interleaving has been employed mainly for unity power factor rectifiers, sharing a common dc load equally. In such case, the fundamental components of the terminal voltages of the parallel converters are equal. However, when the power sharing between the two converters is unequal, or when power is circulated between the two converters, the terminal voltages of the two converters are not equal. A method to estimate rms grid current ripple, drawn by parallel-connected converters with equal and/or unequal terminal voltages, in a synchronous reference frame is presented. Further, the influence of carrier interleaving on the rms grid current ripple is studied. The optimum interleaving angle, which minimizes the rms grid current ripple under various applications, is investigated. This angle is found to be a function of modulation index of the converters in the equal terminal voltages case. In the unequal terminal voltages case, the optimum interleaving angle is shown to be a function of the average modulation index of the two parallel converters. The effect of carrier interleaving is experimentally studied on the reactive power circulation setup at different values of kVA and different dc bus voltages. The grid current ripple is measured for different values of interleaving angle. It is found experimentally that the optimum interleaving angle reduces the rms grid current ripple by between 37% and 48%, as compared without interleaving, at various operating conditions. Further, the reactive power circulation test set-up is used to evaluate and compare power conversion losses corresponding to different PWM techniques such as conventional space-vector PWM (CSVPWM), bus-clamping PWM (BCPWM) and advanced bus-clamping PWM methods for static reactive power compensator (STATCOM) application at high power levels. It is demonstrated theoretically as well as experimentally that an advanced bus-clamping PWM method, termed minimum switching loss PWM (MSLPWM), leads to significantly lower power conversion loss than CSVPWM and BCPWM techniques at a given average switching frequency.

Doctor of Philosophy / Department of Electrical and Computer Engineering / Behrooz Mirafzal / Corrective schemes for facilitating continued operation of dc-ac converters during internal and external abnormalities are presented in this dissertation. While some of the developed techniques are suited for any dc-ac converter topology, most of the presented methodologies are designed specifically for cascaded H-bridge (CHB) multilevel converters. While CHB provide increased scalability and efficiency compared to traditional topologies, these converters are more likely to experience internal faults due to the additional components required. Realizing the full potential of CHB converters requires fault tolerant techniques, such as those demonstrated in this dissertation. Adaptive sinusoidal pulse width modulation (ASPWM) is introduced in this dissertation as a method which enables CHB to directly utilize time-variant dc sources, increasing CHB flexibility when compared to traditional pulse width modulation (PWM) methods which require dc sources with equal magnitudes or with magnitudes existing in specific ratios. Two alternative algorithms are presented to enable ASPWM implementation, providing a trade off between system performance and required sensor circuitry. This dissertation also introduces a load independent analytical approach for identifying discordant operating points, i.e. operating points where some cells in an asymmetric CHB leg regenerate power while the overall leg delivers power, or vice-versa. Identification of these points is essential due to the deleterious effects which can result from extended discordant operation, for instance overcharging of batteries leading to lifespan degradation or even catastrophic failures such as fires or explosions. Additionally, a method for rapidly identifying, isolating, and verifying internal IGBT open-circuit and gate-driver faults is presented in this dissertation to address the increased probability of switch failures occurring within CHB. The proposed approach enables converter operation to continue in the event of gate-driver or open-circuit faults, but avoids unnecessary converter reconfiguration due to gate-misfiring faults. For a CHB leg with M cells, the proposed technique identifies and isolates open-circuit switch faults in less than 2M measurement (sampling) cycles, and verification is completed in less than one full fundamental cycle. Furthermore, this dissertation introduces a real-time implementable atypical PWM technique which enables increased dc bus utilization under a wide range of non-ideal operating conditions. While this approach is suitable for a wide range of converters operating under external abnormalities, for instance maximizing dc bus utilization for converters providing auxiliary services such as negative-sequence compensation, this approach also facilitates operation of CHB with faulty cells. The proposed method can be used with any control technique and any carrier-based PWM method, enabling its implementation in both symmetric and asymmetric CHB. In addition to these fault tolerant techniques, a novel approach for analyzing the active- and reactive-power deliverable by grid-interactive converters is proposed. This method facilitates performance comparisons for various converter configurations, simplifying the process for selecting filter components, dc bus voltages, and other system parameters. This analytical approach also enables converter performance to be analyzed during internal and external fault events, allowing assessment of converter robustness. The efficacy of the developed techniques are supported by MATLAB/Simulink simulations as well as experimental data obtained using a laboratory-scale cascaded H-bridge multilevel converter.

This thesis presents the simulation, design, and hardware implementation of a modified multiphase boost converter. Converter design must consider noise imposed on input and output nodes which connect to and influence the operation of other devices. Excessive noise introduces EMI which can damage sensitive circuits or impede their operation. High ripple current degrades battery lifetime and reduces operating efficiency in connected systems such as PV arrays. Converters with high ripple current also experience greater peak conduction loss and require larger components. A two-phase implementation of a modified boost converter demonstrates the input current filtering benefits of the modified topology with increased power capacity. In a 12V to 19V 95W design, the modified multiphase design exhibits a reduced input current ripple of 1.103% compared to the 9.096% of the standard multiphase design while imposing minimal detriment to overall converter efficiency. The modified topology uses two inductors and one feedback capacitance per phase. Larger value inductors generally exhibit lower current ratings as well as larger size. The split inductance of the modified multiphase topology can be designed for occupation of less total volume than the single inductance of the standard multiphase topology.

Indiana University-Purdue University Indianapolis (IUPUI) / The inner structural characteristics of non-minimum phase DC-DC converters pose a severe limitation in direct regulation of voltage when addressed from a control perspective. This constraint is reflected by the presence of right half plane zeros or the unstable zero dynamics of the output voltage of these converters. The existing controllers make use of one-to-one correspondence between the voltage and current equilibriums of the non-minimum phase converters and exploit the property that when the average output of these converters is the inductor current, the system dynamics are stable and hence they indirectly regulate the voltage. As a result, the system performance is susceptible to circuit parameter and load variation and require additional controllers, which in turn increase the system complexity. In this thesis, a novel approach to this problem is proposed for second order non-minimum phase converters such as Boost and Buck-Boost Converter. Different solutions have been suggested to the problem based on whether the converter is modeled as a linear system or as a nonlinear system. For the converter modeled as a linear system, the non-minimum phase part of the system is decoupled and its transfer function is converted to minimum phase using a parallel compensator. Then the control action is achieved by using a simple proportional gain controller. This method accelerates the transient response of the converter, reduces the initial undershoot in the response, and considerably reduces the oscillations in the transient response. Simulation results demonstrate the effectiveness of the proposed approach. When the converter is modeled as a bilinear system, it preserves the stabilizing nonlinearities of the system. Hence, a more effective control approach is adopted by using Passivity properties. In this approach, the non-minimum phase converter system is viewed from an energy-based perspective and the property of passivity is used to achieve stable zero dynamics of the output voltage. A system is passive if its rate of energy storage is less than the supply rate i.e. the system dissipates more energy than stores. As a result, the energy storage function of the system is less than the supply rate function. Non-minimum phase systems are not passive, and passivation of non-minimum phase power converters is an attractive solution to the posed problem. Stability of non-minimum phase systems can also be investigated by defining the passivity indices. This research approaches the problem by characterizing the degree of passivity i.e. the amount of damping in the system, from passivity indices. Thus, the problem is viewed from a system level rather than from a circuit level description. This method uses feed-forward passivation to compensate for the shortage of passivity in the non-minimum phase converter and makes use of a parallel interconnection to the open-loop system to attain exponentially stable zero dynamics of the output voltage. Detailed analytical analysis regarding the control structure and passivation process is performed on a buck-boost converter. Simulation and experimental results carried out on the test bed validate the effectiveness of the proposed method.

The move toward electric vehicles (EVs) has a significant impact to reduce greenhouse gas (GHG) emissions and make transportation more eco-friendly. Fast-charging stations play a crucial role in this transition, making EVs more convenient for adoption specifically when driving in long distance. However, the challenge is to create a fast-charging system that can work with the different types of EVs and their varying power needs while still being efficient and effective. In this context, this thesis embarks on this journey by introducing an innovative solution for efficient universal fast charging, spanning both low voltage and high voltage battery systems. A novel, configurable dual secondary resonant converter is proposed, which empowers the charging module to extend its output range without imposing additional demands on the resonant tank components. This solution addresses the pressing need for a wide output voltage range in fast-charging standard in the growing EV landscape. To ensure optimal performance across a broad voltage and power range, the thesis employs an analytical model for LLC resonant converters to optimize the resonant components. This strategic component selection aims to achieve the desired output voltage and power range while minimizing conduction losses. The proposed topology and design methodology are rigorously validated through the development of a 10 kW prototype. Furthermore, the study introduces a two degrees of freedom (2DoF) control scheme for the proposed LLC resonant converter with the configurable dual secondary LLC converter topology. An analytical model is formulated to guide the selection of control parameters, ensuring coverage of the desired output voltage and power range without compromising system efficiency. The steady-state analytical model is utilized for determining optimized control parameters at each operating point within the converter's output range. To enhance the charging module's power density and efficiency, a high-frequency litz-wire transformer design methodology is introduced. The transformer's core size is optimized to achieve high power density and efficiency, while the winding configuration is chosen to minimize conduction losses. Finite Element Analysis (FEA) simulations validate transformer losses and operating temperatures. The culmination of this research is the development of a 30 kW charging module prototype. This prototype features an LLC resonant converter with a configurable dual secondary and two degrees of freedom control for output voltage control. The component ratings, estimated losses, and power board design are carefully considered to create a compact and efficient charging module. Experimental testing across a universal output voltage and power range con rms the effectiveness of the proposed solution. In summary, this thesis presents a comprehensive approach to design of a module for EV fast charging application addressing voltage range, efficiency, and component optimization, resulting in the successful development of a high-performance charging module prototype. / Thesis / Doctor of Engineering (DEng)

付記する学位プログラム名: 京都大学卓越大学院プログラム「先端光・電子デバイス創成学」 / 京都大学 / 新制・課程博士 / 博士(工学) / 甲第24620号 / 工博第5126号 / 新制||工||1980(附属図書館) / 京都大学大学院工学研究科電気工学専攻 / (主査)教授 土居 伸二, 教授 小嶋 浩嗣, 准教授 薄 良彦, 教授 引原 隆士 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

Front-end converters with power factor correction (PFC) capability are widely used in distributed power systems (DPSs). Most of the front-end converters are implemented using a two-stage approach, which consists of a PFC stage followed by a DC/DC converter. The purpose of the front-end converter is to regulate the DC output voltage, supply all the load converters connected to the distributed bus, guarantee current sharing, and charge a bank of batteries to provide backup energy when the power grid breaks down. One of the main concerns of the power supply industry is to obtain a front-end converter with a low-cost PFC stage, while still complying with required harmonic standards, especially for high-power three-phase applications. Having this statement in mind, the main objective of this dissertation is to study front-end converters for DPS applications with PFC to meet harmonic standards, while still maintaining low cost and performance indices. To realize the many aforementioned objectives, this dissertation is divided into two main parts: (1) two-stage front-end converters suitable for telecom applications, and (2) single-stage low-cost AC/DC converters suitable for mainframe computers and server applications. The use of discontinuous conduction mode (DCM) boost rectifiers is extensively explored to achieve simplicity, while reducing the cost for DPS applications. Interleaving of DCM boost rectifiers is also explored as an alternative approach to further reduce the system cost by reducing the filtering requirements. All the solutions discussed are implemented for 3kW applications, while 6kW is obtained by interleaving two converters. / Ph. D.

The objective of the thesis is to introduce a new fuzzy logic control application, develop the associated mathematical theory and prove the concept and its advantages through comparative simulation with existing, classical, methods. A stable fuzzy logic controller for the master-slave current sharing loop of a paralleled DC-DC system is presented that exhibits a considerably improved large signal performance over the presently employed, small signal designed compensators, both in terms of system response and control effort. Because of high system complexity, the present small signal designs are unable to give a good response for large load changes and line transients. Fuzzy logic, by dealing naturally with nonlinearities, offers a superior controller type, for this type of applications. The design uses a PID expert to derive the fuzzy inference rules, and simulation results show a good parameter insensitive transient response over a wide range load-step responses, e.g., from 25% to 75% of the nominal load. Current sharing control is formulated as a tracking problem and stability is ensured through adaptation or supervisory control on a Lyapunov trajectory. The technique benefits also from the heuristic approach to the problem that overcomes the complexity in modeling such systems and, hence, offers a practical engineering tool, amenable to both analog and digital implementations. / Ph. D.

A computer-aided design procedure has been developed to determine the minimum weight design solutions, for singly wound EE- and EI-cored inductors that perform the functions of energy storage and transfer in switching DC–DC power converters. Three converter topologies, namely the Buck, the Boost, and the Buck/Boost have been considered in implementing the closed form Lagrange Multiplier-based solution to the design problem. A notable feature is the interactive use of design graphs to facilitate a trade-off study between the weight of the inductor, the total losses in the inductor and the peak current stress in the switching transistor and diode. Thus useful insight is obtained by bringing aspects of converter design into view. Practical core and magnetic material data from manufacturer's catalogs can be specified and the design optimized for the minimal weight. / Master of Science

The large-signal transient response of duty ratio controlled dc-to-dc converters is investigated using the phase-plane technique. The transition pattern of large-signal trajectories is provided in terms of the circuit parameter and operating conditions. Several transient trajectories of practical interest including start-up, step input voltage change and step-load change are analyzed. The effect of large-signal characteristics of the feedback controller on the transient trajectory is presented. / Master of Science