<p>Acreo AB has developed a radar prototype used for illustrate how the SiGe technology could be used. The radar prototype needs further development with a fast interface and a more integrated design. The beginning of the report describes the radar technique theory and the composing equations. The theoretical background is used to explain each component of the system. The report continues by specifying the target of the next radar prototype. The chosen implementation is motivated and the mode of procedure is described in detail. Test benches were used to verify correct functionality and some limits were found. The report is concluded with test results and recommendations on further enhancements.</p> / <p>Acreo AB har utvecklat en radarprototyp för att illustrera hur SiGe teknologi kan användas. Prototypen behöver vidareutvecklas med ett snabbt digitalt interface och en kompaktare design. Rapporten inleds med att beskriva radarteknikens funktionalitet och de utgörande ekvationerna. Den teoretiska bakgrunden används för att förklara varje komponent som systemet utgörs av. Rapporten fortsätter med att specificera målet med nästa radarprototyp. Den valda implementationen motiveras och tillvägagångssättet beskrivs detaljerat. Testuppkopplingar verifierade korrekt funktionalitet och begränsningar insågs. Rapporten avslutas med en sammanfattning av uppnådda testresultat och rekommendationer på framtida förbättringar.</p>

Acreo AB has developed a radar prototype used for illustrate how the SiGe technology could be used. The radar prototype needs further development with a fast interface and a more integrated design. The beginning of the report describes the radar technique theory and the composing equations. The theoretical background is used to explain each component of the system. The report continues by specifying the target of the next radar prototype. The chosen implementation is motivated and the mode of procedure is described in detail. Test benches were used to verify correct functionality and some limits were found. The report is concluded with test results and recommendations on further enhancements. / Acreo AB har utvecklat en radarprototyp för att illustrera hur SiGe teknologi kan användas. Prototypen behöver vidareutvecklas med ett snabbt digitalt interface och en kompaktare design. Rapporten inleds med att beskriva radarteknikens funktionalitet och de utgörande ekvationerna. Den teoretiska bakgrunden används för att förklara varje komponent som systemet utgörs av. Rapporten fortsätter med att specificera målet med nästa radarprototyp. Den valda implementationen motiveras och tillvägagångssättet beskrivs detaljerat. Testuppkopplingar verifierade korrekt funktionalitet och begränsningar insågs. Rapporten avslutas med en sammanfattning av uppnådda testresultat och rekommendationer på framtida förbättringar.

Bus interfaces keep getting faster and thus requiring designers to build custom physical fabrics that are able to delay clock and(or) data, on their transmitter and receivers, in order to properly receive and send data with enough setup and hold times. Delay locked loops (DLLs) have become fundamental building blocks that address such problems. Not only are they present in physical layers in integrated circuits but they also solve the problem of VLSI systems that suffer from clock skew and jitter. This report focuses on the implementation of a standard DLL and three different voltage controlled delay topologies. The different topologies are designed and compared for metrics such as linearity, delay range, and sensitivity to power supply. / text

Orientador: Nobuo Oki / Banca: Carlos Antonio Alves / Banca: Ailton Akira Shinoda / Banca: José Raimundo de Oliveira / Banca: José Ricardo Descardeci / Resumo: Sintetizadores de frequência são circuitos críticos usados largamente em muitas aplicações de temporização. Circuitos PLL apresentam uma boa solução para temporização, mas utilizam geralmente blocos analógicos que são facilmente influenciados em desempenho devidos a instabilidades inerentes aos processos de fabricação e ruídos. Com a evolução dos circuitos e ferramentas para sistemas digitais foi possível a implementação de circuitos que utilizem somente recursos digitais tais como os DLL. Um dos papéis dos sintetizadores é equalizar a fase de um sinal de clock em relação a uma segunda referência adicionando fase entre os sinais. Este trabalho tem como objetivo o desenvolvimento de um circuito DLL com arquitetura flexível e programável para utilização no ajuste de fase e recuperação de sinais. Os blocos digitais foram implementados utilizando ferramentas de alto nível de abstração para avaliação do comportamento funcional. O objetivo final é a implementação do circuito validado em tecnologia CMOS 350 nm da AMS / Abstract: Frequency Synthesizers are critical circuits widely used in timing applications. PLLs devices had showed a good solution for timing, but they normally because the use analog building blocks that are often influenced by the subtract building process and noises. Nevertheless, after the evolution of complex circuits and development tools it had been possible the implementation of systems that implement only digital resource such as DLL. One of major goals of synthesizers is to equalize the phase between a clock signal and a second reference. This work aims to develop DLL devices that are built in a flexible and reprogrammable architecture for using in decrements or increments in the phase and clock recovery. Digital blocks were implemented using high level abstraction tools for analysis of functional behavior. The main objective is the circuit implementation and validations in CMOS .35 AMS process / Doutor

abstract: Purpose: The present study examined grammatical gender use in child Spanish heritage speakers (HSs) in order to determine whether the differences observed in their grammar, when compared to Spanish monolinguals, stem from an incompletely acquired grammar, in which development stops, or from a restructuring process, in which features from the dominant and the weaker language converge to form a new grammatical system. In addition, this study evaluated whether the differences usually found in comprehension are also present in production. Finally, this study evaluates if HSs differences are the result of the input available to them. Method: One-hundred and four typically developing children, 48 HSs and 58 monolingual, were selected based on two age groups (Preschool vs. 3rd Grade). Two comprehension and three production experimental tasks were designed for the three different grammatical structures where Spanish expresses gender (determiners, adjectives, and clitic pronouns). Linear mixed-models were used to examine main effects between groups and grammatical structures. Results: Results from this study showed that HSs scored significantly lower than monolingual speakers in all tasks and structures; however, 3rd-Grade HSs had higher accuracy than PK-HSs. Error patterns were similar between monolinguals and HSs. Moreover, the commonly reported overgeneralization of the masculine form seems to decrease as HSs get older. Conclusion: These results suggest that HSs’ do not face a case of Incomplete Acquisition or Restructured Grammatical gender system, but instead follow a protracted language development in which grammatical skills continue to develop after preschool years and follow the same developmental patterns as monolingual children / Dissertation/Thesis / Doctoral Dissertation Speech and Hearing Science 2018

Building Information Modeling -BIM- is an innovative method to seamlessly bridgecommunication within the architecture, engineering and construction industries.With BIM software you can exchange information during the design, construction,and maintaining. BIM can be seen as a continuation of the CAD software, wherethe users exchanged information by word of mouth, now is made automatically.To get the effect required for BIM one or more CAD-systems have to work togetherto exchange information. Revit Architecture is an application by Autodeskwhere BIM is used from the design and construction to the documentation andmaintaining of a building. Configura is one of the major software developers of interiorsolutions and want to integrate their software with Revit Architecture. Theconcept of objects in both software system suit well to be used in BIM and witha live connection these could be shared between the applications. One of the conclusionsin this investigation was that the only way to have integration betweenthe applications was to use the API provided by Autodesk. And therefore theimplementation is limited to the function in it. Revit API is a powerful programmingenvironment that let 3rd party software extend the functionality in Revit.The results show how Remote Procedure Call as a communication tool can beused to exchange data between the applications, how different type of data can berepresented in both applications, and why we cannot have a live synchronization.

An OpenGL applications usually renders to a single frame. Multi-view or 3D displays on the other hand, needs more more images representing different viewing directions on the same scene, but modifying a large number of applications would be unsuitable and problematic. However, intercepting and modifying these calls before they reach the GPU would dramatically decrease the amount of work needed to support a large number of applications on a new type of multi-view or 3D display. This thesis describes different ways on intercepting, enqueueing and replaying these calls to support rendering form different view points. Intercepting with both an own implementation of opengl32.dll and an OpenGL driver is discussed, and enqueueing using classes, function pointers and enumeration of functions is tried. The different techniques are discussed quickly with the focus being a working implementation. This resulting in an fully blown OpenGL interceptor with the ability to enqueue and replay a frame multiple times while modifying parameters such as the projection matrix. This implementation uses an own implementation of opengl32.dll that is placed in the application directory to be loaded before the real one. Enqueueing is performed by enumerating all OpenGL calls, pushing this enumeration value and all call data to a list Replaying is done by reading the same list and calling the function pointer associated with the enumeration value with the data in the list.

Distal-less (Dll) is a master regulator gene responsible for proximal-distal axis formation as well as distal appendage identity. Previous research showed that the expression of Dll is maintained through a feedback loop with Disco, a C2H2 zinc finger transcription factor. In this project I investigate recent suggestions that disco may play additional roles as a cofactor or downstream target of Dll during appendage development. I confirm previous research that the presence of Dll is sufficient to turn on disco. I found that the presence of ectopic Dll in the wing discs activates Dll subordinate genes in cells where they are not normally expressed. I again performed experiments confirming previous reports that ectopic expression of Dll in the wing tissue is sufficient to cause the appearance of ectopic legs. I then showed that when Dll is expressed ectopically in the absence of disco, there ectopic appendages similar to those formed in the presence of disco. Put together, my results suggest that disco is does not function as a cofactor or downstream target required for the development and differentiation of Drosophila ventral appendages. / Thesis / Master of Science (MSc)

Nous présentons une caméra à balayage de fente intégrée basée sur un système de comptage de photon unique résolu en temps (TCSPC-SC) employant l'architecture linéaire « streak » pour surmonter la limitation de l'espace inhérent aux systèmes TCSPC bidimensionnels. Cette solution permet l'intégration de fonctionnalités électroniques complexes dans les pixels sans l'inconvénient d'un faible facteur de remplissage conduisant à une faible efficacité de détection. Le TCSPC-SC se compose de deux blocs principaux: une photodiode à avalanche (SPAD) et un bloc de mesure de temps, les deux blocs sont intégrés en technologie 180 nm CMOS standard. La structure de la SPAD utilisée a été sélectionnée parmi 6 structures différentes après un processus de caractérisation précise et approfondie. Le bloc de mesure du temps se compose d'un TOC hybride capable d'atteindre des résolutions de temps élevées et ajustables avec une large dynamique de mesure grâce à un système de conversion de temps (TOC) hybride qui combine l'approche analogique basée sur un convertisseur de temps vers amplitude(TAC), et les approches numériques utilisant une boucle à verrouillage de retard (DLL) et un compteur numérique. Le TOC hybride a été spécialement conçu pour être utilisé dans un système TCSPC qui intègre une ligne de TOC nécessitant ainsi une conception appropriée pour limiter la consommation d'énergie et la surface d'occupation et parvenir à une architecture flexible et facilement extensible. Suite à la conception et la réalisation de ces deux blocs dans une technologie180 nm CMOS standard, une structure de test de la caméra à balayage de fente (TCSPC-SC) qui englobe 8 unités a été réalisée dans le but final de mettre en œuvre un modèle TCSPC-SC complet et plus large. / In this work we present a TCSPC Streak Camera (TCSPC-SC) that takes advantage of the streak mode imaging ta overcome the space limitation inherent ta 20 TCSPC sensor arrays. This cost-effective solution allows the integration of complex functionalities in the pixel without the inconvenience of low fill factor that leads ta low detection efficiency. The TCSPC~SC consists of two main building blacks: a SPAD and a time measurement black bath integrated in 180 nm Standard CMOS technology. The SPAD was selected among 6 different SPAD structures following a thorough characterization process ta fully determine its performance figures. The time measurement black consists of a hybrid TOC capable of achieving high adjustable time resolutions with large dynamic range owing ta a time conversion scheme that combines traditional Analog Time to Amplitude Converter (TAC), Digital DLL-based and counter-based TOC. Furthermore, thehybrid TOC was especially designed ta be used in a TCSPC system that incorporates an array of TDCs which required a careful design ta limit power consumption and occupation area in order to achieve a flexible and easily scalable architecture. These two building blacks were bath fabricated in a 180 nm standard CMOS technology and employed ta demonstrate a TCSPC Streak Camera(TCSPC-SC) test structure that englobes 8 units in order ta demonstrate the system's operation principle with the final aim of implementing a complete and bigger TCSPC-SC model in the near future

T lymphocytes are considered an essential and advanced component of the immune system, since these cells are able to discriminate self from non-self, start up an immune reaction and further develop into memory cells. However, therapies based on the use of patient derived newly generated T cells reinoculated into humans do not exist. This is due to difficulties in replicating the peculiar conditions required for T cell development in vitro. The systems developed so far are based on the use of animal or unrelated human thymic tissue and therefore they would not be adequate to be used in any clinical application. Having conjectured that human skin cells, rearranged in a threedimensional fashion, would be able to support the development of human T lymphocytes from hematopoietic stem cells, we developed a model consisting of human skin keratinocytes and fibroblasts arrayed on a synthetic matrix so to create a prototype suitable to be translated into the clinic. In this way we were able to induce few hundred cord blood CD34⁺ haematopoietic stem cells to entirely develop into mature CD4⁺ or CD8⁺ T lymphocytes in vitro. However, circulating adult peripheral CD34⁺ precursors failed to survive in the same conditions. Finally we were able to explain our success as consequence of strong induction of the Notch delta ligand Dll-4 by the keratinocytes cultured in the construct. In synthesis, we report here for the first time that skin keratinocytes, in the presence of fibroblasts and reconfigured in a three-dimensional arrangement, are able to induce the differentiation of a minimal amount of cord but not adult blood stem cells into fully differentiated T cells by acting through the Dll-4 Notch signaling pathway in vitro.