Bandpass sigma-delta modulators combine oversampling and noise shaping to get very high resolution in a limited bandwidth. They are widely used in applications that require narrowband high-resolution conversion at high frequencies. In recent years interests have been seen in wireless system and software radio using sigma-delta modulators to digitize signals near the front end of radio receivers. Such applications necessitate clocking the modulators at a high frequency (MHz or above). Therefore a loop filter is required in continuous-time circuits (e.g., using transconductors and integrators) rather than discretetime circuits (e.g., using switched capacitors) where the maximum clocking rate is limited by the bandwidth of Opamp, switch’s speed and settling-time of the circuitry. In this work, the design of a CMOS fourth-order bandpass sigma-delta modulator clocking at 500 MHz for direct conversion of narrowband signals at 125 MHz is presented. A new calibration scheme is proposed for the best signal-to-noise-distortion-ratio (SNDR) of the modulator. The continuous-time loop filter is based on Gm-C resonators. A novel transconductance amplifier has been developed with high linearity at high frequency. Qfactor of filter is enhanced by tunable negative impedance which cancels the finite output impendence of OTA. The fourth-order modulator is implemented using 0.35 mm triplemetal standard analog CMOS technology. Postlayout simulation in CADENCE demonstrates that the modulator achieves a SNDR of 50 dB (~8 bit) performance over a 1 MHz bandwidth. The modulator’s power consumption is 302 mW from supply power of ± 1.65V.

In this thesis, a switched-current integrator with active amplifier feedback and dummy switch is proposed to increase the operation speed and reduce the non-ideal effects in traditional switched-current circuit. The active amplifier is designed in low gain and high bandwidth so that the oscillation can be avoided. We improve the operation speed and transmission error by the active amplifier feedback and reduce the CFT error by the dummy switch so that high resolution can be achieved. Then we apply the proposed integrator to the switched-current sigma-delta modulator. The sigma-delta modulator is simulated using TSMC 0.35£gm CMOS process with 3.3V power supply. We obtain 67dB PSNR, 66dB dynamic range(DR), and 40KHz bandwidth. The sampling frequency is 10.24MHz, the power supply is 3.3V and the power consumption is 19mW.

Thesis (M. Sc.)--University of Sydney, 1980. / Includes diagrams, graphs, tables. Bibliography: leaves 136-157. Also available in print form.

This study uses a 1375 km2 3D seismic dataset located in the late Miocene to Pliocene Mississippi River Delta in order to investigate the external characteristics, lithology, and evolution of channelized deposits within the seismic survey. Fluvial thicknesses range from about 11 m to 90 m and widths range from about 100 m to 31 km. Channel fill can be generalized as sandy with low impedance and high porosity (~ 35%), though heterogeneity can be high. Three distinct fluvial styles were recognized: incised valleys, channel-belts, and distributive channel networks. Fluvial styles were interpreted as a result of changes in sea-level and a speculative late Miocene to Pliocene Mississippi River Delta sea-level curve constructed using these relationships. Additionally, a characteristic interval between the major changes in fluvial style was found. These fluvial systems interact with and are affected by other elements in the landscape. Growth faults in particular are common within the survey area; however, the dynamic between fluvial systems and growth fault related subsidence has been poorly understood and so was also a focus of this project. Previous work as well as this study found little evidence that growth faults are able to affect the course or geometry of the majority of small (with most < 500 m in width and < 20 m in depth) channels. However, the relationship between growth faults and larger scale channel-belt systems (between 1 km and 5 km in width and > 25 m in depth) has not been previously evaluated in this area. In contrast to the majority of small distributary channels found within the survey, channel-belts appear to be steered by growth faults. Fluvial response or insensitivity to fault induced subsidence is related to the relative timescales of avulsion and faulting. Channel-belts are longer lived features than more ephemeral small distributary channels. Channel-belts, due to their relatively low mobility compared to small channels, are more likely to experience punctuated faulting events which results in greater apparent sensitivity to faulting than seen in small channels. / text

Bottom sediment from a 750-square-mile area offshore from the mouth of the Brazos River, Texas, has been analyzed statistically to determine the pattern and processes of sedimentation of the neritic environment and of a modern delta. The Brazos delta is characterized by topset beds of poorly sorted laminated sand, silt, and clay, foreset beds dipping at approximately 1° composed of fine sand grading downward (seaward) into clay, and poorly developed bottomset beds representing slow deposition of clay from the Brazos combined with reworking of material from a submerged Pleistocene deltaic plain. Interpretation of the sediment on the basis of its modal characteristics indicates that effective sorting by waves develops a unique uniform distribution of sediment types from the beach to a depth of 60 feet. Farther offshore from this depth exotic agents such as hurricanes and uncharted bottom currents are predominant and act to bring "obstacles" (topographic irregularities) into a marine profile of equilibrium. Maps of sediment types, mean size, inclusive standard deviation, inclusive skewness, and kurtosis precisely describe the geologic history of the surface sediments. Individual and bivariant plots of the statistical parameters are shown to be useful in determining direction to the shoreline as well as completely defining the modality of the sediment, which in effect defines the environment of deposition. Fluctuations in source area are reflected by the relation of mean size and depth. Heavy mineral distribution shows that the suite of durable minerals carried by the present Brazos River is diluting an existing widespread suite of less durable minerals characteristic of the Colorado River drainage area. Variation in clay mineral composition results from differential sedimentation and reflects source area, providing no evidence of alteration of the clay minerals during deposition by diagenesis. / text

This dissertation presents a novel [delta sigma] analog-to-digital converter architecture which replaces the operational amplifier-based integrator with a pair of tunable oscillators. A switched-capacitor V-I converter is used to combine the input voltage with a feedback DAC output and convert it into a current for two pseudo-differential current-controlled oscillators. The oscillator outputs are counted with a digital counter, and a digital back-end [delta sigma] modulator is used to truncate the high-resolution counter outputs for the feedback DAC path. This architecture has compelling advantages in deep sub-micron and emerging technologies where supply voltages are decreasing to a point that traditional analog architectures are no longer feasible. Additionally, this architecture takes advantage of the increased speed in these short-channel technologies. Measured results on a 6.08mW prototype in TSMC 0.18um achieving 63.5dB in a 2MHz bandwidth are presented. / text

Integrated temperature sensors play an important role in enhancing the performance of on-chip power and thermal management systems in today's highly-integrated system-on-chip (SoC) platforms, such as microprocessors. Accurate on-chip temperature measurement is essential to maximize the performance and reliability of these SoCs. However, due to non-uniform power consumption by different functional blocks, microprocessors have fairly large thermal gradient (and variation) across their chips. In the case of multi-core microprocessors for example, there are task-specific thermal gradients across different cores on the same die. As a result, multiple temperature sensors are needed to measure the temperature profile at all relevant coordinates of the chip. Subsequently, the results of the temperature measurements are used to take corrective measures to enhance the performance, or save the SoC from catastrophic over-heating situations which can cause permanent damage. Furthermore, in a large multi-core microprocessor, it is also imperative to continuously monitor potential hot-spots that are prone to thermal runaway. The locations of such hot spots depend on the operations and instruction the processor carries out at a given time. Due to practical limitations, it is an overkill to place a big size temperature sensor nearest to all possible hot spots. Thus, an ideal on-chip temperature sensor should have minimal area so that it can be placed non-invasively across the chip without drastically changing the chip floor plan. In addition, the power consumption of the sensors should be very low to reduce the power budget overhead of thermal monitoring system, and to minimize measurement inaccuracies due to self-heating. The objective of this research is to design an ultra-small size and ultra-low power temperature sensor such that it can be placed in the intimate proximity of all possible hot spots across the chip. The general idea is to use the leakage current of a reverse-bias p-n junction diode as an operand for temperature sensing. The tasks within this project are to examine the theoretical aspect of such sensors in both Silicon-On-Insulator (SOI), and bulk Complementary Metal-Oxide Semiconductor (CMOS) technologies, implement them in deep sub-micron technologies, and ultimately evaluate their performances, and compare them to existing solutions. / text

published_or_final_version / Environmental Management / Master / Master of Science in Environmental Management

Materials deposited in low-temperature environments are characterized by their small particle size. The activity of microorganisms in aqueous sedimentary environments may have effective impacts on the geochemical parameters, which consequently change the original mineralogical records. The characterization of the fine environmental materials, especially those related to the microbial mediation is usually overlooked, but is essential for studies in the field of environmental microbiology or records of environmental change. The Kamchatka volcanic hot springs have been extensively studied for their microbiology because of their unique geological setting and applications to our understanding of life in the extreme environment. In those hot springs, minerals commonly appear with various morphologies. The hot springs have been existed for 40,000 years. Authigenic minerals, such as clay minerals, silica, sulfur, sulfide, and sulfate were characterized. Two types of silica and silicified biota were observed. Elemental sulfur crystals were observed although they are thermodynamically unstable. Pyrite and gypsum showed high diversities in morphologies and crystal sizes. Single forms of pyrite crystals included: cube, pyritohedron, octahedron, and sphericities. Prismatic, prismatic pseudo-hexagonal, fibrous, tubular, lenticular and twinned gypsum crystals were observed. The co-existence of diverse crystal habits of gypsum implies a long-term interaction between hot spring geochemistry and the metabolisms of the microbial community. The morphology of gypsum in hot springs was compared with that of gypsum with hydrothermal genesis in Lower Cambrian black shale. The crystallization of gypsum in the black shale of the Lower Cambrian, which shows similar but less varied morphology, was influenced by post-depositional hydrothermal fluids. I suggest that the high diversities of the morphology and crystal size of gypsum in those hot springs represent the continuous mediation of microorganism, which could be used as mineral ecophysiological records of life not only on Earth, but on Mars. Comparatively, the Pearl River Delta sedimentary environments are characterized by low-temperature and different mineralogical assemblages. Based on lithological records and dating data, C/N and organic carbon isotope are used to identify alterations between terrestrial and marine depositional environments in borehole transect that build up seven stages of sedimentary records. Secondly, element intensities taken by X-ray fluorescence core scanner and %Fe(III) variation implied different sedimentary environment records (terrestrial and marine) in HKUV15. Detrital minerals and authigenic minerals (gypsum, opal, and pyrite) were observed and characterized by scanning electron microscope. Diatom and coccolithophorid genera were identified. Most of mineralogical and biological records showed depositional environments consistent with geochemical records. In the Pearl River Delta sedimentary samples, the microbial mediated mineralization only contributed a small fraction to the mineral assemblages, while in the hot springs, the microbial mediation had more influences on the nucleation of authigenic minerals, which was reflected by the high diversity of crystal size and morphology of sulfates, sulfides, and siliceous minerals. / published_or_final_version / Earth Sciences / Doctoral / Doctor of Philosophy

There is a need to rethink the design of analog/mixed-signal circuits to be viable in state-of-the-art nanometer-scale CMOS processes due to the hostile environment they create for analog circuits. Reduced supply voltages and smaller capacitances are beneficial to circuit speed and digital circuit power efficiency; however, these changes along with smaller dimensions and close coupling of fast-switching digital circuits have made high-accuracy voltage domain analog processing increasingly difficult. In this work, techniques to improve analog-to-digital converters (ADC) for nanometer-scale processes are explored. First, I propose a mostly-digital time-based oversampling delta-sigma (∆Σ) ADC architecture. This system uses time, rather than voltage, as the analog variable for its quantizer, where the noise shaping process is realized by modulating the width of a variable-width digital "pulse." The merits of this architecture render it not only viable to scaling, but also enable improved circuit performance with ever-increasing time resolution of scaled CMOS processes. This is in contrast to traditional voltage-based analog circuit design, whose performance generally decreases with scaling due to increasingly higher voltage uncertainty due to supply voltage reduction and short-channel effects. In conjunction with Dr. Woo Young Jung while he was a Ph.D. student at The University of Texas at Austin, two prototype implementations of the proposed architecture were designed and fabricated in TSMC 180 nm CMOS and IBM 45 nm Silicon-On-Insulator (SOI) processes. The prototype ADCs demonstrate that the architecture can achieve bandwidths of 5-20 MHz and ∼50 dB SNR with very small area. The first generation ADC core occupies an area of only 0.0275 mm² , while the second generation ADC core occupies 0.0192 mm² . The two prototypes can be categorized as some of the smallestarea modulators in the literature. Second, I analyze the measured results of the prototype ADC chips, and determine the source for the harmonic distortion. I then demonstrate a digital calibration algorithm that sufficiently mitigates the distortion. This calibration approach falls in the general philosophy of digitally-assisted analog systems. In this philosophy, digital calibration and post-correction are favored over traditional analog solutions, in which there is a high cost to the analog solution either in complexity, power, or area. / text