La récupération d'énergie ambiante est une solution efficace et respectueuse de l'écosystème pour alimenter de manière autonome des nœuds de capteurs. La pile microbienne benthique (BMFC) est un système récupérant l'énergie de la biomasse sédimentaire à l'aide du métabolisme électro-actif des bactéries présentes naturellement dans le milieu. Bien que prometteuse comme source d'énergie long terme pour des capteurs marins, ses niveaux de puissance (autour de 100 µW) et de tension (0,6 V en circuit ouvert) nous engage à mener une réflexion sur la conception de son interface électronique de récupération. La première partie de cette thèse détaille la conception de BMFCs de taille centimétrique faites en laboratoire en maintenant des conditions proches du milieu naturel. Une seconde partie s’intéresse à caractériser et modéliser le comportement électrique des BMFCs dans le domaine statique puis dynamique, en vue de concevoir le circuit de récupération de manière appropriée. A l’aide du modèle électrique statique, une interface de récupération est définie et optimisée de manière à extraire le maximum de puissance et maximiser le rendement de conversion. Le choix se porte sur le convertisseur flyback en mode de conduction discontinue. A l’aide d’un modèle prédisant les pertes du flyback validé expérimentalement, une étude portée sur la fréquence de découpage, le rapport cyclique et le choix des inductances couplées a permis d’atteindre un rendement de 82% et 64% pour une BMFC délivrant respectivement 90 µW et 30 µW. Une dernière partie s’intéresse à optimiser l’interface de récupération en prenant en compte les différentes variabilités de la BMFC. Notamment, l’intérêt du suivi du MPP est discuté et l’influence du comportement commuté du flyback sur les pertes dynamiques supplémentaires au sein de la BMFC est analysée grâce au modèle électrique dynamique de la BMFC déduit au second chapitre. / Harvesting energy in the surrounding environment is an advantageous alternative to conventional batteries for powering autonomously remote sensors in addition to processing in an eco-friendly way. Many researches currently focus on harvesting energy from solar, thermal and vibrational sources scavenged in environments near the sensor. Less analyzed in the literature, the benthic microbial fuel cell (BMFC) is an emerging harvesting technology that exploits the waste materials in the seafloors. The catalysis properties of bacteria into a couple of redox reactions convert chemical energy from the sediment into electrical energy. Although promising as a long-term energy source for marine sensors, its power levels (around 100 μW) and voltage (0.6 V in open circuit) commit us to reflect on the design of its electronic harvesting interface. The first chapter of this thesis details the design of lab-made cm2-BMFC while maintaining conditions close to the natural environment. A second chapter focuses on characterizing and modeling the electrical behavior of BMFCs in the static and dynamic domains. Thanks to the static electric model, a harvesting electrical interface is defined and optimized to extract the maximum power and maximize the conversion efficiency. The flyback converter in discontinuous conduction mode is chosen. By using a model predicting the losses of the experimentally validated flyback, we studied the choice of the switching frequency, the duty cycle and the coupled inductances. We reached an efficiency of 82% and 64% for a BMFC delivering respectively 90 μW and 30 μW. A final chapter focuses on optimizing the harvesting interface by taking into account the different variabilities of the BMFC. In particular, the interest of the MPP monitoring is discussed and the influence of the flyback switched behavior on the additional dynamic losses within the BMFC is analyzed thanks to the dynamic electrical model of the BMFC deduced in the second chapter.

ecorative lighting strips could be used to the backlight of furniture, to creating a modern interior design. From an architectural point of view, this design is very difficult and requires a strong sense of aesthetics. More easier is to use the LED strips to the advertising trailers or to backlighting car parts. RGB strip will be powered by switching power supply with galvanic isolation. Colour will be changed by the combination of basic colours RGB, by using 3-channel PWM of Atmel microcontroller, controlled via a wireless module, providing two-way communication..

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AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis.

AC/DC adapters mostly employ two-stage topology: Power Factor Correction (PFC) pre-regulation stage followed by an isolated DC/DC converter stage. Low power AC/DC adapters require a small size to be competitive. Among their components, the bulk DC-link capacitor is one of the largest because it should keep the output voltage with low ripple. Also, the size of this capacitor is penalized due to the universal line voltage application. Synchronization through employing leading edge modulation for the first PFC stage and trailing edge modulation for the second DC/DC converter stage can significantly reduce the ripple current and ripple voltage of the DC-link capacitor. Thus, a smaller DC-link capacitance can be used, lowering the cost and size of the AC/DC adapter. Benefits of the synchronous switching scheme were already demonstrated experimentally. However, no mathematical analysis was presented. In this thesis, detailed mathematical analyses in per-unit quantity are given to facilitate the calculation of the DC-link capacitor ripple current reduction with Leading/Trailing Edge Modulation strategies. One of the limitations of leading/trailing edge modulation is that the switching frequencies of the two stages need to be equal to achieve the best reduction of the DC-link capacitor ripple current. The DC-link capacitor ripple current will become larger if the switching frequency of the DC/DC converter is larger than that of the PFC pre-regulator, which blocks us to employ higher frequency for isolated DC/DC converter to reduce its transformer size. This thesis proposed a new Leading/Trailing Edge Modulation strategy to further reduce the DC-link bulk capacitor ripple current when switching frequency of DC/DC converter stage is twice the switching frequency of PFC stage. This proposed pulse width modulation scheme was verified by simulation. Experimental results obtained through digital control based on FPGA are also presented in this thesis.

Η παρούσα διπλωματική εργασία πραγματεύεται τη μελέτη, την ανάλυση και την κατασκευή μιας καινοτόμας τοπολογίας μονοφασικού αντιστροφέα για τη διασύνδεση φωτοβολταϊκών γεννητριών, μικρής ισχύος, με το ηλεκτρικό δίκτυο των αστικών περιοχών. Η εργασία αυτή εκπονήθηκε στο Εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του Τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Υπολογιστών της Πολυτεχνικής Σχολής του Πανεπιστημίου Πατρών. Στα πλαίσια του θεσμού της πρακτικής άσκησης, ένα τμήμα της εκπονήθηκε στην τεχνική εταιρία Πάραλος Α.Ε. Σκοπός της διπλωματικής εργασίας είναι συμβολή της στη μελέτη των νέων τεχνολογιών στον τομέα των φωτοβολταϊκών (Φ/Β) μονάδων διεσπαρμένης παραγωγής, λαμβάνοντας υπόψιν τις υψηλές θερμοκρασίες λειτουργίας που μειώνουν δραστικά την διάρκεια ζωής των ηλεκτρολυτικών πυκνωτών και συνεπώς των ίδιων των μετατροπέων. Επί του πρακτέου διερευνάται και κατασκευάζεται μια βελτιωμένη εκδοχή του υψίσυχνου μονοφασικού αντιστροφέα ρεύματος βασιζόμενου στην τοπολογία Flyback. Η βελτίωση αφορά την ενσωμάτωση ενός κυκλώματος αποσύζευξης της ισχύος, που εξομαλύνει το ρεύμα εισόδου αναιρώντας την ανάγκη χρήσης ηλεκτρολυτικού πυκνωτή τόσο στην είσοδο, όσο και στο κύκλωμα αποσύζευξης αυξάνοντας έτσι τη διάρκεια ζωής του μετατροπέα, καθιστώντας τον με αυτόν τον τρόπο κατάλληλο για εφαρμογές «Φωτοβολταϊκών Πλαισίων Εναλλασσόμενου Ρεύματος» (AC-PV Modules). Ο συγκεκριμένος αντιστροφέας έχει προταθεί στη διεθνή επιστημονική βιβλιογραφία και στην παρούσα διπλωματική εργασία αναλύεται κατά κύριο λόγο η μεθοδολογία κατασκευής του ώστε να διευρευνηθεί η λειτουργία και η απόδοσή του Αρχικά έγινε μια διεξοδική θεωρητική ανάλυση και μελέτη των καταστάσεων λειτουργίας του αλλά και της συνολικής συμπεριφοράς του βελτιωμένου αντιστροφέα ρεύματος τοπολογίας Flyback. Με την εμπειρία που αποκτήθηκε στην διάρκεια της πρακτικής άσκησης, ακολούθησε η συσχέτιση των παραμέτρων του αντιστροφέα και η επιλογή αυτών ώστε να ανταποκριθεί στις προδιαγραφές που τέθηκαν και να ανταπεξέλθει στα δεδομένα του ηλεκτρικού δικτύου της Ελλάδας. Το επόμενο βήμα ήταν η προσομοίωση της τοπολογίας σε ηλεκτρονικό υπολογιστή με ειδικό πρόγραμμα προσομοιώσεων ηλεκτρικών κυκλωμάτων (PSpice). Επιβεβαιώθηκε η λειτουργία του, έγινε ο βέλτιστος σχεδιασμός και τέλος πραγματοποιήθηκε ο κατά το δυνατόν ακριβέστερος υπολογισμός των απωλειών στα διάφορα στοιχεία ώστε να γίνει ορθή επιλογή των ημιαγωγικών στοιχείων του μετατροπέα. Τέλος, έγινε η κατασκευή του αντιστροφέα με πυκνωτή αποσύζευξης της ισχύος και επιβεβαιώθηκε πειραματικά η ορθή λειτουργία του για διάφορες συνθήκες λειτουργίας. Έπειτα συγκεντρώθηκαν μετρήσεις, αφ’ ενός μεν για την εξαγωγή συμπερασμάτων σχετικά με την απόδοση, αφ’ ετέρου δε για σύγκριση με τα αναμενόμενα θεωρητικά αποτελέσματα. / This diploma thesis deals with the study, analysis and implementation of a novel single phase inverter which is used for the interconnection of small photovoltaic (PV) generators with the electric utility grid of urban regions. This work was conducted in the Laboratory of Electromechanical Energy Conversion Department of Electrical and Computer Engineering, School of Engineering, University of Patras. The diploma thesis was also partially conducted within the internship at the engineering company Paralos S.A. This project pertains to the sector of Dispersed Power Generation PV systems, especially to Alternating Current Photovoltaic Modules (AC-PV Modules) systems in which a low power dc-ac utility interactive inverter is individually mounted on a PV module. Taking into account that the lifetime of the ac module inverter is shortened because it operates under very high atmospheric temperature, an improved Flyback-type single phase high frequency current source inverter is proposed. The improvement relies on the integration of a power pulsation decoupling circuit which aims at input current smoothing without using electrolytic capacitors and enables employment of film capacitors with small capacitance not only for the dc input line but also for the decoupling circuit. The additional circuit is expected to extend the lifetime of the inverter since the use of electrolytic capacitors under a high temperature environment drastically shortens their life.The proposed inverter circuit has already been presented in the international scientific community but the current thesis mainly analyzes the implementation methodology and investigates the inverter’s performance and behavior. Initially, a thorough theoretical analysis was made on the flyback-type utility interactive inverter’s operation and its circuit configuration. Subsequently, analytical mathematical equations were developed to describe the relationships between the parameters of the proposed inverter. Using these equations, the electric components were selected, as to meet up with the Greek electric utility grid specifications. The next step is the simulation of the topology, which was performed by a specialized on electric circuit simulation computer program (PSpice). The proper behavior of the simulated circuit was confirmed and the precise losses of the components were calculated through the program. Regarding this fact, the components were selected for an optimal design of the inverter. Last but not least, the Flyback-type current source inverter with decoupling capacitor was constructed and its operation was experimentally confirmed. Also, measurements of the inverter’s performance were collected.

This master thesis describes the design of a DC/DC converter for one photovoltaic panel with a 250 W peak power. The master thesis is divided into parts dealing with detailed design of power electronics, analog circuit design, description of control MPPT algorithms and software for control circuit. The chapter with the mathematical modeling of the converter created in the Matlab Simulink was added beyond the assignment.

Renewable energy source plays an important role in energy co-generation and distribution. A traditional solar-based inverter system has two stages cascaded, which has simpler controller but low efficiency. A new solar-based single-stage grid-connected inverter system can achieve higher efficiency by reducing the power semiconductor switching loss and output stable and synchronizing sinusoid current into the utility grid. In Chapter 1, the characteristic I-V and P-V curve of PV array has been illustrated. Based on prediction of the PV power capacity installed on the grid-connected and off-grid, the trends of grid-tied inverter for DG system have been analyzed. In Chapter 2, the topologies of single-phase grid-connect inverter system have been listed and compared. The key parameters of all these topologies are listed in a table in terms of topology, power decoupling, isolation, bi-directional/uni-directional, power rating, switching frequency, efficiency and input voltage. In Chapter 3, to reduce the capacitance of input filter, an active filter has been proposed, which will eliminate the 120/100Hz low frequency ripple from the PV array's output voltage completely. A feedforward controller is proposed to optimize the step response of PV array output voltage. A sample and hold also is used to provide the 120/100Hz low frequency decoupling between the controller of active filter and inverter stage. In Chapter 4, the single-stage inverter is proposed. Compared with conventional two-stage inverter, which has two high frequency switching stages cascaded, the single-stage inverter system increases the system efficiency by utilizing DC/DC converter to generate rectified sinusoid voltage. A transformer analysis is conducted for the single-stage inverter system, which proves the transformer has no low-frequency magnetic flux bias. To apply peak current mode control on single-stage inverter and get unified loop gain, adaptive slope compensation is also proposed for single-stage inverter. In Chapter 5, a digital controller for single-stage inverter is designed and optimized by the Matlab Control Toolbox. A Psim simulation verified the performance of the digital controller design. In Chapter 6, three bi-directional single-stage inverter topologies are proposed and compared. A conventional single-stage bi-directional inverter has certain shortcoming that cannot be overcome. A modular grid-connect micro-inverter system with dedicated reactive energy processing unit can overcome certain shortcoming and increase the system efficiency and reliability. A unique controller design is also proposed. In Chapter 7, a PFM ZCS flyback inverter system is invented. By using half-wave quasi-resonant ZCS flyback resonant converter and PFM control, this topology completely eliminates switching loss. A detailed mathematical analysis provides all the key parameters for the inverter design. As the inductance of transformer secondary side get smaller, the power stage transfer function of PFM ZCS flyback inverter system demonstrates nonlinearity. An optimized PFM ZCS flyback DC/DC converter design resolves this issue by introducing a MOSFET on the secondary side of transformer. In Chapter 8, experimental results of uni-direcitonal single-stage inverter with grid-connection, bi-directional single-stage inverter and single-stage PFM ZCS flyback inverter have been provided. Conclusions are given in Chapter 9.

A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-µm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier's application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35µm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration.

Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss. A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter. A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved. With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency. / Ph. D.