Electric and hybrid-electric vehicles lean heavily on intricate control algorithms to provide smooth, reliable, and secure operations under any driving conditions. Three distinct supervisory control strategies have been developed, each aiming to improve reliability and vehicle performance of a dual-motor electric vehicle equipped with an all-wheel-drive, fully electric powertrain. These algorithms are adept at dynamically modulating and constraining the torque provided to the wheels, leveraging two autonomous permanent magnet electric drive units. This study utilizes a vehicle model jointly provided by MathWorks and General Motors in partnership with industry sponsors. The these strategies were implemented in the model and enhanced the performance, vehicle range, energy consumption, regenerated energy using specific EDUs provided by sponsors. Adhering to a systematic engineering iterative method, the emphasis was heavily placed on simulation and modeling during the development and validation of these strategies. Simulations ensured robust testing before field implementation, emphasizing software modeling's vital role.

Electric drives are crucial components of powertrain of modern vehicles. They need to be controlled effectively to deliver a comfortable and efficient driving experience. The control unit needs to be robust to handle extreme operating conditions and faults in a safe manner. Hardware in Loop (HIL) setups can be used to develop such control units for majority of real-life test cases, without involving physical drives. Typical HIL setup includes the controller (hardware) under test connected to a high fidelity computer model of the controlled system (plant). Thanks to the efficient, inexpensive, consistent and nondestructive nature of HIL setups, they are widely used for research and development in the automotive industry. This thesis focuses on developing such a HIL setup for latest electric drive architecture at Scania CV AB. In this thesis, the plant models are programmed onto a field programmable gate array (FPGA). The HIL setup, plant models and the controller are continuously improved throughout the thesis to achieve higher fidelity and real time replication of the internal permanent magnet synchronous machine under consideration. Software in Loop (SIL) strategy, wherein all components are represented by computer models, is also applied for rapid developments. Several aspects like flux linkage-based and inductance-based machine models, choice of arithmetic, discretization methods, noise, delays, etc. are studied and optimised during the thesis. Validation is conducted for both SIL and HIL setups and above 95% correlation with physical drive’s performance is reported. Stable operation and repeatability of the developed HIL setup ensure that the framework is scalable to be applied to other drives and control units. / Elektriska drivenheter är centrala komponenter i drivlinan hos moderna elektriska fordon. Drivenheterna måste regleras effektivt för att ge en bekväm och effektiv körupplevelse. Regulatorn måste vara robust för att säkert hantera extrema driftsförhållanden och fel. Hardware in Loop (HIL) simuleringar kan användas för att utveckla sådana regulatorer för de flesta verkliga testfall, utan att involvera de fysiska komponenterna. En typisk HIL-installation inkluderar styrenheten (hårdvaran) som testas ansluten till en datormodell av det kontrollerade systemet (anläggningen). På grund av den effektiva, billiga, konsekventa och oförstörande naturen hos HIL simuleringar används de i stor utsträckning för FoU inom fordonsindustrin. Detta examensarbete fokuserar på att utveckla en sådan HIL-modell för en elektrisk drivlina hos Scania CV AB. I detta examensarbete är anläggningsmodellerna programmerade på en programmerbar integrerad krets. HIL-inställningen, anläggningsmodellerna och styrenheten förbättras kontinuerligt under hela examensarbetet för att uppnå högre kvalitet och realtidsreplikering av den permanentmagnetiserade synkronmaskin som övervägs. En Software in Loop (SIL) strategi, där alla komponenter representeras av datormodeller, tillämpas också för snabb utveckling. Flera aspekter såsom flödesbaserade och induktansbaserade maskinmodeller, val av aritmetik, diskretiserings metoder, brus, fördröjningar etc. studeras och optimeras. Validering utförs för både SIL- och HIL-inställningar och över 95% korrelation med fysiska enhetsprestanda erhålls. Stabil drift och repeterbarhet av den utvecklade HIL-kretsen säkerställer att ramverket är skalbart för att kunna appliceras på andra enheter och regulatorer.

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In this dissertation, we discuss the Distributed Spacecraft Attitude Control System Simulator (DSACSS) testbed developed at Virginia Polytechnic Institute and State University for the purpose of investigating various control techniques for single and multiple spacecraft. DSACSS is comprised of two independent hardware-in-the-loop simulators and one software spacecraft simulator. The two hardware-in-the-loop spacecraft simulators have similar subsystems as flight-ready spacecraft (e.g. command and data handling; communications; attitude determination and control; power; payload; and guidance and navigation). The DSACSS framework is a flexible testbed for investigating a variety of spacecraft control techniques, especially control scenarios involving coupled attitude and orbital motion. The attitude hardware simulators along with numerical simulations assist in the development and evaluation of Lyapunov based asymptotically stable, nonlinear attitude controllers with three reaction wheels as the control device. The angular rate controller successfully tracks a time varying attitude trajectory. The Modified Rodrigues Parmater (MRP) attitude controller results in successfully tracking the angular rates and MRP attitude vector for a time-varying attitude trajectory. The attitude controllers successfully track the reference attitude in real-time with hardware similar to flight-ready spacecraft. Numerical simulations and the attitude hardware simulators assist in the development and evaluation of a robust, asymptotically stable, nonlinear attitude controller with three reaction wheels as the actuator for attitude control. The MRPs are chosen to represent the attitude in the development of the controller. The robust spacecraft attitude controller successfully tracks a time-varying reference attitude trajectory while bounding system uncertainties. The results of a Global Positioning System (GPS) hardware-in-the-loop simulation of two spacecraft flying in formation are presented. The simulations involve a chief spacecraft in a low Earth orbit (LEO), while a deputy spacecraft maintains an orbit position relative to the chief spacecraft. In order to maintain the formation an orbit correction maneuver (OCM) for the deputy spacecraft is required. The control of the OCM is accomplished using a classical orbital element (COE) feedback controller and simulating continual impulsive thrusting for the deputy spacecraft. The COE controller requires the relative position of the six orbital elements. The deputy communicates with the chief spacecraft to obtain the current orbit position of the chief spacecraft, which is determined by a numerical orbit propagator. The position of the deputy spacecraft is determined from a GPS receiver that is connected to a GPS hardware-in-the-loop simulator. The GPS simulator creates a radio frequency (RF) signal based on a simulated trajectory, which results in the GPS receiver calculating the navigation solution for the simulated trajectory. From the relative positions of the spacecraft the COE controller calculates the OCM for the deputy spacecraft. The formation flying simulation successfully demonstrates the closed-loop hardware-in-the-loop GPS simulator. This dissertation focuses on the development of the DSACSS facility including the development and implementation of a closed-loop GPS simulator and evaluation of nonlinear feedback attitude and orbit control laws using real-time hardware-in-the-loop simulators. / Ph. D.

Tesis por compendio / [ES] Existe una extensa red de líneas ferroviarias electrificadas en todo el mundo. La mayoría de ellas utilizan líneas aéreas de contacto o catenarias para suministrar electricidad a los trenes. Las catenarias son estructuras de cables ubicadas sobre las vías ferroviarias, diseñadas para ser contactadas por los pantógrafos que se encuentran sobre la parte superior de los trenes. El correcto funcionamiento del sistema requiere un alto nivel de exigencia, especialmente a alta velocidad, cuando la continuidad del contacto se ve comprometida. La herramienta más empleada el sistema pantógrafo-catenaria es el uso de simulaciones numéricas. En particular, el Método de los Elementos Finitos (MEF) es la técnica más extendida para modelar y simular la interacción dinámica del pantógrafo con la catenaria. Después de la etapa de simulación, el pantógrafo y la catenaria tienen que ser testados mediante ensayos experimentales en vía. Sin embargo, existe una alternativa que puede reemplazar esos ensayos con una reducción significativa de costes. Dicha alternativa, llamada Hardware In the Loop (HIL), permite testar pantógrafos en el laboratorio mediante un banco de ensayos que emula la interacción con una catenaria virtual. Diferentes grupos de investigación han implementado HIL; sin embargo, en todos los intentos se han adoptado soluciones de compromiso, lo que demuestra el reto que supone la aplicación de HIL. Esta Tesis pretende avanzar en el campo de ensayos HIL, impulsando las capacidades de la técnica y solventando algunas de las limitaciones encontradas en la literatura. Para ello se proponen dos tipos diferentes de modelos de catenaria para su uso en ensayos HIL. El primero es un modelo analítico basado en un cable tensado con perfil geométrico periódico que proporciona la solución estacionaria del sistema. Este enfoque reduce la complejidad de la catenaria, pero mantiene las principales características que intervienen en la dinámica. El modelo ha demostrado ser útil para explicar el comportamiento fundamental de la catenaria, ayudando a comprender el fenómeno de interferencia entre dos pantógrafos. Este modelo analítico es adecuado para HIL debido a su bajo coste computacional. En el presente trabajo se propone un algoritmo iterativo para utilizar el modelo analítico en HIL. El hecho de que el modelo sea periódico permite la aplicación de una estrategia específica para compensar el retraso del lazo de control. Esta estrategia tiene un excelente rendimiento y precisión, validados al comparar ensayos HIL con simulaciones. La validación se realiza con un peso en el lugar del pantógrafo para eliminar las potenciales diferencias en el modelo. Si bien la precisión alcanzada es buena, el modelo analítico de catenaria carece de fidelidad, lo que ha motivado el desarrollo del siguiente modelo. El segundo modelo de catenaria para ensayos HIL es el Modelo Periódico de Elementos Finitos (MPEF), discretizado con el MEF para evitar adicionales simplificaciones topológicas y estructurales. En la formulación se incluye la condición de periodicidad y la dinámica se resuelve mediante análisis en frecuencia. Además, las no linealidades de la catenaria se consideran en la formulación. Un algoritmo iterativo, similar al utilizado para los ensayos HIL con catenaria analítica, es usado para realizar ensayos HIL con catenarias MPEF. La estrategia anterior de utilización de un peso se emplea para validar el sistema de ensayos, resultando tener una gran precisión. Los resultados son gratificantes debido a la sofisticación del modelo de catenaria, la precisión de los ensayos y la cancelación del retraso. Los ensayos realizados simulan la respuesta de catenarias realistas con la hipótesis simplificativa de periodicidad. Son adecuados para la dinámica de catenarias de vanos iguales en la zona central de cada cantón, sin embargo es necesario seguir realizando esfuerzos para eliminar la condición de periodicidad sin comprometer la precisión de los resultados. / [CA] Existeix una extensa xarxa de línies ferroviàries electrificades a tot el món. La majoria d'elles utilitzen Línies Aèries de Contacte o catenàries per a subministrar electricitat als trens. Les catenàries són estructures de cables situades sobre les vies ferroviàries, dissenyades per a ser contactades pels pantògrafs que es troben sobre la part superior de la locomotora. El correcte funcionament del sistema requereix un alt nivell d'exigència, especialment a alta velocitat, quan la continuïtat del contacte es veu compromesa. L'eina majoritària per el sistema pantògraf-catenària és l'ús de simulacions numèriques. En particular, el Mètode dels Elements Finits (MEF) és la tècnica més usada per a modelar i simular la interacció dinàmica del pantògraf amb la catenària. Aquest mètode permet modelar catenàries. Després de l'etapa de simulació, el pantògraf i les catenàries han de ser testats en assajos experimentals en via. No obstant això, existeix una alternativa que pot reemplaçar eixos assajos amb una reducció significativa de costos. Aquesta alternativa, anomenada Hardware in the Loop (HIL), permet testar pantògrafs en el laboratori amb un banc d'assajos que emula la interacció amb una catenària virtual. Diferents grups d'investigació han implementat HIL; no obstant això, en tots els intents s'han adoptat solucions de compromís, la qual cosa demostra el repte que suposa l'aplicació de HIL. Aquesta Tesi pretén avançar en el camp dels assajos HIL, impulsant les capacitats de la tècnica i solucionant algunes de les limitacions trobades en la literatura. Aquesta Tesi proposa dos tipus diferents de models de catenària per al seu ús en assajos HIL. El primer és un model analític basat en un cable tens amb perfil geomètric periòdic que proporciona la solució estacionària del sistema. Aquest model redueix la complexitat de la catenària, però manté les principals característiques que intervenen en la dinàmica. El model ha demostrat ser útil per a explicar la dinàmica fonamental de la catenària, ajudant a comprendre el fenomen d'interferència entre dos pantògrafs. Aquest model analític és adequat per a realitzar assajos HIL a causa del seu baix cost computacional. Aquest treball proposa un algoritme iteratiu per a utilitzar el model analític en assajos HIL de pantògrafs. El fet que el model siga periòdic permet l'aplicació d'una estratègia específica per a compensar el retard del llaç de control. Aquesta estratègia té un excel·lent rendiment i precisió, validats en comparar assajos HIL amb simulacions numèriques. La validació es realitza amb una massa en el lloc del pantògraf per a eliminar les potencials diferències en el model. Si bé la precisió aconseguida és bona, el model analític de catenària manca de fidelitat, la qual cosa ha motivat el desenvolupament d'un model periòdic més avançat. El segon model de catenària per a assajos HIL és el Model Periòdic d'Elements Finits MPEF, discretitzat amb el MEF per a evitar simplificacions topològiques i estructurals addicionals. El model inclou la condició de periodicitat i la dinàmica es resol mitjançant anàlisi en freqüència. A més, les no linealitats de la catenària es consideren en la formulació. Un algoritme iteratiu, similar a l'utilitzat per als assajos HIL amb catenària analítica, és usat per a realitzar assajos HIL amb catenàries MPEF. L'estratègia anterior d'utilització d'una massa s'empra per a validar el sistema d'assajos, resultant tindre una gran precisió. Els resultats són gratificants a causa de la sofisticació del model de catenària, la precisió dels assajos i la cancel·lació del retard. Els assajos realitzats simulen la resposta de catenàries realistes amb la hipòtesi simplificativa de periodicitat. Són adequats per a la dinàmica de catenàries de vans iguals en la zona central dels seccionaments, no obstant això és necessari continuar fent esforços per a eliminar la condició de periodicitat sense comprometre la precisió dels res / [EN] There is an extensive network of electrified railway lines over the world. Most of them use overhead contact lines or catenaries to provide the trains with electrical power. Catenaries consist of electrified wires placed over the rail track, designed to contact the pantograph placed on the roof of the train. The proper operation of the system is very demanding, especially at high speed, when the continuity of the contact is compromised. The most predominant tool for studying and designing the pantograph-catenary system is the use of numerical simulations. Notably, the Finite Element Method (FEM) is the most popular technique for modelling and simulating the dynamic interaction of the pantograph and the catenary. This method allows modelling catenaries with outstanding fidelity and without any loss of generality. After the simulation stage, the pantograph and the catenaries have to be assessed by in-line experimental tests. However, there is an alternative that can replace those tests with a significant reduction in costs. The alternative method, called Hardware In the Loop (HIL), allows testing pantographs in the laboratory with a test rig that emulates the interaction with a virtual catenary. Different research groups have implemented HIL; however, in every attempt, a compromise solution has been adopted, demonstrating the challenging nature of HIL. This Thesis aims to advance in the field of HIL tests, pushing forward the capabilities of the technique and solving some of the limitations found in the literature. This Thesis proposes two different kinds of catenary models for their use in HIL tests. The first is an analytical model based on a string of periodic geometric profile that accounts for the steady state. It reduces the complexity of the catenary but keeps the main features involved in the dynamic. The model has proven useful in explaining the fundamental dynamics of the catenary, helping understand the interference between two pantographs. This analytical model is suitable for HIL because of its low computational cost. An iterative algorithm is proposed to use the analytical model in HIL. The fact that the model is periodic permits a specific strategy to compensate the control loop delay. This strategy has excellent performance and accuracy, validated by comparing HIL tests with numerical simulations and getting an agreement. This agreement will not be possible if the pantograph model of the simulations is inaccurate. Therefore, the validation is carried out with a weight or mass model in place of the pantograph to eliminate potential differences. Even though the precision achieved is good, the analytical catenary model lacks fidelity, which has motivated the development of a more advanced periodic model. The second catenary model for HIL tests is the Periodic Finite Element Model (PFEM), discretised with FEM to avoid further topological and structural simplifications. The model includes the periodicity condition, and the dynamics are solved by frequency analysis. Furthermore, the catenary non-linearities are considered in the formulation. An iterative algorithm, similar to the one used for the HIL tests with the analytical catenary, is used to realise HIL tests with PFEM catenaries. The previous strategy with a mass model is used to validate the test, confirming great precision. The results are gratifying due to the sophistication of the model, the accuracy of the tests and the cancellation of the delay. The tests simulate the response of realistic catenaries with the simplifying periodicity hypothesis. They are adequate for the dynamic of equal-span catenary at the central zone of every section, but future efforts have to be made to get rid of the periodicity condition while keeping the accuracy of the results. / The authors would like to acknowledge the financial support received from the State Research Agency of the Spanish Science and Innovation Ministry (PID2020- 113458RB-I00) and from the Valencian Regional Government (PROMETEO/2021/046) (PROMETEO/2016/007) and the Spanish Ministry of Economy, Industry and Competitiveness (TRA2017-84736-R), also the funds received jointly from the Regional Government of Valencia and the Euro- pean Social Fund, under Grant APOSTD/2019/205 / Gil Romero, J. (2022). Pantograph-Catenary Dynamic Models and their Implementation in Hardware-in-the-Loop Tests [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/191501 / Compendio

Integration testing in software refers to a type of tests where system components are tested as a group for the purpose of verifying their interfaces. It is an important phase in system testing which aims at verifying the compliance of the system with specified functional requirements and the elimination of errors in the interaction of system components. Often integration testing is performed on complex systems with additional requirements for the testing approaches wherein the hardware limitations and time delays need to be taken into account. The testing of such systems is commonly performed through hardware-in-the-loop (HIL) tests. Despite the advances in both integration testing and HIL testing, combining the two for complex systems is still a challenging issue requiring a new set of potential solutions. In this thesis work we propose a new solution approach for HIL integration testing of Supervisory Control and Data Acquisition (SCADA) systems which does not require any simulation of the system under test. The solution presented in this thesis is based on the utilization of probes which are deployed to select component interfaces and through which real-time, inter-component communication can be observed without interference. The feasibility of the proposed approach is evaluated by applying it to a proof-of-concept test of the SCADA control system for a wave-energy converter in development by the thesis host company CorPower Ocean. In the results chapter we further discuss the architectural solution of the probing-based approach and provide further implementation details. Our conclusion is that the proposed approach corresponds to a promising, light-weight, and modular testing solution that can be used to perform live software integration tests of a fully connected system with little to no interference on its operation. / Inom mjukvarubranschen är integrationstester en typ av testning där grupper av systemkomponenter testas tillsammans för att säkerställa funktionaliteten av deras gränssnitt. Det är en viktig fas inom systemtestning som försäkrar att systemet som helhet uppfyller designkraven samt som minimerar felrisken i interaktioner mellan delkomponenter. Integrationstester utförs ofta på komplexa system där testningen i sig har ytterligare krav som inskränker metodvalet, till exempel då hänsyn behöver tas till hårdvarubegränsningar eller timing. Ofta genomförs testningen av sådana system med så kallade hardware-in-the-loop-tester (HIL). Trots modern utveckling inom både integrations- och HIL-testning är det fortfarande mycket utmanande att kombinera båda metoderna för komplexa system och nya lösningar behöver utvecklas och utvärderas. I denna avhandling föreslås en ny sådan lösning för HIL-testning av Supervisory Control and Data Acquisition (SCADA) -kontrollsystem som inte kräver att någon del av systemet simuleras under testernas utförande. Lösningen är baseras på användandet av mjukvarusonder som sätts in vid utvalda komponentgränssnitt och som i realtid kan observera interkomponentkommunikation utan störningspåverkan på komponenterna i sig. Den beskrivna lösningen utvärderades genom att utföra en praktisk konceptvalidering mot SCADAkontrollsystemet för avhandlingens värdbolag CorPower Oceans vågenergigenerator. I avhandlingen beskrivs även den arkitekturella lösning som krävdes för att genomföra sonderingsbaserad testning på ett reellt system samt implementationsdetaljer för konceptvalideringen. Slutsatsen är att den föreslagna lösningen beskriver en lovande och modulär testningsmetodik som kan användas för att genomföra mjukvaruintegrationstester av komplexa, sammankopplade system i realtid, utan simuleringar och utan betydande störningspåverkan på systemets operation

Testing, verification and validation of sensors, components and systems is vital in the early-stage development of new cars with computer-in-the-car architecture. This can be done with the help of the existing technique, hardware-in-the-loop (HIL) testing which, in the close loop testing case, consists of four main parts: Real-Time Simulation Platform, Sensor Simulation PC, Interface Unit (IU), and unit under test which is, for instance, a Vehicle Computing Unit (VCU). The purpose of this degree project is to research and develop a proof of concept for in-house development of an image injection solution (IIS) on the IU in the HIL testing environment. A proof of concept could confirm that editing, customizing, and having full control of the IU is a possibility. This project was initiated by Volvo Cars to optimize the use of the HIL testing environment currently available, making the environment more changeable and controllable while the IIS remains a static system. The IU is an MPSoC/FPGA based design that uses primarily Xilinx hardware and software (Vivado/Vitis) to achieve the necessary requirements for image injection in the HIL testing environment. It consists of three stages in series: input, image processing, and output. The whole project was divided in three parts based on the three stages and carried out at Volvo Cars in cooperation by three students, respectively. The author of this thesis was responsible for the output stage, where the main goal was to find a solution for converting, preferably, AXI4 RAW12 image data into data on CSI2 format. This CSI2 data can then be used as input to serializers, which in turn transmit the data via fiber-optic cable on GMSL2 format to the VCU. Associated with the output stage, extensive simulations and hardware tests have been done on a preliminary solution that partially worked on the hardware, producing signals in parts of the design that could be read and analyzed. However, a final definite solution that fully functions on the hardware has not been found, because the work is at the initial phase of an advanced and very complex project. Presented in this thesis is: important theory regarding, for example, protocols CSI2, AXI4, GMSL2, etc., appropriate hardware selection for an IIS in HIL (FPGA, MPSoC, FMC, etc.), simulations of AXI4 and CSI2 signals, comparisons of those simulations with the hardware signals of an implemented design, and more. The outcome was heavily dependent on getting a certain hardware (TEF0010) to transmit the GMSL2 data. Since the wrong card was provided, this was the main problem that hindered the thesis from reaching a fully functioning implementation. However, these results provide a solid foundation for future work related to image injection in a HIL environment.

<p>У тези je предложен поступак развоја управљачких склопова енергетске<br />електронике заснован на технологији Hardware In the Loop. Подробно је<br />описан предложени емулатор са нагласком на специфичном<br />моделовању погодном за извршење у стварном времену што је<br />предуслов веродостојности. Сама веродостојност је проверена<br />поређењем резултата са симулацијом, као и са измереним резултатима<br />у неколико стварних погона. Затим је поступак развоја управљачких<br />склопова подробно објашњен на примеру развоја и испитивања једног<br />новог контролног алгоритма за повезивање синхроног генератора на<br />електричну мрежу.</p> / <p>U tezi je predložen postupak razvoja upravljačkih sklopova energetske<br />elektronike zasnovan na tehnologiji Hardware In the Loop. Podrobno je<br />opisan predloženi emulator sa naglaskom na specifičnom<br />modelovanju pogodnom za izvršenje u stvarnom vremenu što je<br />preduslov verodostojnosti. Sama verodostojnost je proverena<br />poređenjem rezultata sa simulacijom, kao i sa izmerenim rezultatima<br />u nekoliko stvarnih pogona. Zatim je postupak razvoja upravljačkih<br />sklopova podrobno objašnjen na primeru razvoja i ispitivanja jednog<br />novog kontrolnog algoritma za povezivanje sinhronog generatora na<br />električnu mrežu.</p> / <p>This paper proposes development of Power Electronics controllers based on<br />the Hardware In the Loop technology. Proposed emulator is describied in<br />detail where emphasis was set on specific methods of modeling which is<br />suitable for real time emulations in order to obtain emulation faithfulness.<br />Fidelity itself was checked through comparison with off-line simulations and<br />results of real drives. Procedure of controllers development was presented<br />through development and testing of one new control algorithm for connection<br />of the permanent magnet synchronous generator to the electrical grid.</p>

Hardware-in-the-loop (HiL) is a concept for testing physical equipment by connecting itto a mathematical representation (model) of the physical process. HiL-testing reduces thecost and saves time before testing the physical equipment (hardware) on the real (physical)process. The physical process chosen for this study is wire+arc additive manufacturing(WAAM), an advanced additive manufacturing (AM) technology that deposits metalbased material layer-by-layer. In this study, simulations of the robot path are carried outwhile the physical robot performs a physical process (additive manufacturing). In robotadditive manufacturing, the desired CAD model is currently sliced down into layers usingslicer software, and the layers are then translated into a path. The robot then moves alongthe path of these pre-defined layers to produce a three-dimensional structure. The heightof the produced structures and desired CAD models have deviations because of processinstabilities and temperature variations among other factors. The robot path should beupdated every time a layer is printed to compensate for the height differences. This isachieved by parametrizing the CAD model, i.e., the CAD model of the structure to beprinted is replaced by a mathematical equation (model). In this study, the mathematicalmodel is updated for each layer in real-time with feedback data from sensors that monitorthe additive manufacturing process. The concept of updating a mathematical model andexecuting it in real-time is called real-time simulation (RTS). In this study, a HiL-basedreal-time simulation setup has been developed, which predicts the required printing layerheight and the number of layers (based upon the latest feedback data from the monitoringsensors), and the required height of the structure. By combining hardware and software,a cyber-physical system has been created, enabling the transition from automation toautonomous robotics and contributing to Industry 4.0.

Saab want to examine Hardware In the Loop method as a concept, and how an infrastructure of Hardware In the Loop would look like. Hardware In the Loop is based upon continuously testing hardware, which is simulated. The software Saab wants to use for the Hardware In the Loop method is Jenkins, which is a Continuous Integration, and Continuous Delivery tool. To simulate the hardware, they want to examine the use of an Application Programming Interface between a Raspberry Pi, and the programming language Robot Framework. The reason Saab wants this examined, is because they believe that this method can improve the rate of testing, the quality of the tests, and thereby the quality of their products.The theory behind Hardware In the Loop, Continuous Integration, and Continuous Delivery will be explained in this thesis. The Hardware In the Loop method was implemented upon the Continuous Integration and Continuous Delivery tool Jenkins. An Application Programming Interface between the General Purpose Input/Output pins on a Raspberry Pi and Robot Framework, was developed. With these implementations done, the Hardware In the Loop method was successfully integrated, where a Raspberry Pi was used to simulate the hardware. / Saab vill undersöka metoden Hardware In the Loop som ett koncept, dessutom hur en infrastruktur av Hardware In the Loop skulle se ut. Hardware In the Loop baseras på att kontinuerligt testa hårdvara som är simulerad. Mjukvaran Saab vill använda sig av för Hardware In the Loop metoden är Jenkins, vilket är ett Continuous Integration och Continuous Delivery verktyg. För attsimulera hårdvaran vill Saab undersöka användningen av ett Application Programming Interface mellan en Raspberry Pi och programmeringsspråket Robot Framework. Anledning till att Saab vill undersöka allt det här, är för att de tror att det kan förbättra frekvensen av testning och kvaliteten av testning, vilket skulle leda till en förbättring av deras produkter. Teorin bakom Hardware In the Loop, Continuous Integration och Continuous Delivery kommer att förklaras i den här rapporten. Hardware In the Loop metoden blev implementerad med Continuous Integration och Continuous Delivery verktyget Jenkins. Ett Application Programming Interface mellan General Purpose Input/output pinnarna på en Raspberry Pi och Robot Framework blev utvecklat. Med de här implementationerna utförda, så blev Hardware Inthe Loop metoden slutligen integrerat, där Raspberry Pis användes för att simulera hårdvaran.