Orientador: Jose Alexandre Diniz / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e Computação / Made available in DSpace on 2018-09-11T21:11:59Z (GMT). No. of bitstreams: 1 Miyoshi_Juliana_M.pdf: 3791020 bytes, checksum: 460cf8c5054332b38c548b87723e8179 (MD5) Previous issue date: 2008 / Resumo: Filmes isolantes com alta constante dielétrica (high k) para a próxima geração (tecnologia CMOS de 32 nm), tais como óxido de titânio (TiOx), oxinitreto de titânio (TiOxNy), oxinitreto de titânio alumínio (AlxTiwOyNz), nitreto de titânio alumínio (AlxTiwNz) e óxido de titânio alumínio (AlxTiwOy) foram obtidos por evaporação por feixe de elétrons de Ti ou TiAl, com adicional nitretação ou oxinitretação ou oxidação por plasma ECR (Electron Cyclotron Resonance) em substratos de Si. Os filmes foram caracterizados por elipsometria (espessura), espectroscopia de emissão do infravermelho (FTIR) (ligações químicas) e microscopia de força atômica (AFM) (rugosidade da superfície). Os plasmas ECR foram caracterizados por espectroscopia por emissão óptica (OES). Estes filmes foram usados como isolantes de porta em capacitores MOS, que foram fabricados com eletrodos de Al e TiAl. Estes capacitores foram utilizados para a obtenção das medidas de capacitância - tensão (C-V) e corrente - tensão (I-V). Um valor relativo para a constante dielétrica de 3,9 foi adotado para extrair o valor de EOT dos filmes, a partir das medidas C-V sob região de forte acumulação, resultando em valores entre 1,1 nm e 1,5 nm, e densidades de carga efetiva em torno de 1012 cm-2. Das medidas I-V, foram extraídas valores de correntes de fuga através do dielétrico de porta entre 0,02 mA e 20 mA. Os melhores resultados (com correntes de fuga menores que 4 mA e EOT menores que 1,5 nm) foram obtidos pelas estruturas MOS com dielétrico de porta de AlxTiwOy e AlxTiwOyNz. Devido a estes resultados, nMOSFETs com eletrodo de Al e dielétrico de porta de AlxTiwOyNz foram fabricados e caracterizados por curvas características I-V. Foram obtidas características elétricas do nMOSFET, tais como transcondutância de 380 µS e slope de 360 mV/dec. Estes resultados indicam que os filmes AlxTiwOy e AlxTiwOyNz são adequados para a próxima geração de dispositivos (MOS). / Abstract: High k insulators for the next generation (sub-32 nm CMOS (complementary metaloxide-semiconductor) technology), such as titanium oxide (TiOx), titanium oxynitride (TiOxNy), titanium-aluminum oxynitride (AlxTiwOyNz), titanium-aluminum nitride (AlxTiwNz) and titanium-aluminum oxide (AlxTiwOy), have been obtained by Ti or Ti/Al e-beam evaporation, with additional electron cyclotron resonance (ECR) plasma nitridation or oxynitridation or oxidation on Si substrates. The films were characterized by ellipsometry (thickness), Fourier Transformed Infra Red (FTIR) (chemical bonds) and Atomic Force Microscopy (AFM) (surface roughness). The ECR plasmas were characterized by optical emission spectroscopy (OES). These films have been used as gate insulators in MOS capacitors, which were fabricated with Al or TiAl gate electrodes. These capacitors were used to obtain capacitance-voltage (C-V) and current-voltage (I-V) measurements. A relative dielectric constant of 3.9 was adopted to extract the Equivalent Oxide Thickness (EOT) of films from C-V curves under strong accumulation condition, resulting in values between 1.1 and 1.5 nm, and the effective charge densities of about 1012 cm-2. From I-V measurements, gate leakage currents through these gate dielectrics between 0,02 mA and 20 mA were extracted. The best results (leakage current lower than 4 mA and EOT thinner than 1.5 nm) were obtained by MOS structures with gate dielectrics of AlxTiwOy and AlxTiwOyNz. Because of these results, nMOSFETs with Al gate electrode and AlxTiwOyNz gate dielectric were fabricated and characterized by I-V characteristic curves. nMOSFET electrical characteristics, such as transconductance of 380 µS and sub-threshold slope of 360 mV/dec, were obtained. These results indicate that the obtained AlxTiwOyNz and AlxTiwOy films are suitable gate insulators for the next generation (MOS) devices. / Mestrado / Eletrônica, Microeletrônica e Optoeletrônica / Mestre em Engenharia Elétrica

Metal oxide thin films serve as critical components in many modern technologies, including microelectronic devices. Industrial state-of-the-art production utilizes vapor-phase techniques to make high-quality (dense, smooth, uniform) thin film materials. However, vapor-phase techniques require large energy inputs and expensive equipment and precursors. Solution-phase routes to metal oxides have attracted great interest as cost-effective alternatives to vapor-phase methods and also offer the potential of large-area coverage, facile control of metal composition, and low-temperature processing. Solution deposition has previously been dominated by sol-gel routes, which utilize organic ligands, additives, and/or solvents. However, sol-gel films are often porous and contain residual carbon impurities, which can negatively impact device properties. All-inorganic aqueous routes produce dense, ultrasmooth films without carbon impurities, but the mechanisms involved in converting aqueous precursors to metal oxides are virtually unexplored. Understanding these mechanisms and the parameters that influence them is critical for widespread use of aqueous approaches to prepare microelectronic components. Additionally, understanding (and controlling) density and composition inhomogeneities is important for optimizing electronic properties. An overview of deposition approaches and the challenges facing aqueous routes are presented in Chapter I. A summary of thin film characterization techniques central to this work is given in Chapter II. This dissertation contributes to the field of solution-phase deposition by focusing on three areas. First, an all-inorganic aqueous route to high-κ metal oxide dielectrics is developed for two ternary systems. Chapters III and IV detail the film formation chemistry and film properties of lanthanum zirconium oxide (LZO) and zirconium aluminum oxide (ZAO), respectively. The functionality of these dielectrics as device components is also demonstrated. Second, the impact of steam annealing on the evolution of aqueous-derived films is reported. Chapter V demonstrates that steam annealing lowers processing temperatures by effectively reducing residual counterion content, improving film stability with respect to water absorption, and enhancing dielectric properties of LZO films. Third, density and composition inhomogeneities in aqueous-derived films are investigated. Chapters VI and VII examine density inhomogeneities in single- and multi-metal component thin films, respectively, and show that these density inhomogeneities are related to inhomogeneous metal component distributions. This dissertation includes previously published coauthored material.

The scaling of integrated circuits requires the use of alternative dielectric materials as the replacement for silicon dioxide in the submicron devices. The scaling limit for silicon dioxide used in MOSFETs is 1.2nm and the Oxide Nitride Oxide (ONO) stack used in flash memory applications is 13.0nm. The use of alternative dielectrics with high- κ value will alleviate the problem of charge retention and also would help to decrease the programming voltage in case of flash memory cells. Many alternative high- κ dielectric materials such as TaO2, TiO2, Al2O3 etc., have been examined for this purpose previously. Recently the metal oxides such as ZrO2 and HfO2 have been found to be viable replacements for the existing oxide. The high- κ value along with high bandgap motivates this replacement. A complete modeling of the reactively sputtered HfO2 films in the thickness range of 294Å to 480Å is attempted using the data obtained by one of the group members at the Sharp Laboratories of America, Inc. The IV and CV data is used to characterize the material properties and conduction mechanism in HfO2 films used as a control dielectric. The slope of the Poole-Frenkel plot is close to the theoretical value in the intermediate region however it starts to deviate at high field regions. Temperature dependent data also suggests that there are two types of vii traps active in the intermediate and high field regions. However the origin of these traps is not known. Temperature dependent data indicates that there is a rapid increase in the leakage current at elevated temperatures in the high field region further suggesting that the charge retention capability of the device would be adversely affected under such conditions.

L'usage des oxydes high-K comme diélectriques de grille dans les transistors MOSFET s'impose comme une étape obligatoire pour maintenir la croissance continue des performances électriques de ces composants électroniques. Malheureusement, le dépôt de ces oxydes sur silicium pose des problèmes sérieux (formation d'une couche intermédiaire de silice ou d'un siliciure métallique, mauvaise maîtrise de la qualité électronique de l'interface, mobilité des porteurs réduite, etc.). Une voie envisageable pour réaliser des interfaces Si/high-K de bonne qualité est l'utilisation d'une couche mince de « primaire » organique. Le greffage de chaînes organiques saturées par pontage Si-O-C (silicium-alcoxyle) a été exploré. La stabilité thermique des couches greffées a été étudiée par spectroscopie infrarouge. Il apparaît que la décomposition ne s'effectue pas par rupture de l'ancrage Si-O-C, mais par fragmentation de la chaîne. Ce processus a été modélisé qualitativement par une simulation numérique. Pour optimiser les couches organiques greffées, les efforts se sont orientés vers le greffage de chaînes fonctionnelles ultra-courtes et à terminaison hydrophile. Cependant, la terminaison fonctionnelle de ces chaînes peut interférer avec la réaction de greffage, soit en inhibant la réactivité de la terminaison à greffer, soit en induisant des réactions parasites. L'hydrolyse d'esters courts greffés, nécessaire pour obtenir des terminaisons hydrophiles, n'a pu être réalisée sans éviter l'hydrolyse de l'ancrage Si-O-C. Le dépôt de couches de HfO2 a été réalisé sur des couches organiques dont le greffage est bien maîtrisé. Les couches s'avèrent continues, bien qu'un peu plus rugueuses que sur substrat de silicium non greffé. L'infrarouge indique une décomposition partielle de la couche organique mais la surface du silicium apparaît largement préservée de l'oxydation. Ces résultats préliminaires semblent indiquer que la stabilité thermique de la couche organique ne constitue pas une barrière infranchissable et que l'approche considérée peut être viable. Mots-clés : couches organiques, oxydes high-K, greffage, spectroscopie infrarouge, stabilité thermique, hydrolyse

La miniaturisation des dispositifs CMOS impose d'introduire de nouveaux matériaux dans l'empilement de grille des transistors. Ainsi, l'empilement classique poly-silicium/SiO2 est remplacé par un empilement poly- silicium/métal/matériau à haute permittivité diélectrique. L'introduction de ces nouveaux matériaux nécessite le développement de nouveaux procédés de gravure plasma.<br />L'objectif de ce travail est de proposer un procédé de gravure plasma capable de graver une fine couche de diélectrique (HfO2 dans notre cas) sélectivement par rapport au substrat de silicium sous-jacent. Cette étude montre que les plasmas à base de BCl3 sont très prometteurs dans ce domaine. En effet, les mécanismes de gravure en BCl3 reposent sur une compétition entre gravure et formation d'un dépôt de BCl sur la surface. La transition d'un régime à l'autre est contrôlée par l'énergie des ions du plasma. Comme le seuil de gravure en énergie est plus faible pour HfO2 que pour les substrats contenant du Si, il est possible d'obtenir une sélectivité de gravure infinie en ajustant l'énergie des ions judicieusement. De plus ce travail souligne le rôle important du conditionnement des parois du réacteur de gravure dans les mécanismes mis en jeu en plasma de BCl3. Enfin, des procédés de gravure répondant aux problèmes de sélectivité et d'anisotropie de gravure sont proposés pour graver la fine couche de HfO2 de grille.

La diminution des dimensions des transistors MOS, qui permet d'augmenter leur densité sur une puce, induit des effets parasites qui perturbent fortement le fonctionnement des dispositifs. Le silicium et son oxyde jusqu'alors utilisés pour le module de grille des transistors sont remis en question au profit de nouveaux matériaux : des métaux pour la grille, et des matériaux à forte permittivité diélectrique pour le diélectrique de grille.<br />Ce travail porte sur l'élaboration par gravure plasma d'une grille métallique polysilicium/TiN/HfO2 en vue d'une intégration pour les noeuds technologiques 45 nm et 32 nm. L'analyse des plasmas de gravure halogénés et des surfaces gravées par spectrométrie de masse, spectrométrie de photoélectrons X (XPS) et par des techniques de caractérisation morphologique (MEB, TEM, AFM) a permis de dégager les principaux mécanismes de gravure de TiN. Les stratégies de procédé de gravure de l'empilement de la grille et l'impact des procédés plasma sur l'intégrité des matériaux ont ensuite été discutés.<br />La gravure de TiN en plasma HBr est sélective vis à vis de la couche d'arrêt HfO2 mais elle génère de la pente dans les profils gravés, alors que le plasma de Cl2, plus réactif, conduit à une gravure latérale de la grille et induit des phénomènes de micro masquage. Cela impose un mélange HBr/Cl2 et une gravure à faible énergie de bombardement ionique pour la gravure sélective du métal.<br />La stratégie de gravure du silicium de la grille a du être repensée car l'intégration d'une couche métallique entre le silicium et le diélectrique de la grille modifie la distribution des charges statiques à<br />la surface de la couche d'arrêt, ce qui perturbe le contrôle dimensionnel des profils gravés. De plus la<br />gravure de TiN doit être anisotrope et sélective vis-à-vis de HfO2 tout en respectant l'intégrité de la partie supérieure de la grille en silicium. Ce travail montre que pour éviter la formation d'une encoche latérale à l'interface silicium/métal pendant la gravure du TiN il est nécessaire de contrôler à la fois les couches de passivation qui protègent les flancs du silicium et la composition chimique des dépôts qui recouvrent les parois du réacteur (car cette dernière influence les taux de recombinaison et donc les densités des atomes de Cl et de Br dans le plasma). Il est donc important de contrôler les étapes de conditionnement et de nettoyage des réacteurs de gravure.

Electronic components, based on current semiconductor technologies and operating in radiation rich environments, suffer degradation of their performance as a result of radiation exposure. Silicon carbide (SiC) provides an alternate solution as a radiation hard material, because of its wide bandgap and higher atomic displacement energies, for devices intended for radiation environment applications. However, the radiation tolerance and reliability of SiC-based devices needs to be understood by testing devices  under controlled radiation environments. These kinds of studies have been previously performed on diodes and MESFETs, but multilayer devices such as bipolar junction transistors (BJT) have not yet been studied. In this thesis, SiC material, BJTs fabricated from SiC, and various dielectrics for SiC passivation are studied by exposure to high energy ion beams with selected energies and fluences. The studies reveal that the implantation induced crystal damage in SiC material can be partly recovered at relatively low temperatures, for damag elevels much lower than needed for amorphization. The implantation experiments performed on BJTs in the bulk of devices show that the degradation in deviceperformance produced by low dose ion implantations can be recovered at 420 oC, however, higher doses produce more resistant damage. Ion induced damage at the interface of passivation layer and SiC in BJT has also been examined in this thesis. It is found that damaging of the interface by ionizing radiation reduces the current gain as well. However, for this type of damage, annealing at low temperatures further reduces the gain. Silicon dioxide (SiO2) is today the dielectric material most often used for gate dielectric or passivation layers, also for SiC. However, in this thesis several alternate passivation materials are investigated, such as, AlN, Al2O3 and Ta2O5. These materials are deposited by atomic layer deposition (ALD) both as single layers and in stacks, combining several different layers. Al2O3 is further investigated with respect to thermalstability and radiation hardness. It is observed that high temperature treatment of Al2O3 can substantially improve the performance of the dielectric film. A radiation hardness study furthermore reveals that Al2O3 is more resistant to ionizing radiation than currently used SiO2 and it is a suitable candidate for devices in radiation rich applications. / QC 20120117

L'intégration de diélectriques High- k dans les empilements de grille des transistors a fait naître des problèmes de fiabilité complexes. A cela vient s'ajouter, en vue des technologies sub-32nm planaires, de nouvelles problématiques liées à l'utilisation de substrats silicium sur isolant complètement désertés FDSOI. En effet, l'intégration d'un oxyde enterré sous le film de silicium va modifier électrostatique de la structure et faire apparaître une nouvelle interface Si/SiO2 sujette à d'éventuelles dégradations. Ce manuscrit présente différentes méthodes de caractérisation électrique ainsi que différentes études de fiabilité des dispositifs FDSOI intégrants des empilements High- /grille métallique. Dans un premier temps, une étude complète du couplage électrostatique dans des structures FDSOI est réalisée, permettant de mieux appréhender l'effet d'une tension en face arrière sur les caractéristiques électriques des dispositifs. Différentes méthodes de caractérisation des pièges d'interface sont ensuite présentées et adaptées, lorsque possible, au cas spécifique du FDSOI, où les défauts entre le film de silicium et l'oxyde enterré doivent être pris en compte. Enfin, différentes études de fiabilité sont présentées, des phénomènes de PBTI et de NBTI sur des dispositifs à canaux longs aux phénomènes propres aux dispositifs de petite dimension, tels que l'impact des porteurs chauds dans des structures FDSOI à film ultra fins et les effets d'augmentation de tension de seuil lorsque les largeurs de grille diminuent.

This thesis contains four parts. In the first part, we investigate the post treatment of low-temperature-deposited high dielectric constant (high-k) thin films to enhance their properties. The high-pressure oxygen (O2 and O2+UV light) is employed to improve the properties of low-temperature-deposited metal oxide dielectric films and interfacial layer. In this study, 13nm HfO2 thin films are deposited by sputtering method at room temperature. Then, the oxygen treatments with a high-pressure of 1500 psi at 150 ¢J are performed to replace the conventional high temperature annealing. According to the XPS analyses, integration area of the absorption peaks of O-Hf and O-Hf-Si bonding energies apparently raise and the quantity of oxygen in deposited thin films also increases from XPS measurement. In addition, the leakage current density of standard HfO2 film after O2 and O2+UV light treatments can be improved from 3.12¡Ñ10-6 A/cm2 to 6.27¡Ñ10-7 and 1.3¡Ñ10-8 A/cm2 at |Vg| = 3 V. The leakage current density is significantly suppressed and the current transport mechanism is transformed from trap-assisted tunneling to Schottky-Richardson emission due to the passivation of traps inside HfO2 film and interfacial layer. The proposed treatment is applicable for the future flexible electronics. In the second part of this thesis, we study the memory characteristics of CoSi2 nanocrystals with SiO2 or Al2O3/HfO2 multiple layer tunnel oxide. Due to the property of high-k, it can provide thicker physics thickness than thermal oxide (SiO2) under identical equivalent oxide thickness (EOT) and enhances the reliability without reducing the programming speed. By engineering the different dielectric constant materials and the energy band structure, the performance of nonvolatile memory can be improved. The device that employs HfO2/Al2O3/HfO2 as tunnel oxide exhibits better memory window and carrier injection efficiency than the device employing thermal oxide. Furthermore, the device employs Al2O3/HfO2/Al2O3 as tunnel oxide present the better retention characteristics than the device employs HfO2/Al2O3/HfO2 as tunnel oxide. The corresponding mechanisms were also discussed. For the advanced nonvolatile application, high-k material - hafnium oxide was applied on the resistance switching nonvolatile memory device as resistive switching layer with TiN/Ti/HfO2/TiN structure in the third part of this thesis. By using a thin Ti layer as the reactive buffer layer into the anode side, the proposed device exhibits superior bistable characteristics. Since the Ti can easily absorb oxygen atoms from buried HfO2, the TiN/Ti bi-layer can greatly improve the resistive switching characteristics. The mechanism of the proposed device is dominated by the redox reaction between the Hf and HfOX. In addition, the proposed device has multi-bit storage ability to enhance the storage density. From the temperature-dependent measurements, the low ambient temperatures would cause the formation and rupture of the conduction path with discordant quality and quantity during every switching cycle, which give rise to a wide distribution of the HRS and LRS resistance and instability of resistive switching properties. In the fourth part of this thesis, we investigate the characteristics of an advanced Cu-induced resistance switching non-volatile memory with Pt/Cu/SiON/TiN/SiO2/Si structure. By inserting a Cu ultra thin film between the SiON layer and Pt top electrode, the device exhibits bipolar resistive switching characteristics after a forming process at 13.6 V. However, the forming and resistive switching process can not be observed in the device if the Cu thin film is omitted. Additionally, we employ a two-step forming process to reduce the forming voltage to 7.5 V. During the forming process, the bias-induced Cu could form a filament-like stretched electrode, but the ¡§set¡¨ and ¡§forming¡¨ voltage of the proposed device take place on different polarity. Therefore, we suppose a bipolar switching mechanism, and our device is dominated by the formation and rupture of the oxygen vacancies in a conduction path between the Cu filament and TiN button electrode. The device also demonstrates stable resistance states during 105 cycling bias pulse operations and acceptable retention characteristics after an endurance test at 85¢J. The I-V switching curves are analyzed to realize the carrier transport mechanisms in different bias regions and resistance states. Additionally, the effective thickness of the resistance switching layers (deff) for the samples with different SiON thickness is also extracted from the related mechanism and demonstrated that the deff is independent with the initial SiON thickness. The corresponding mechanisms and the deff verify the bipolar switching is dominated by the formation and rupture of the oxygen vacancies in conduction path between Cu filament and TiN bottom electrode.

A novel high-k gate dielectric material, i.e., hafnium-doped tantalum oxide (Hf-doped TaOx), has been studied for the application of the future generation metal-oxidesemiconductor field effect transistor (MOSFET). The film's electrical, chemical, and structural properties were investigated experimentally. The incorporation of Hf into TaOx impacted the electrical properties. The doping process improved the effective dielectric constant, reduced the fixed charge density, and increased the dielectric strength. The leakage current density also decreased with the Hf doping concentration. MOS capacitors with sub-2.0 nm equivalent oxide thickness (EOT) have been achieved with the lightly Hf-doped TaOx. The low leakage currents and high dielectric constants of the doped films were explained by their compositions and bond structures. The Hf-doped TaOx film is a potential high-k gate dielectric for future MOS transistors. A 5 àtantalum nitride (TaNx) interface layer has been inserted between the Hf-doped TaOx films and the Si substrate to engineer the high-k/Si interface layer formation and properties. The electrical characterization result shows that the insertion of a 5 àTaNx between the doped TaOx films and the Si substrate decreased the film's leakage current density and improved the effective dielectric constant (keffective) value. The improvement of these dielectric properties can be attributed to the formation of the TaOxNy interfacial layer after high temperature O2 annealing. The main drawback of the TaNx interface layer is the high interface density of states and hysteresis, which needs to be decreased. Advanced metal nitride gate electrodes, e.g., tantalum nitride, molybdenum nitride, and tungsten nitride, were investigated as the gate electrodes for atomic layer deposition (ALD) HfO2 high-k dielectric material. Their physical and electrical properties were affected by the post metallization annealing (PMA) treatment conditions. Work functions of these three gate electrodes are suitable for NMOS applications after 800°C PMA. Metal nitrides can be used as the gate electrode materials for the HfO2 high-k film. The novel high-k gate stack structures studied in this study are promising candidates to replace the traditional poly-Si-SiO2 gate stack structure for the future CMOS technology node.