En starkt konkurrerande marknad har tvingat företag att hitta nya vägar att marknadsföra sig på. Att använda förpackningsdesign har visat sig vara ett starkt verktyg för företag att nå ut med sin marknadsföring till konsumenter. Förpackningen har fått en viktig roll genom att få produkten att sticka ut i butikshyllan men den är även ett sista steg att kommunicera ut varumärket. Teorier om förpackningsdesign samt konsumentbeteende har hjälpt till att skapa en överskådlig bild över vad som studerats tidigare men även ge en förförståelse för fenomenet förpackningsdesign. Detta har bidragit till valet av studiens angreppsvinkel, vilken är att undersöka förpackningsdesign ur ett konsumentperspektiv för att få möjligheten att förstå hur en konsument tänker inför ett köpbeslut, samt vad som kan ligga till grund för vad en konsument attraheras av. Vad som var högst påtagligt efter en snabb överblick var att en förpackning påverkar en konsument, men hur mycket och till vilken grad var svårare att analysera. Det är många faktorer utöver förpackningen som även dessa har betydelse för vilken produkt en konsument i slutändan väljer. Efter en mer grundlig analys av data, insamlad med hjälp av fokusgruppsintervjuer samt de tidigare framtagna teorierna kunde slutsatsen dras att konsumenten påverkas av olika faktorer tillsammans vid val av lågengagemangsvara. Dock observerades en antydan till att konsumenter inte påverkas av förpackningen i lika stor utsträckning som av tidigare preferenser, varumärke och pris. Sammantaget krävs ett samspel mellan design och utformning samt pris, positionering och innehåll för att skapa en lyckad förpackningsdesign. / A highly competitive market has forced companies to find new ways to market themselves. Using package design has proven to be a powerful tool for companies to reach out with their marketing to consumers. The package has got a major role as a last step to communicate the brand to the consumers. This study aims to examine and analyse what factors influence a consumer in the decision making process when choosing a packaged product in the FMCG (fast-moving consumer goods) industry. Three focus group interviews with consumers has generated qualitative data which is presented in relation to the theoretical framework of the study. The results show that there are many factors in addition to the package that also have a bearing on what product a consumer ultimately choose. A conclusion is drawn that different factors work together to influence the consumers choice of product. However, consumers seem to be less affected by the package than by past preferences, brand and price. Overall an interaction between design and form, price, positioning and content is required to create a successful package design.

Surface mount devices (SMDs), such as flip chip packages and ball grid array (BGA) packages are gaining in popularity in microelectronics industry because they provide high density inputs/outputs, better electrical and thermal performance. However, these solder bump interconnections in SMDs are sandwiched between the silicon die and the substrate, which makes them challenging to be inspected. Current non-destructive solder bump inspection techniques like electrical testing, X-ray and acoustic microscopy have some application gaps. New solder bump inspection technique is urgently needed to fill these gaps. Previous work has shown the potential of using a non-contact, non-destructive laser ultrasonics and laser interferometer based inspection system for assessing solder bump qualities. The system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages and a laser interferometer to measure the transient out-of-plane displacement on the package surface. The quality of the solder bumps can be evaluated by analyzing the out-of-plane displacement. However, there are still some gaps that need to be addressed before the system is ready on the shelf. This dissertation focuses on addressing some of these existing issues. The research work consists of the following: 1) a control interface was developed to integrate all the different modules to achieve automation. 2) a new signal-processing method for analyzing the transient out-of-plane displacement signals without requiring a known-good reference chip was developed. 3) the application scope of the system was expanded to inspect the second level solder bumps in BGA packages. Two types of process-induced defects including poor-wetting and solder bump voids were investigated. Meanwhile, solder bump fatigue caused by cyclic mechanical bending and thermal cycle was also studied using this system. 4) a finite element analysis was performed to study the thermo-mechanical reliability of solder bumps in PBGA package under cyclic thermal loads. The successful completion of the research objectives has led to a laser ultrasound solder bump inspection system prototype with more user-friendliness, higher throughputs, better repeatability and more flexibility, which accelerate the commercialization the system.

Lors du fonctionnement des packages électroniques, ceux ci sont exposés à diverses sollicitations d'ordres thermiques et mécaniques. De même, la combinaison de ces sources de contraintes constitue l'origine de la quasi majorité des défaillances des packages électroniques. Pour s'assurer de la bonne résistance des packages électroniques, les fabricants pratiquent des tests de fiabilité et des analyses de défaillance avant toute commercialisation. Toutefois, les essais expérimentaux, lors de la phase de conception et de l'élaboration des prototypes, s'avèrent contraignants en termes de temps et de ressources matérielles. En revanche, la simulation numérique à l'aide de la méthode des éléments finis constitue une option alternative en termes de temps et de ressources. Les objectifs dévolus aux travaux de recherche visent à élaborer quatre modèles éléments finis en 3D, validés/calibrés par des essais expérimentaux, intégrant les recommandations JEDEC (1) en vue de : - Procéder à la caractérisation thermique et thermomécanique des packages électroniques ; - Et prédire la durée de vie en fatigue thermique des joints de brasures et ce, en lieu et place de la caractérisation expérimentale normalisée. Or, la mise en œuvre des modèles éléments finis présente certains inconvénients liés aux incertitudes au niveau de la géométrie, des propriétés matériaux, les conditions aux limites ou les charges. Ceux ci ont une influence sur le comportement thermique et thermomécanique des systèmes électroniques. D'où la nécessité de formuler le problème en termes probabilistes et ce, dans le but de mener une étude de fiabilité et d’optimisation des packages électroniques. Pour remédier au temps de calcul énorme généré par les méthodes d’analyse de fiabilité classiques, nous avons développé des méthodologies spécifiques à cette problématique, via des méthodes d’approximation basées sur le krigeage avancé,qui nous ont permis de bâtir un modèle de substitution, qui rallie efficacité et précision. Par conséquent, une analyse de fiabilité a été menée avec exactitude et dans un temps extrêmement court, via les méthodes de simulation Monte Carlo et FORM/SORM, couplées avec le modèle de krigeage avancé. Ensuite, l’analyse de fiabilité a été associée dans le processus d’optimisation, en vue d’améliorer la performance et la fiabilité de la conception structurelle des packages électroniques. A la fin, nous avons procédé à l’applicabilité des dites méthodologies d’analyse de fiabilité aux quatre modèles éléments finis ainsi développés. Il résulte que les analyses de fiabilité menées se sont avérées très utiles pour prédire les effets des incertitudes liées aux propriétés matériaux. De même, l’analyse d’optimisation de fiabilité ainsi réalisée nous a permis d’améliorer la performance et la fiabilité de la conception structurelle des packages électroniques. (1) JEDEC (Joint Electron Device Engineering Council) est un organisme de normalisation des semi-conducteurs. / During operation, electronic packages are exposed to various thermal and mechanical solicitations. These solicitations combined are the source for most of electronic package failures. To ensure electronic packages robustness, manufacturers perform reliability testing and failure analysis prior to any commercialization. However, experimental tests, during design phase and prototypes development, are known to be constraining in terms of time and material resources. This research aims to develop four finite element models in 3D, validated/calibrated by experimental tests, integrating JEDEC recommendations to : - Perform electronic packages thermal and thermomechanical characterization ; - Predict the thermal fatigue life of solder joints in place of the standardized experimental characterization.However, implementation of the finite element model has some disadvantages related to uncertainties at the geometry, material properties, boundary conditions or loads. These uncertainties influence thermal and electronic systems thermomechanical behavior. Hence the need to formulate the problem in probabilistic terms, in order to conduct a reliability study and a electronic packages reliability based design optimization.To remedy the enormous computation time generated by classical reliability analysis methods, we developed methodologies specific to this problem, using approximation methods based on advanced kriging, which allowed us to build a substitution model, combining efficiency and precision. Therefore reliability analysis can be performed accurately and in a very short time with Monte Carlo simulation (MCS) and FORM / SORM methods coupled with the advanced model of kriging. Reliability analysis was associated in the optimization process, to improve the performance and electronic packages structural design reliability. In the end, we applied the reliability analysis methodologies to the four finite element models developed. As a result, reliability analysis proved to be very useful in predicting uncertainties effects related to material properties. Similarly, reliability optimization analysis performed out has enabled us to improve the electronic packages structural design performance and reliability. In the end, we applied the reliability analysis methodologies to the four finite element models developed. As a result, reliability analysis proved to be very useful in predicting uncertainties effects related to material properties. Similarly, reliability optimization analysis performed out has enabled us to improve the electronic packages structural design performance and reliability.

Advances in microelectronics technology have enabled us to integrate a complex electronic system (such as a radio) on a single chip or in a single package module, known as system-on-chip (SoC) and system-on-package (SoP) paradigms. This brings not only new opportunities for system integration, but also challenges in design and implementation. One of these challenges is how to achieve an optimum total solution of system integration via chip and package co-design, because there is no tool or design methodology available for such kind of optimization. This thesis focuses on innovative multi-band multi-standard radio front-end design and explores a new design methodology. The motivation of developing this design methodology is to achieve an optimum total solution for radio system implementation via chip and package co-design and co-optimization. The methodology starts from RF packaging and components modeling. Necessary models for both on-chip and off-chip passives are developed. Parasitic effects of packages for radio chips are modeled for particular frequencies. Compared with high-speed digital packaging, RF packaging normally deals with narrow band signals. It is possible to absorb some unwanted parasitics by designing proper port matching networks. In addition, cost-performance trade-offs are performed. In this context, we first developed process and technology based cost models, which include parameters like chip real estate, raw materials, package, test and rework. Impact of process variation on final yield has also been considered in the models by using a statistical analysis approach. Performance of different design options is measured by a special FoM (figure-of-merit). Each type of analog/RF circuit (such as LNA, PA and ADC) has its own dedicated FoM. Through a series of cost-performance trade-offs for different on-chip versus off-chip passives and partitions, an optimum total solution is obtained. Finally, this methodology was demonstrated via a number of design examples for multi-band multi-standard radio front-end. The author has explored the optimum solutions for different circuit architectures and process technologies encompassing parallel, concurrent and digitally programmable multi-band radio frond-end blocks. It is interesting to find that, for complex RF circuits like a multi-band multi-standard radio, moving some passives off-chip will have significant cost-savings. In addition to the above contributions, the author has also developed an MCM-D technology on LCP and glass substrates, based on metal deposition and BCB spin-coating at KTH clean room. The author has also performed some preliminary studies on UWB radio for RFID applications. / QC 20101005

QC 20101018

This dissertation aims to evaluate the package effects on the performance of radio frequency integrated circuits (RFICs) for wireless applications. A model-based study is presented to compare the effects between flip-chip and wire-bond packages on a front-end cascode low-noise amplifier (LNA) in a 2.45 GHz CMOS wireless local area network (WLAN) receiver. To construct the package electrical models, specific modeling dies are designed to help extract the equivalent-circuit elements from measured S-parameters for chip-package interconnects. Furthermore, the ground-proximity effect on on-chip spiral inductors in a flip-chip package is first observed and presented in this modeling study. Excellent agreement between modeling and measurement is obtained by up to 20 GHz for a 64-pin flip-chip ball grid array (FC-BGA) package and a 64-pin wire-bond quad flat nonlead (WB-QFN) package. For practical applications, the established package models are used to predict the degradation of the figure of merit for the cascode LNA under packaged condition. Chip-package co-simulations can achieve good agreement with measurements, and thus can persuasively account for the complete effects caused by the two different packages on the cascode LNA. To simultaneously consider the package and board interconnect effects on RFICs, this dissertation also designs and implements a 1.95 GHz upconverter for the wideband code-division multiple-access (W-CDMA) transmitter. Specific ground wire-bonding and board connection are designed to minimize the linearity degradation due to package and board interconnects. Nonlinear analysis technique is also used to evaluate the nonlinear distortion of the upconverter in the chip-package-board co-design phase. The final measurement results have successfully verified the co-design predictions and simulations for this upconverter.

No description available.

Baigiamojo darbo autorius: Simona Anankaitė Pilnas baigiamojo darbo pavadinimas: Pieno pakuotės patrauklumo didinimas Baigiamojo darbo vadovas: Prof. dr. Arvydas Bakanauskas Baigiamojo darbo atlikimo vieta ir metai: Vytauto Didžiojo universitetas, Ekonomikos ir vadybos fakultetas, Kaunas, 2012 Puslapių skaičius: 66 Lentelių skaičius: 0 Paveikslų skaičius: 37 Priedų skaičius: 3 Darbe analizuojama produkto pakuotės svarba pieno produktų rinkoje. Darbo tikslas – pateikti siūlymus pieno pakuotės patrauklumo didinimui. Šiam tikslui pasiekti nagrinėjama mokslinė literatūra, atliktas Lietuvos gamintojų pieno pakuočių patrauklumo tyrimas bei, remiantis surinktais duomenimis, pateikiami pasiūlymai patrauklumo didinimui. Darbą sudaro trys pagrindinės dalys. Pirmojoje, teorinėje, analizuojami mokslinės literatūros šaltiniai pakuotės sąvokos ir svarbos, jos funkcijų, ją sudarančių elementų tema, taip pat pateikiami pakuotės patrauklumo tyrimams naudojami metodai. Antrojoje dalyje pristatomas pieno pakuotės patrauklumo tyrimas. Projektinėje darbo dalyje, remiantis analizuota teorija bei atliktu tyrimu, pateikiami pasiūlymai pieno pakuotės patrauklumo didinimui. Pasiūlymai teikiami penkiose kategorijose, kiekvienoje jų analizuojant šešis sudėtinius pakuotės elementus. Iš viso darbe pateikti 27 pasiūlymai (kai kurie jų – išplėstiniai, t.y. vienoje kategorijoje yra keli) pieno pakuočių patrauklumo didinimui. / Author of diploma paper: Simona Anankaite Full title of diploma paper: Improvement of the milk package attractiveness Diploma paper advisor: Prof. dr. Arvydas Bakanauskas Presented at: Vytautas Magnus University, Faculty of Economics and Management, Kaunas, 2012 Number of pages: 66 Number of tables: 0 Number of figures: 37 Number of appendixes: 3 In this paper the meaning of milk product packaging is analyzed. The aim of this research is to present some specific propositions to increase the attractiveness of milk product package. To achieve this goal various research papers on this subject were analyzed, a practical research had been made and finally propositions to increase the attractiveness of milk product package were made. The paper consists of three main parts. In first one various research papers on package, its meaning, and functions, its elements, on specific research types are analyzed. In the second one the practical research is presented. In final part of the paper some specific propositions to increase the attractiveness of milk product package are presented. The propositions are made for five different categories, analyzing six different elements of milk package in each one of them. In total 27 propositions how to increase the attractiveness of milk product package are presented (some of them are extended).

here is an increasing demand for higher bandwidth (BW) between logic and memory ICs for future smart mobile systems. Such high BW are proposed to be achieved using 3D interposers that have ultra-small through-package-via (TPVs) interconnections to connect the logic device on one side of the interposer to the memory on the other side. The current approach is primarily based on organic or silicon interposers. However, organic interposers face several challenges due to their poor dimensional stability, and coefficient of thermal expansion (CTE) mismatch to silicon ICs. Silicon interposers made with back-end-of-line (BEOL) wafer processes can achieve the required wiring and I/O density, but are not cost effective, and in addition exhibit higher electrical loss due to the semiconducting nature of the Si substrate. In this research, ultra-thin 3D Glass Interposers are studied as a superior alternative to organic and silicon interposers. The fundamental focus of this research is to achieve ultra-small TPVs in thin glass with dimensions similar to that of through-silicon-vias (TSVs) in silicon. The objective of this research is to study and demonstrate ultra-small pitch (30µm) TPV hole formation (10µm diameter), metallization and electrical characterization in ultra-thin (30µm) glass substrates. To meet these objectives, this study focusses on four main research tasks: a) electrical modeling and design of ultra-small TPVs in glass, b) small diameter TPV hole formation with minimum defects, c) copper metallization of TPVs with reliable adhesion, and d) electrical characterization of TPVs. This research reports the first demonstration of ultra-small TPVs (10-15µm in diameter) in ultra-thin glass interposer substrates (30µm). A thin-glass handling method is developed using polymer surface layers to achieve defect-free handling of glass even at thicknesses as low as 30µm. Several TPV formation methods are explored including excimer laser ablation using 193nm (ArF) lasers to form TPVs with smallest diameter and pitch. A brief study on the through-put capabilities of these excimer lasers is also discussed. The fundamental approach to TPV metallization involves a semi-additive-plating process (SAP) using electroless and electrolytic copper deposition techniques. The resulting side-wall surfaces of TPVs after metallization are analyzed through SEM imaging of TPV cross-sections, and are further characterized using nano-indentation tests. Additionally, thermo-mechanical reliability tests and failure analysis are performed to study the reliability of TPVs that are metallized with Cu. This research culminates in design, fabrication and electrical characterization of small pitch TPVs in ultra-thin glass interposers (30µm).

Emerging I/O density and bandwidth requirements are driving packages to low-CTE silicon, glass and organic substrates for higher wiring density and reliability of interconnections and Cu-low k dielectrics. These are needed for high performance applications as 2.5D packages in large-size, and also as ultra-thin packages for consumer applications that are directly assembled on the board without the need for an intermediate package. The trend to low-CTE packages (CTE of 3-8ppm/°C), however, creates large CTE mismatch with the board on which they are assembled. Interconnection reliability is, therefore, a major concern when low CTE interposers are surface mounted onto organic system boards via solder joints. This reliability concern is further aggravated with large package sizes and finer pitch. For wide acceptance of low CTE packages in high volume production, it is also critical to assemble them on board using standard Surface Mount Technologies (SMT) without the need for under-fill. This research aims to demonstrate reliable 400 micron pitch solder interconnections from low CTE glass interposers directly assembled onto organic boards by overcoming the above challenges using two approaches; 1) Stress-relief dielectric build up layers on the back of the interposer, 2) Polymer collar around the solder bumps for shear stress re-distribution. A comprehensive methodology based on modeling, design, test vehicle fabrication and characterization is employed to study and demonstrate the efficacy of these approaches in meeting the interposer-to-board interconnection requirements. The effect of varying geometrical and material properties of both build-up layers and polymer collar is studied through Finite Element Modeling. Interposers were designed and fabricated with the proposed approaches to demonstrate process feasibility.