Includes bibliographical references (pages 165-169). / Classical Statistical Process Control Charts are essential in Statistical Control exercises and thus constantly obtained attention for quality improvements. However, the establishment of control charts requires large-sample data (say, no less than I 000 data points). On the other hand, we notice that the small-sample based Grey System Theory Approach is well-established and applied in many areas: social, economic, industrial, military and scientific research fields. In this research, the short time trend curve in terms of GM( I, I) model will be merged into Shewhart and CU SUM two-sided version control charts and establish Grey Predictive Shewhart Control chart and Grey Predictive CUSUM control chart. On the other hand the GM(2, I) model is briefly checked its of how accurate it could be as compared to GM( I, 1) model in control charts. Industrial process data collected from TBF Packaging Machine Company in Taiwan was analyzed in terms of these new developments as an illustrative example for grey quality control charts.

Surface mount devices (SMDs), such as flip chip packages and ball grid array (BGA) packages are gaining in popularity in microelectronics industry because they provide high density inputs/outputs, better electrical and thermal performance. However, these solder bump interconnections in SMDs are sandwiched between the silicon die and the substrate, which makes them challenging to be inspected. Current non-destructive solder bump inspection techniques like electrical testing, X-ray and acoustic microscopy have some application gaps. New solder bump inspection technique is urgently needed to fill these gaps. Previous work has shown the potential of using a non-contact, non-destructive laser ultrasonics and laser interferometer based inspection system for assessing solder bump qualities. The system uses a pulsed Nd:YAG laser to induce ultrasound in the chip packages and a laser interferometer to measure the transient out-of-plane displacement on the package surface. The quality of the solder bumps can be evaluated by analyzing the out-of-plane displacement. However, there are still some gaps that need to be addressed before the system is ready on the shelf. This dissertation focuses on addressing some of these existing issues. The research work consists of the following: 1) a control interface was developed to integrate all the different modules to achieve automation. 2) a new signal-processing method for analyzing the transient out-of-plane displacement signals without requiring a known-good reference chip was developed. 3) the application scope of the system was expanded to inspect the second level solder bumps in BGA packages. Two types of process-induced defects including poor-wetting and solder bump voids were investigated. Meanwhile, solder bump fatigue caused by cyclic mechanical bending and thermal cycle was also studied using this system. 4) a finite element analysis was performed to study the thermo-mechanical reliability of solder bumps in PBGA package under cyclic thermal loads. The successful completion of the research objectives has led to a laser ultrasound solder bump inspection system prototype with more user-friendliness, higher throughputs, better repeatability and more flexibility, which accelerate the commercialization the system.

L'intérêt et le développement des microsystèmes aujourd'hui sont basés sur les mêmes principes qui ont fait le succès des circuits intégrés. Comme dans la microéléctronique, le silicium est le matériau le plus utilisé parmi les microsystèmes. Malgré cette hégémonie, il existe d'autres alternatives pour les applications où le silicium n'est pas très performant. L'arséniure de gallium (AsGa) se montre prometteur car des effets comme la piézo­électricité, la piézo­resistivité et l'émission de rayonnement lumineux peuvent efficacement être exploités. <br />La fabrication des microstructures suspendues (mécaniques) compatibles avec des <br />technologies standards des circuits intégrés en AsGa est présentée dans cette thèse. Ces <br />microstructures sont obtenues à travers le micro­usinage en volume par la face avant et ne demandent <br />aucune modification du procédé si ce n'est une étape post­process de gravure destinée à libérer les <br />structures devant être suspendues. Ce principe permet la fabrication collective en grandes quantités et <br />à bas coût puisque s'insérant dans une filière industrielle stabilisée. <br />Dans ce travail, plusieurs solutions de gravure ont été étudiées et caractérisées. Les vitesses de <br />gravure et les éventuels dégâts dans les couches diélectriques et de métallisation des plots ont été <br />vérifiés. A partir de ces résultats, deux applications potentielles pour les microsystèmes en AsGa ont <br />été considérées : les composants thermiques qui tirent parti du coefficient Seebeck de l'AsGa et de <br />l'isolation thermique des structures suspendues, et les composants électroniques passifs micro­usinés <br />pour les circuits micro­ondes, comme les lignes micro­rubans et les inductances planaires. <br />Finalement, un ensemble d'outils de CAO pour les microsystèmes a été développé. Des modules <br />spécifiques ont été assemblés à l'environnement Mentor Graphics, comme par exemple la vérification <br />des règles de dessins pour les microsystèmes, des outils pour la visualisation du layout en coupe et en <br />trois dimensions, et des simulateurs de gravure. <br />Mots clés microsystèmes, arséniure de gallium, micro­usinage, thermocouple, inductance <br />planaire, outils de CAO.

Consumer demands are driving the current trend in the microelectronics industry to make electronic products that are miniature, fast, compact, high-density, reliable and low-cost. The use of surface mount devices (SMDs) has helped to decrease the size of electronic packages through the use of solder bump interconnections between the devices and the substrates/printed wiring boards (PWBs). Solder bumps act as not only mechanical, but also electrical interconnections between the device and the substrate/PWB. Common manufacturing defects ¨C such as open, cracked, missing, and misaligned solder bumps ¨C are difficult to detect because solder bumps are hidden between the device and the substrate/PWB after assembly. The reliability of packaged electronic devices in storage and usage is a major concern in the microelectronics industry. Therefore, quality inspection of solder bumps has become a critical process in the microelectronics industry to help ensure product quality and reliability. In this thesis, a methodology for quality evaluation and reliability study of solder bumps in electronic packages has been developed using the non-destructive and non-contact laser ultrasound-interferometric technique, finite element and statistical methods in this research work. This methodology includes the following aspects: 1) inspection pattern ¨C specific inspection patterns are created according to inspection purpose and package formats, 2) laser pulse energy density calibration ¨C specific laser pulse power and excitation laser spot size are selected in terms of package formats, 3) processing and analysis methods, including integrated analytical, finite element and experimental modal analyses approach, advanced signal processing methods and statistical analysis method, 4) approach combining modal analysis and advanced signal processing to improve measurement sensitivity of laser ultrasound-interferometric inspection technique, and 5) calibration curve using energy based simulation method and laser ultrasound inspection technique to predict thermomechanical reliability of solder bumps in electronic packages. Because of the successful completion of the research objectives, the system has been used to evaluate a broad range of solder bump defects in a variety of packaged electronic devices. The development of this system will help tremendously to improve the quality and reliability of electronic packages.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

abstract: Infant mortality rate of field deployed photovoltaic (PV) modules may be expected to be higher than that estimated by standard qualification tests. The reason for increased failure rates may be attributed to the high system voltages. High voltages (HV) in grid connected modules induce additional stress factors that cause new degradation mechanisms. These new degradation mechanisms are not recognized by qualification stress tests. To study and model the effect of high system voltages, recently, potential induced degradation (PID) test method has been introduced. Using PID studies, it has been reported that high voltage failure rates are essentially due to increased leakage currents from active semiconducting layer to the grounded module frame, through encapsulant and/or glass. This project involved designing and commissioning of a new PID test bed at Photovoltaic Reliability Laboratory (PRL) of Arizona State University (ASU) to study the mechanisms of HV induced degradation. In this study, PID stress tests have been performed on accelerated stress modules, in addition to fresh modules of crystalline silicon technology. Accelerated stressing includes thermal cycling (TC200 cycles) and damp heat (1000 hours) tests as per IEC 61215. Failure rates in field deployed modules that are exposed to long term weather conditions are better simulated by conducting HV tests on prior accelerated stress tested modules. The PID testing was performed in 3 phases on a set of 5 mono crystalline silicon modules. In Phase-I of PID test, a positive bias of +600 V was applied, between shorted leads and frame of each module, on 3 modules with conducting carbon coating on glass superstrate. The 3 module set was comprised of: 1 fresh control, TC200 and DH1000. The PID test was conducted in an environmental chamber by stressing the modules at 85°C, for 35 hours with an intermittent evaluation for Arrhenius effects. In the Phase-II, a negative bias of -600 V was applied on a set of 3 modules in the chamber as defined above. The 3 module set in phase-II was comprised of: control module from phase-I, TC200 and DH1000. In the Phase-III, the same set of 3 modules which were used in the phase-II again subjected to +600 V bias to observe the recovery of lost power during the Phase-II. Electrical performance, infrared (IR) and electroluminescence (EL) were done prior and post PID testing. It was observed that high voltage positive bias in the first phase resulted in little/no power loss, high voltage negative bias in the second phase caused significant power loss and the high voltage positive bias in the third phase resulted in major recovery of lost power. / Dissertation/Thesis / M.S. Engineering 2011

En la presente investigación, se confirmó la viabilidad de la creación de una plataforma web “RAYMI” en la que todas las personas naturales y empresas tendrían a su alcance todo tipo de proveedores para diferentes clases de eventos. Tras la creación de la página web la dividimos en las siguientes categorías: Estructuras, Diversión, Audiovisual, Música, Matrimonios y Catering. De esta manera, se facilita su uso y búsqueda de los diferentes proveedores a todos nuestros consumidores de Lima metropolitana, sector urbano, dirigido a todos los distritos de nivel socioeconómico A y B. Así mismo, se pudo verificar en el proyecto que las personas cuentan con una incertidumbre al momento de tener que buscar un proveedor, ya que en la mayoría de casos requieren una mezcla de un buen precio, buena calidad y confiabilidad del servicio. La mayoría de nuestros consumidores suelen buscar referidos de proveedores con sus conocidos para así cerciorarse que no ocurra ningún inconveniente en el servicio, esto usualmente les toma más de lo esperado ya que en algunos casos tienen un tiempo limitado entre la búsqueda y fecha del evento. Para el análisis del proyecto se realizó la investigación y desarrollo de los siguientes puntos: Fundamentos Iniciales, Validación del Modelo de Negocio, Desarrollo del Plan de Negocios, Plan de Operaciones, Plan de Recursos Humanos, Plan de Marketing, Plan de Responsabilidad Social Empresarial, Plan Financiero y el Plan de Financiamiento. De esta manera, tras el desarrollo de todos los puntos mencionados anteriormente se requiere una inversión inicial de S/46,698. / In the present investigation, the viability of the creation of a “RAYMI” web platform was confirmed in which all natural persons and companies would have at their disposal all kinds of suppliers for different kinds of events. After the creation of the website we divide it into the following categories: Structures, Fun, Audiovisual, Music, Marriages and Catering. In this way, its use and search of the different suppliers is facilitated to all our consumers of metropolitan Lima, urban sector, directed to all the districts of socioeconomic level A and B. Likewise, it was possible to verify in the project that people count with an uncertainty when having to look for a supplier, since in most cases they require a mix of a good price, good quality and reliability of the service. Most of our consumers usually look for referrals from suppliers with their acquaintances in order to make sure that no inconvenience occurs in the service, this usually takes them longer than expected since in some cases they have a limited time between the search and date of the event. For the analysis of the project, the research and development of the following points was carried out: Initial Foundations, Validation of the Business Model, Development of the Business Plan, Operations Plan, Human Resources Plan, Marketing Plan, Corporate Social Responsibility Plan, Financial Plan and the Financing Plan. Thus, after the development of all the points mentioned above, an initial investment of S / 46,698 is required. / Trabajo de investigación

abstract: Yield is a key process performance characteristic in the capital-intensive semiconductor fabrication process. In an industry where machines cost millions of dollars and cycle times are a number of months, predicting and optimizing yield are critical to process improvement, customer satisfaction, and financial success. Semiconductor yield modeling is essential to identifying processing issues, improving quality, and meeting customer demand in the industry. However, the complicated fabrication process, the massive amount of data collected, and the number of models available make yield modeling a complex and challenging task. This work presents modeling strategies to forecast yield using generalized linear models (GLMs) based on defect metrology data. The research is divided into three main parts. First, the data integration and aggregation necessary for model building are described, and GLMs are constructed for yield forecasting. This technique yields results at both the die and the wafer levels, outperforms existing models found in the literature based on prediction errors, and identifies significant factors that can drive process improvement. This method also allows the nested structure of the process to be considered in the model, improving predictive capabilities and violating fewer assumptions. To account for the random sampling typically used in fabrication, the work is extended by using generalized linear mixed models (GLMMs) and a larger dataset to show the differences between batch-specific and population-averaged models in this application and how they compare to GLMs. These results show some additional improvements in forecasting abilities under certain conditions and show the differences between the significant effects identified in the GLM and GLMM models. The effects of link functions and sample size are also examined at the die and wafer levels. The third part of this research describes a methodology for integrating classification and regression trees (CART) with GLMs. This technique uses the terminal nodes identified in the classification tree to add predictors to a GLM. This method enables the model to consider important interaction terms in a simpler way than with the GLM alone, and provides valuable insight into the fabrication process through the combination of the tree structure and the statistical analysis of the GLM. / Dissertation/Thesis / Ph.D. Industrial Engineering 2011