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Avaliação de larga escala: resultados e tomada de decisão / Evaluation of large scale: results and decision makingTavares, Antonio Vanderlei 14 June 2012 (has links)
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Previous issue date: 2012-06-14 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This study aimed to identify and analyze recommendations and decisions from the large-scale assessment of a system of private education in the state of Sao Paulo. The methodological trajectory, initially, there were readings of the final reports of large-scale assessments to identify and document the recommendations and decisions taken in the period 1999 to 2008. Then, set up categories for the analysis of recommendations and decisions. These categories were based on the assumptions that conceive of educational assessment as a tool for monitoring and improving the quality of education offered in school systems. These assumptions were based on the principles of democratic and participative management. The analysis of the recommendations of evaluations allowed us to observe that there is a group of recommendations on teachers' work and one that is intended to administration. However, both contain recommendations that call for analysis and planning by the management team of the education system. In respect of decisions shows that there was a greater concern with the development of actions to curriculum and continuing education of educators. No actions have been identified related to contextual variables raised by the assessment scale. Both the analysis of the recommendations described in assessment reports, when the decisions indicated that the evaluation of large scale offers significant contributions on the education system, but they require planning actions intermediate between the schools and central management / Este trabalho teve o objetivo de identificar e analisar recomendações e decisões
tomadas a partir da avaliação de larga escala de um sistema de ensino particular do
estado de São Paulo. Na trajetória metodológica, inicialmente, foram realizadas
leituras dos relatórios finais das avaliações de larga escala e de documentos para
identificarmos as recomendações e as decisões tomadas no período de 1999 a
2008. Em seguida, definiram-se categorias para a análise das recomendações e
decisões tomadas. Essas categorias foram elaboradas com base nos pressupostos
que concebem a avaliação educacional como um instrumento para monitoramento e
aprimoramento da qualidade da educação oferecida nos sistemas de ensino. Tais
pressupostos foram fundamentados nos princípios da gestão democrática e
participativa. As análises das recomendações das avaliações nos permitiram
observar que há um grupo de recomendações sobre o trabalho docente e outro que
se destina à gestão. No entanto, ambos contêm recomendações que suscitam
análise e planejamento por parte da equipe gestora do sistema educativo. Quanto às
decisões tomadas, observamos que houve uma preocupação maior com o
desenvolvimento de ações voltadas ao currículo e à formação continuada dos
educadores. Não foram identificadas ações relacionadas com variáveis contextuais
levantadas pela avaliação de larga escala. Tanto as análises das recomendações
descritas nos relatórios das avaliações, quando das decisões tomadas indicaram
que a avaliação de larga escala oferece contribuições relevantes sobre o sistema de
ensino, porém estas necessitam de ações de planejamento intermediárias entre as
escolas e a gestão central
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Circuito on-chip para a caracterização em alta escala do efeito de Bias Temperature Instability / On-chip circuit for massively parallel BTI characterizationSilva, Maurício Banaszeski da January 2016 (has links)
O trabalho propõe um circuito para caracterização estatística do fenômeno Bias Temperature Instability (BTI). O circuito tem como base uma matriz de transistores para caracterização eficiente em larga escala de BTI. O design proposto visa o estudo da variabilidade de BTI dependente do tempo em dispositivos altamente miniaturizados. Para tanto se necessita medir centenas de dispositivos, a fim de se obter uma amostra estatisticamente significante. Uma vez que variações nos tempos de estresse e medida dos dispositivos podem gerar erros no processo de caracterização, o circuito implementa em chip (on-chip) o controle dos tempos de estresse e de medida, para que ocorra uma caracterização estatística precisa. O circuito de controle implementado faz com que todos dispositivos testados tenham os mesmos tempos de estresse e os mesmos tempos de recuperação (relaxamento). Desta forma, o circuito proposto melhora significantemente tanto a área utilizada quanto o tempo de medida, quando comparado a alternativas anteriormente implementadas. O leiaute do circuito foi realizado no novo nó tecnológico de 28 nanômetros do IMEC. / This work proposes an array-based evaluation circuit for efficient and massively parallel characterization of Bias Temperature Instability (BTI). This design is highly efficient when studying the BTI time-dependent variability in deeply-scaled devices, where hundreds of devices should be electrically characterized in order to obtain a statistically significant sample size. The circuit controls stress and measurement times for accurate statistical characterization, making sure all the devices characterized have the same stress and recovery times. It significantly improves both area and measurement time. The circuit layout is laid out in the new 28nm node IMEC technology.
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N-ary level in the software test vehicle for the Infoplex database computerLui, David January 1982 (has links)
Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING / Includes bibliographical references. / by David Lui. / B.S.
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Multiple time scale approach to heirarchical aggregation of linear systems and finite state Markov processesCoderch i Collell, Marcel January 1982 (has links)
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Bibliography: leaves 328-332. / by Marcel Coderch i Collell. / Ph.D.
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On steady-state load feasibility in an electrical power networkDersin, Pierre January 1980 (has links)
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Vita. / Includes bibliographical references. / by Pierre Dersin. / Ph.D.
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A 1.0 [mu]m CMOS all-digital clock multiplier.January 1997 (has links)
by Cheng King Sum Frankie. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1997. / Includes bibliographical references (leaf 53). / Acknowledgments --- p.iv / List of Figures --- p.vii / List of Tables --- p.ix / Abstract --- p.x / Chapter Chapter1 --- Introduction --- p.1 / Chapter 1.1 --- Multiple Clock System --- p.1 / Chapter 1.2 --- Clock Multiplier --- p.2 / Phase-Locked Loop --- p.2 / Delay Locked Loop --- p.3 / Chapter 1.3 --- Objective --- p.5 / Chapter Chapter2 --- All-Digital Clock Multiplier --- p.6 / Chapter 2.1 --- Architecture --- p.6 / Chapter 2.2 --- Operation --- p.7 / Chapter 2.3 --- Implementation --- p.9 / Control Circuit --- p.9 / Phase-Locked Circuit --- p.11 / Frequency Detector --- p.12 / Frequency Divider --- p.13 / Synchronize Logic --- p.14 / DCO Control --- p.15 / Chapter Chapter3 --- Digitally-Controlled Oscillator --- p.16 / Chapter 3.1 --- Principle --- p.16 / Chapter 3.2 --- Design --- p.18 / Transient Analysis --- p.18 / Simulation result --- p.26 / Chapter 3.3 --- Layout --- p.30 / Chapter 3.4 --- Summary --- p.32 / Chapter Chapter4 --- Test and Measurement --- p.34 / Chapter 4.1 --- Digitally-Controlled Oscillator Characteristics --- p.34 / Chapter 4.2 --- All-Digital Clock Multiplier Characteristics --- p.43 / Chapter Chapter5 --- Conclusions --- p.51 / Chapter 5.1 --- Summary --- p.51 / Chapter 5.2 --- Recommendation for Future Work --- p.52 / References --- p.53 / Appendix A --- p.54 / Publications and Presentations --- p.54
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An ICT image processing chip based on fast computation algorithm and self-timed circuit technique.January 1997 (has links)
by Johnson, Tin-Chak Pang. / Thesis (M.Phil.)--Chinese University of Hong Kong, 1997. / Includes bibliographical references. / Acknowledgments / Abstract / List of figures / List of tables / Chapter 1. --- Introduction --- p.1-1 / Chapter 1.1 --- Introduction --- p.1-1 / Chapter 1.2 --- Introduction to asynchronous system --- p.1-5 / Chapter 1.2.1 --- Motivation --- p.1-5 / Chapter 1.2.2 --- Hazards --- p.1-7 / Chapter 1.2.3 --- Classes of Asynchronous circuits --- p.1-8 / Chapter 1.3 --- Introduction to Transform Coding --- p.1-9 / Chapter 1.4 --- Organization of the Thesis --- p.1-16 / Chapter 2. --- Asynchronous Design Methodologies --- p.2-1 / Chapter 2.1 --- Introduction --- p.2-1 / Chapter 2.2 --- Self-timed system --- p.2-2 / Chapter 2.3 --- DCVSL Methodology --- p.2-4 / Chapter 2.3.1 --- DCVSL gate --- p.2-5 / Chapter 2.3.2 --- Handshake Control --- p.2-7 / Chapter 2.4 --- Micropipeline Methodology --- p.2-11 / Chapter 2.4.1 --- Summary of previous design --- p.2-12 / Chapter 2.4.2 --- New Micropipeline structure and improvements --- p.2-17 / Chapter 2.4.2.1 --- Asymmetrical delay --- p.2-20 / Chapter 2.4.2.2 --- Variable Delay and Delay Value Selection --- p.2-22 / Chapter 2.5 --- Comparison between DCVSL and Micropipeline --- p.2-25 / Chapter 3. --- Self-timed Multipliers --- p.3-1 / Chapter 3.1 --- Introduction --- p.3-1 / Chapter 3.2 --- Design Example 1 : Bit-serial matrix multiplier --- p.3-3 / Chapter 3.2.1 --- DCVSL design --- p.3-4 / Chapter 3.2.2 --- Micropipeline design --- p.3-4 / Chapter 3.2.3 --- The first test chip --- p.3-5 / Chapter 3.2.4 --- Second test chip --- p.3-7 / Chapter 3.3 --- Design Example 2 - Modified Booth's Multiplier --- p.3-9 / Chapter 3.3.1 --- Circuit Design --- p.3-10 / Chapter 3.3.2 --- Simulation result --- p.3-12 / Chapter 3.3.3 --- The third test chip --- p.3-14 / Chapter 4. --- Current-Sensing Completion Detection --- p.4-1 / Chapter 4.1 --- Introduction --- p.4-1 / Chapter 4.2 --- Current-sensor --- p.4-2 / Chapter 4.2.1 --- Constant current source --- p.4-2 / Chapter 4.2.2 --- Current mirror --- p.4-4 / Chapter 4.2.3 --- Current comparator --- p.4-5 / Chapter 4.3 --- Self-timed logic using CSCD --- p.4-9 / Chapter 4.4 --- CSCD test chips and testing results --- p.4-10 / Chapter 4.4.1 --- Test result --- p.4-11 / Chapter 5. --- Self-timed ICT processor architecture --- p.5-1 / Chapter 5.1 --- Introduction --- p.5-1 / Chapter 5.2 --- Comparison of different architecture --- p.5-3 / Chapter 5.2.1 --- General purpose Digital Signal Processor --- p.5-5 / Chapter 5.2.1.1 --- Hardware and speed estimation : --- p.5-6 / Chapter 5.2.2 --- Micropipeline without fast algorithm --- p.5-7 / Chapter 5.2.2.1 --- Hardware and speed estimation : --- p.5-8 / Chapter 5.2.3 --- Micropipeline with fast algorithm (I) --- p.5-8 / Chapter 5.2.3.1 --- Hardware and speed estimation : --- p.5-9 / Chapter 5.2.4 --- Micropipeline with fast algorithm (II) --- p.5-10 / Chapter 5.2.4.1 --- Hardware and speed estimation : --- p.5-11 / Chapter 6. --- Implementation of self-timed ICT processor --- p.6-1 / Chapter 6.1 --- Introduction --- p.6-1 / Chapter 6.2 --- Implementation of Self-timed 2-D ICT processor (First version) --- p.6-3 / Chapter 6.2.1 --- 1-D ICT module --- p.6-4 / Chapter 6.2.2 --- Self-timed Transpose memory --- p.6-5 / Chapter 6.2.3 --- Layout Design --- p.6-8 / Chapter 6.3 --- Implementation of Self-timed 1-D ICT processor with fast algorithm (final version) --- p.6-9 / Chapter 6.3.1 --- I/O buffers and control units --- p.6-10 / Chapter 6.3.1.1 --- Input control --- p.6-11 / Chapter 6.3.1.2 --- Output control --- p.6-12 / Chapter 6.3.1.2.1 --- Self-timed Computational Block --- p.6-13 / Chapter 6.3.1.3 --- Handshake Control Unit --- p.6-14 / Chapter 6.3.1.4 --- Integer Execution Unit (IEU) --- p.6-18 / Chapter 6.3.1.5 --- Program memory and Instruction decoder --- p.6-20 / Chapter 6.3.2 --- Layout Design --- p.6-21 / Chapter 6.4 --- Specifications of the final version self-timed ICT chip --- p.6-22 / Chapter 7. --- Testing of Self-timed ICT processor --- p.7-1 / Chapter 7.1 --- Introduction --- p.7-1 / Chapter 7.2 --- Pin assignment of Self-timed 1 -D ICT chip --- p.7-2 / Chapter 7.3 --- Simulation --- p.7-3 / Chapter 7.4 --- Testing of Self-timed 1-D ICT processor --- p.7-5 / Chapter 7.4.1 --- Functional test --- p.7-5 / Chapter 7.4.1.1 --- Testing environment and results --- p.7-5 / Chapter 7.4.2 --- Transient Characteristics --- p.7-7 / Chapter 7.4.3 --- Comments on speed and power --- p.7-10 / Chapter 7.4.4 --- Determination of optimum delay control voltage --- p.7-12 / Chapter 7.5 --- Testing of delay element and other logic cells --- p.7-13 / Chapter 8. --- Conclusions --- p.8-1 / Bibliography / Appendices
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Repercussões do sinaes no Instituto Federal de Educação, Ciência e Tecnologia do Ceará / Repercussions of sinaes at the Federal Institute of Education, Science and Technology of CearáViana, Márcia de Negreiros [UNESP] 25 January 2017 (has links)
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Previous issue date: 2017-01-25 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) / Esta tese investiga a avaliação de larga escala do sistema educacional superior dos Institutos Federais por meio do Sistema Nacional de Avaliação da Educação Superior (Sinaes), instituído pela Lei n. 10.861/2004. O objetivo geral, que é analisar se o Sinaes (ferramenta de avaliação de Educação Superior Nacional), é apropriado para traçar um perfil dos Institutos Federais, cujo foco principal é o Ensino Técnico. Como referencial teórico, foram consultados os seguintes autores: Barreyro e Rothen (2014); Cunha (2011); Cardoso (2015); Dias Sobrinho (2010); Frauches (2014); Lima (2007); valorizamos, nesta pesquisa, sobretudo o estudo da escola, em nosso caso, o Instituto Federal de Educação do Ceará, Campus Fortaleza. A pesquisa, de natureza qualitativa, descritiva e exploratória. Utilizou como procedimento metodológico o estudo bibliográfico e documental, nestes, incluindo o levantamento, sistematização e análise dos documentos internos do IFCE e do Sinaes, que foram selecionados por tratarem de avaliação em larga escala, nos Institutos Federais e Universidades. Foram realizadas também entrevistas semiestruturadas com membros do IFCE, Setec e INEP. O IFCE - Campus Fortaleza foi escolhido como locus da pesquisa visto que é a unidade sede da Instituição junto ao Ministério da Educação, como também por realizar a avaliação institucional junto ao Sinaes, desde 2008. Dentre os resultados de pesquisa, destacamos que o Sinaes apresenta-se como um instrumento que não contribui a contento para avaliar tais instituições porque os Institutos Federais apresentam, historicamente, uma constituição complexa e desenvolvem atividades de ensino, pesquisa e extensão em diferentes níveis e modalidades de educação. Embora ofereçam Educação Superior, a vocação dessas escolas é majoritariamente voltada ao Ensino Técnico. Todavia, estas instituições estão sendo erroneamente avaliadas por um instrumento que considera apenas a Educação Superior, sem que sejam consideradas suas especificidades históricas e organizacionais. / This thesis investigates the large scale evaluation of federal institutes higher education system by Sistema Nacional de Avaliação da Educação Superior (Sinaes), established by the Law n. 10.861/2004. The general objective of this research was to analyse if Sinaes (national higher education evaluation tool) it is appropriate to describe a profile of federal institutes whose main focus is middle school professional teaching. As theoretical reference we consulted the following authors: Barreyro e Rothen (2014); Cunha (2011); Cardoso (2015); Dias Sobrinho (2010); Frauches (2014); Lima (2007); We mainly emphasized in this study the school study – Federal Institute of Education of Ceará, Campus Fortaleza. This research is qualitative, descriptive and exploratory and for doing that we used bibliographical and documental analysis as methodological procedures in which it was included surveying, systemization and analysis of IFCE internal documents and Sinaes that were selected because they dealt with large scale evaluation in Universities and Federal Institutes. Semistructured interviews were also used to get information from members of IFCE, Setec and INEP. IFCE Campus Fortaleza was chosen as research locus because it is the headquarters of Federal Institutes for Education Ministry as well as because it has been applying Sinaes since 2008. Among the results, we highlighted that Sinaes does not contribute fully to evaluate such institutions because Federal Institutes are historically complex and they develop teaching, research and extension activities in different levels and education modality. Even though, they offer higher education, their primary vocation is middle school professional teaching. However, those institutions are being wrongly evaluated by an instrument that takes into consideration only higher education without considering their historical and organizational specificities.
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AnÃlise psicomÃtrica dos itens de educaÃÃo fÃsica do Exame Nacional do Ensino MÃdio (ENEM) via teoria clÃssica dos testes / PSYCHOMETRIC ANALYSIS OF THE PHYSICAL EDUCATION ITEMS OF THE NATIONAL EXAM OF SECONDARY SCHOOL VIA CLASSICAL TESTS THEORYLeandro AraÃjo de Sousa 31 January 2017 (has links)
nÃo hà / Nos Ãltimos anos tem crescido a importÃncia das avaliaÃÃes em larga escala no contexto brasileiro, com destaque nesse cenÃrio o Exame Nacional do Ensino MÃdio (ENEM). Com sua reformulaÃÃo em 2009, competÃncias e habilidades da Ãrea de EducaÃÃo FÃsica tÃm sido inseridas na matriz de referÃncia desse exame. Nesse mesmo ano à alterado tambÃm o mÃtodo de anÃlise dos resultados, realizado a partir da Teoria ClÃssica dos Testes (TCT), passando a ser utilizada a Teoria de Resposta ao Item (TRI), sob justificativa de ser mais adequada por permitir a comparabilidade dos resultados. Com isso, esta pesquisa objetivou analisar os itens de EducaÃÃo FÃsica do ENEM dos anos de 2009 a 2014 a partir da TCT. Para tanto, utilizou-se os microdados do exame disponibilizados pelo Instituto Nacional de Estudos e Pesquisas Educacionais AnÃsio Teixeira (INEP). Foram analisados os seguintes parÃmetros mÃtricos: validade, fidedignidade, dificuldade e discriminaÃÃo. Utilizou-se como recurso o software SPSS, versÃo 20.0. Os itens apresentaram bons valores de correlaÃÃo e adequaÃÃo da amostra de itens. Apresentaram escores de comunalidade e cargas fatoriais inadequados para composiÃÃo da prova. A AnÃlise Fatorial ExploratÃria apresentou baixa explicaÃÃo da variÃncia considerando apenas um fator, mesmo a anÃlise grÃfica (scree plot) indicando a unidimensionalidade do teste. Os valores de fidedignidade da prova foram bons, nÃo havendo influÃncia dos itens de EducaÃÃo FÃsica. A dificuldade e discriminaÃÃo apresentaram valores aceitÃveis em quase todos os anos. No entanto, em 2014 a prova nÃo apresentou unidimensionalidade, considerando a variÃncia explicada, bem como na anÃlise grÃfica. Neste ano, os itens apresentaram alta dificuldade e baixa discriminaÃÃo. Dessa forma, conclui-se que as provas de Linguagens e CÃdigos do ENEM apresentaram dificuldades de comprovaÃÃo da unidimensionalidade, embora, tenha apresentado boa precisÃo, com exceÃÃo de 2014 e alguns itens de EducaÃÃo FÃsica do exame nÃo apresentaram parÃmetros adequados. Tais fatores podem comprometer a validade da medida e consequentemente dos resultados desse exame. / In recent years the importance of large-scale evaluations in the Brazilian context has grown, with emphasis in this scenario on the National High School Examination (ENEM). With its reformulation in 2009, the skills and abilities of the Physical Education have been inserted in the reference matrix of this exam. In that same year, the method of analysis of the results, based on the Classical Tests Theory (CTT), was also changed, using the Item Response Theory (IRT), under justification of being more adequate to allow the comparability of the Results. With this, this research aimed to analyze the Physical Education items of ENEM from the years 2009 to 2014 from the CTT. For that, we used the microdata of the exam provided by the National Institute of Studies and Educational Research AnÃsio Teixeira (INEP). The following metric parameters were analyzed: validity, reliability, difficulty and discrimination. SPSS software version 20.0 was used as a resource. The items presented good correlation values and adequacy of the item sample. They presented scores of commonality and factorial loads inadequate for the composition of the test. The Exploratory Factor Analysis presented low explanation of the variance considering only one factor, even the scree plot indicating that the test is unidimensionality. The reliability values of the test were good, with no influence of physical education items. The difficulty and discrimination presented values acceptable in almost every year. However, in 2014 the test did not present unidimensionality, considering the explained variance, as well as in the graphic analysis. This year, the items presented high difficulty and low discrimination. Thus, it is concluded that the Language and Codes tests of the ENEM presented difficulties in proving the unidimensionality, although it presented good accuracy, with the exception of 2014 and some Physical Education items of the exam did not present adequate parameters. Such factors may compromise the validity of the measure and consequently the results of such examination.
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Estudo da resistência ao escoamento em canais de fundo fixo. / Flow resistance estimation in open channels with rigid bed.Yannick Vália Romero Suárez 16 March 2001 (has links)
O problema da previsão da resistência ao escoamento em canais tem atraído a atenção dos engenheiros há longo tempo. Durante os últimos decênios a resistência ao escoamento em canais abertos de fundo fixo tem sido amplamente investigada, usando rugosidade artificial nas superfícies de canais experimentais. A adoção do coeficiente de rugosidade para um canal natural significa estimar a resistência de este ao escoamento. A utilização de um valor incorreto deste coeficiente pode ter grandes impactos na estimação da vazão e em conseqüência no dimensionamento dos projetos de obras hidráulicas. Apresenta-se, mediante pesquisa bibliográfica, os métodos de cálculo para avaliação do coeficiente de rugosidade ou coeficiente de resistência, dando ênfase a aqueles desenvolvidos para canais naturais com rugosidade de grande escala, sem os efeitos do transporte de sedimentos. Em modelo físico avaliam-se os efeitos da distribuição, tamanho e forma dos elementos geométricos na resistência ao escoamento. Espera-se que os resultados da pesquisa proporcionem ao engenheiro os critérios necessários para a avaliação do coeficiente de rugosidade. Os métodos diretos de medição de vazões nos rios nem sempre podem ser levados a cabo em rios de montanha , especialmente na época de cheia, devido às grandes declividades (i>1%), material de grandes dimensões no leito (pedras, seixos, matacões), submersão relativa menor do que 1, condições estas de escoamento que podem ser perigosas para os equipamentos de medição. Em tais circunstâncias é necessário o uso de métodos indiretos. A aplicação das relações de resistência ao escoamento em rios de montanha torna-se difícil pelos escassos conhecimentos na avaliação do coeficiente de resistência. Faz-se uma comparação das diferentes formulações existentes da resistência ao escoamento com dados de um rio dos Andes peruanos, determinando-se uma equação de ajuste. / The flow resistance estimation problem in channels has attracted the engineer's attention for a long time. During the last decades the flow resistance in open channels with rigid bed has been research with the use of artificial roughness in bed flumes. Adapting a natural channel roughness coefficient means the estimation of the corresponding resistance to flow. The use of an incorrect value in this coefficient might produce a big impact in the discharge estimation, as well as in the hydraulic work project. The calculation methods to estimate the roughness coefficient or resistance coefficient are showed through this bibliographic research, attaching importance to those developed for channels with large scale roughness; this without the sediment transport effects into account. The distribution, size and shape effects of the geometric elements in the flow resistance are evaluated in a physical model. It is expected that the research results provide the engineer with the required criteria to estimate the roughness coefficient. The direct methods of the discharge measurement in rivers can not always take place in mountain rivers, owing to the following reasons: high gradients (i>1%), big dimension material (cobbles and boulders), relative submergence lower than unit; flow conditions that might be dangerous for the measuring equipment. Under these circumstances it is necessary the use of indirect methods. The application of flow resistance relations in mountain rivers turns very difficult, due to the limited knowledge in resistance coefficient evaluation. In the following research has been made a comparison of the different existing flow resistance equations in mountain rivers, for a river in the Peruvian Andes by establishing a fitting curve.
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