In state-of-the-art fiber-optics communication systems the fixed forward error correction (FEC) and constellation size are employed. While it is important to closely approach the Shannon limit by using turbo product codes (TPC) and low-density parity-check (LDPC) codes with soft-decision decoding (SDD) algorithm; rate-adaptive techniques, which enable increased information rates over short links and reliable transmission over long links, are likely to become more important with ever-increasing network traffic demands. In this invited paper, we describe a rate adaptive non-binary LDPC coding technique, and demonstrate its flexibility and good performance exhibiting no error floor at BER down to 10(-15) in entire code rate range, by FPGA-based emulation, making it a viable solution in the next-generation high-speed intelligent aggregation networks.

Forward error correction (FEC) is as one of the key technologies enabling the next-generation high-speed fiber optical communications. In this paper, we propose a rate-adaptive scheme using a class of generalized low-density parity-check (GLDPC) codes with a Hamming code as local code. We show that with the proposed unified GLDPC decoder architecture, a variable net coding gains (NCGs) can be achieved with no error floor at BER down to 10(-15), making it a viable solution in the next-generation high-speed fiber optical communications.

L’objectif de la thèse est l’étude des codes correcteurs d’erreurs au niveau applicatif (Application Layer – Forward Error Correction, ou AL-FEC) pour les communications par satellite. Dans ce contexte, pendant les deux première années de thèse, nous avons proposé de nouvelles méthodes d’analyse, de construction et d’optimisation des codes à effacements définis par des matrices de parité à faible densité (code LDPC, pour « Low Density Parity Check » en anglais). La troisième année de la thèse a été consacrée à : (1) La suite des études portant sur de nouvelles méthodes de construction des codes LDPC non-binaires. D’une part, nous avons développé un nouvel algorithme (Scheduled-PEG) qui permet d’optimiser la construction des codes LDPC non-binaires pas rapport aux métriques de performance spécifiques à la couche application, notamment dans le cadre des systèmes de diffusion de contenu (broadcasting). D’autre part, nous avons proposé une nouvelle méthode de construction de codes à faible rendement, qui utilise l’image binaire étendue d’un code LDPC non-binaire. Ces études ont fait l’objet de deux publications dans deux conférences internationales : (a) “Scheduled-PEG construction of LDPC codes for Upper-Layer FEC”, International Workshop on Coding and Cryptography, April 2011, Paris, France. (b) “Extended Non-Binary Low-Density Parity-Check Codes over Erase Channels”, IEEE International Symposium on Wireless Communication Systems, November 2011, Aachen, Germany. (2) Une étude portant sur l’analyse asymptotique de codes cluster-LDPC non-binaires. Cette nouvelle classe de codes – introduite récemment (ISIT’2011) – se distingue par ses excellentes propriétés en termes de distance minimale. Notre étude a permis de déterminer de manière analytique la capacité de correction des codes cluster-LDPC non-binaires, aussi bien pour le décodage itératif par propagation de croyances (BP, pour « Belief Propagation ») que pour le décodage par maximum de vraisemblance (ML, pour « Maximum Likelihood »). Ces résultats seront intégrés à une publication scientifique sur les codes cluster-LDPC, en cours de rédaction, qui sera soumise à « IEEE Transactions on Information Theory », avant la fin de l’année 2011. (3) Une étude portant sur une méthode de construction des codes LDPC qui permet de réduire de manière significative le plancher d’erreur (« error floor ») du code, sans dégrader ses performances dans la région de « waterfall ». Ainsi, nous avons proposé la structuration de la matrice de parité du code, de manière à intégrer une partie irrégulière, optimisée pour la partie « waterfall », et une partie régulière, qui permet de réduire le plancher d’erreur du code. Cette étude fera l’objet d’une publication dans une conférence internationale (à déterminer), à soumettre début 2012. / The advent of content distribution, IPTV, video-on-demand and other similar services accelerate the demand for reliable data transmission over highly heterogeneous networks and toward terminals potentially heterogeneous too. In this context, Forward Error Correction (FEC) codes that operate at the transport or the Application Layer (AL-FEC) are used in conjunction with the FEC codes implemented at the physical layer, in order to improve the overall performance of the communication system. AL-FEC codes are aimed at recovering erased data packets and they are essential in many multicast/broadcast environments, no matter the way the information is transported, for instance using a wired or wireless link, and a terrestrial, satellite-based or hybrid infrastructure.This thesis addresses the design of Low Density Parity Check (LDPC) codes for AL-FEC applications. One the one hand, we provide an asymptotical analysis of non-binary LDPC codes over erasure channels, as well as waterfall and error-floor optimization techniques for finite-length codes. On the other hand, new concepts and coding techniques are developed in order to fully exploit the potential of non-binary LDPC codes.The first contribution of this thesis consists of the analysis and optimization of two new ensembles of LDPC codes. First, we have derived the density evolution equations for a very general ensemble of non-binary LDPC codes with rank-deficient coefficients. This allows improving the code performance, as well as designing ensembles of LDPC codes that can be punctured in an effective manner. The second approach allows the asymptotical optimization of a particular ensemble of LDPC codes, while ensuring low error-floors at finite lengths.The second contribution is the construction of finite length LDPC codes with good waterfall and error floor performance. Two approaches were investigated, according to the metric used to evaluate the code. The “Scheduled” Progressive Edge Growth (SPEG) algorithm is proposed, in order to optimize the waterfall performance of the code. Another method is proposed which consists in optimizing a specific structure of the parity check matrix. This approach gives low error-floors.The third contribution investigates a new technique of rate adaptability for non-binary LDPC codes. We propose a new method to generate “on-the-fly” incremental redundancy, which allows designing codes with flexible coding rates, in order to cope with severe channel conditions or to enable Fountain-like distribution applications.The fourth contribution focuses on a new class of LDPC codes, called non-binary cluster-LDPC codes. We derive exact equations of the density evolution for the iterative decoding and an upper bound for the maximum-likelihood decoding.Finally, we propose a practical solution to the problem of reliable communication via satellite to high-speed trains. Here, the challenge is that obstacles present along the track regularly interrupt the communication. Our solution offers optimal performance with a minimum amount of redundancy.

Low-density parity-check (LDPC) codes are linear error correcting codes which are capable of performing near channel capacity. Furthermore, they admit efficient decoding algorithms that provide near optimum performance. Their main disadvantage is that most LDPC codes have relatively complex encoders. In this thesis, we begin by giving a detailed discussion of the sum-product decoding algorithm, we then study the performance of LDPC codes on the binary erasure channel under sum-product decoding to obtain criteria for the design of codes that allow reliable transmission at rates arbitrarily close to channel capacity. Using these criteria we show how such codes are designed. We then present experimental results and compare them with theoretical predictions. Finally, we provide an overview of several approaches to solving the complex encoder problem.

Made available in DSpace on 2014-06-12T17:39:33Z (GMT). No. of bitstreams: 2 arquivo6919_1.pdf: 4119217 bytes, checksum: 3f1efa22858eeae0d86c8392becd8174 (MD5) license.txt: 1748 bytes, checksum: 8a4605be74aa9ea9d79846c1fba20a33 (MD5) Previous issue date: 2007 / Códigos baseados em matrizes esparsas têm desempenhado um importante papel em teoria da codificação. Os códigos low-density parity-check (LDPC) constituem uma famosa família de códigos definidos a partir de matrizes de verificação de paridade esparsas que apresentam desempenhos excelentes no canal com ruído aditivo Gaussiano branco (RAGB). O sucesso desses códigos se deve a sua representação através de grafos, que permite a operação de um algoritmo de decodificação iterativo cuja complexidade cresce linearmente com o comprimento dos blocos. Esta dissertação apresenta um estudo sobre códigos LDPC e sua principal ferramenta de análise, a density evolution. Para isso, a representação gráfica de códigos de bloco lineares e o funcionamento do algoritmo de decodificação Soma-Produto são apresentados. Algumas técnicas de projeto de códigos LDPC são discutidas e seu desempenho no canal RAGB é avaliado por meio de simulações. Baseando-se nestas ferramentas, a density evolution para os canal RAGB é derivada em forma integral e em forma aproximada. Por fim, uma modificação no algoritmo Soma-Produto é proposta para decodificação de códigos LDPC no canal Gilbert-Elliott

Low-density parity-check (LDPC) codes provide excellent error correction performance and can approach the channel capacity, but their performance degrades significantly in the presence of burst noise. Bursts of errors occur in many common channels, including the magnetic recording and the wireless communications channels. Strategies such as interleaving have been developed to help compensate for bursts errors. These techniques do not exploit the correlations that can exist between the noise variance on observations in and out of the bursts. These differences can be exploited in calculations of prior probabilities to improve accuracy of soft information that is sent to the LDPC decoder. Effects of using different noise variances in the calculation of prior probabilities are investigated. Using the true variance of each observation improves performance. A novel burst detector utilizing the forward/backward algorithm is developed to determine the state of each observation, allowing the correct variance to be selected for each. Comparisons between this approach and existing techniques demonstrate improved performance. The approach is generalized and potential future research is discussed.

This thesis presents a novel VLSI design of multi-code rate Low-Density Parity-Check code (LDPC) decoder for IEEE 802.16e standard. In order to support the different code rates adopted by the standard, this thesis proposes a programmable LDPC decoder architecture based on the edge-serial approach. This edge-serial architecture can perform the sequential check-node computation according to the internal sequence update commands. Any complex and irregular parity-check matrix can all be realized in the proposed architecture if the number of bit-nodes each check node connects does not exceed a certain bound. In addition to the high flexibility, this thesis also proposes several design optimization techniques suitable for the LDPC decoder. First, the designs of the LDPC decoders in the past all put more emphasis on the realization of check node function. This thesis instead applies a novel bit-node major approach which can lead to more compact design. Secondly, a fine-grain message update method is used which allows more rapid message passing such that the decoder can converge in less cycles. In addition, almost half of the message memory can be reduced. Furthermore, based on the bit-node major decoder design, the early termination scheme can be utilized to partially terminate the function of some bit nodes to reduce the decoding cycles. The other salient features also include the rescheduling of the message update order to allow the overlap of different decoding iterations in order to reduce effect of the possible message update hazard due to the long internal pipeline latency. Based on the proposed optimization methods, our experimental results show that the hardware cost can be reduced by 23.1% while the decoding cycles can be reduced by 27.4%. The proposed LDPC decoder architecture has been realized by using 0.18 µm technology with the total gate count of 316k. Our experimental shows that the proposed LDPC decoder can run up to 235 MHz and deliver the average of 116 Mbps throughput.

In this thesis, we extend applications of Low-Density Parity-Check (LDPC) codes to a combination of constituent sub-channels, which is a mixture of Gaussian channels with erasures. This model, for example, represents a common channel in magnetic recordings where thermal asperities in the system are detected and represented at the decoder as erasures. Although this channel is practically useful, we cannot find any previous work that evaluates performance of LDPC codes over this channel. We are also interested in practical issues such as designing robust LDPC codes for the mixture channel and predicting performance variations due to erasure patterns (random and burst), and finite block lengths. On time varying channels, a common error control strategy is to adapt the coding rate according to available channel state information (CSI). An effective way to realize this coding strategy is to use a single code and puncture it in a rate-compatible fashion, a so-called rate-compatible punctured code (RCPC). We are interested in the existence of good puncturing patterns for rate-changes that minimize performance loss. We show the existence of good puncturing patterns with analysis and verify the results with simulations. Universality of a channel code across a broad range of coding rates is a theoretically interesting topic. We are interested in the possibility of using the puncturing technique proposed in this thesis for designing universal LDPC codes. We also consider how to design high rate LDPC codes by puncturing low rate LDPC codes. The new design method can take advantage of longer effect block lengths, sparser parity-check matrices, and larger minimum distances of low rate LDPC codes.

A circuit design of Low Density Parity Check (LDPC) decoder for IEEE 802.16e systems is with new overlapped method is proposed in this thesis. This circuit can be operated with 19 modes which are corresponding to block sizes of 576, ¡K, 2304. LDPC decoders can be implemented by using iterations with Variable Node and Check Node Processes. The hardware utilization ratio, which can be enhanced from 50% to 100% by using our proposed overlapped method, is better than traditional overlapped method. In [2], the traditional overlapped method utilization ratio just can be enhanced from 50% to 75% for IEEE 802.16e LDPC decoder with code rate 1/2. Under the same operating frequency, our proposed method can further increase 25% when compared with traditional overlapped method [2]. In this thesis, we also propose two circuit architectures to increase the operating frequency. First, we use a faster comparison circuit in our comparison unit [1]. Second, we use Carry Save Adder¡]CSA¡^method [8] to replace the common adder unit. The circuit is carried out by TSMC CMOS 0.18£gm 1P6M process with chip area 3.11 x 3.08 mm2. In the gate level simulation, the output data rate of this circuit is above 78.4MHz, so the circuit can meet the requirement of IEEE 802.16e system.

Cooperative communication has been shown that it is an effective way to combat the outage caused by channel fading; that is, it provides the spatial diversity for communication. Except for amplify-and-forward (AF) and decode-and-forward (DF), compressed-and-forward (CF) is also an efficient forwarding strategy. In this thesis, we proposed a new CF scheme. In the existing CF protocol, the relay will switch to the DF mode when the source transmitted signal can be recovered by the relay completely; no further compression is made in this scheme. In our proposed, the relay will estimate if the codeword in a block is succeeded decoded, choose the corresponding forwarding methods with LDPC coding; those are based on joint source-channel coding or compressive sensing. At the decode side, a joint decoder with side information that performs sum-product algorithm (SPA) to decode the source message. Simulation results show that the proposed CF scheme can acquire the spatial diversity and outperform AF and DF schemes.