Yes / This paper presents an approach to implement an automatically tuning antenna for optimising power transfer suitable for software defined radio (SDR). Automatic tuning is accomplished using a closed loop impedance tuning network comprising of an impedance sensor and control unit. The sensor provides the control unit with data on the transmit or receive power, and the algorithm is used to impedance of a T-network of LC components to optimize the antenna impedance to maximise power transmission or reception. The effectiveness of the proposed tuning algorithm in relation to impedance matching and convergence on the optimum matching network goal is shown to be superior compared with the conventional tuning algorithm. / This work is partially supported by innovation programme under grant agreement H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E022936/1

No description available.

The FCC allocated the spectrum of 402-405 MHz for MICS (Medical Implant Communication Services) applications in 1999. The regulations for MICS band apply to devices that support the diagnostic and/or therapeutic functions associated with implanted medical electronics. The implanted devices aid organs and control body functions of patients to support specific treatments, and monitor patients continuously so that necessary action can be taken in advance to avoid serious conditions. To enable to use MICS applications, several requirements must be satisfied. An implanted wireless device should have a small size, consume ultra-low power, and achieve the date rate of at least 200 kbps within 2 m distance. The major challenge is to realize ultra-low power devices. Thus the low-power design of the RF circuit is crucial for MICS applications as the power consumption of the wireless devices is mostly contributed by RF circuits. This thesis investigates low-power design of an LNA and a down-conversion mixer of a receiver for MICS applications. The key idea is to stack an LNA and a mixer, while the LNA operates in the normal super-threshold region and the mixer in the sub-threshold region. In addition, a gm-boosting technique with a capacitor cross-coupled at the LNA input stage is also adopted to achieve a low noise figure (NF) and high linearity, which is critical to the overall performance of the receiver. The mixer operating in the sub-threshold region significantly reduces power dissipation and relaxes the voltage headroom without sacrificing the LNA performance. The relaxed voltage headroom enables stack of the LNA and the mixer with a low supply voltage of 1.2 V. The proposed circuit is designed in 0.18 μm RF CMOS technology. The merged LNA and mixer consumes only 1.83 mW, and achieves 21.6 dB power gain. The NF of the block is 3.55 dB at 1 MHz IF, and the IIP3 is -6.08 dBm. / Master of Science

Thesis (MScEng)--Stellenbosch University, 2011. / ENGLISH ABSTRACT: This thesis addresses the complications that are encountered when characterising the performance of differential microwave LNAs. The predominant sources of noise in electronic circuits are introduced and equivalent two-port noise models for active devices are derived. Correlation between noise generators are defined by means of the noise correlation matrix and existing network theory is adapted to include noise analysis of twoport and multi-port networks. Mixed-mode scattering parameters are introduced in order to define the signal performance of differential and common-mode propagation in multi-port networks and, by applying the same theory, the mixed-mode correlation matrix for a three-port dLNA is derived. Furthermore, an expression is derived for de-embedding the differential noise figure of a three-port dLNA using two single ended measurements. Two dLNA designs, both incorporating wideband 180°-Hybrid ring couplers, are discussed and the differential signal and noise performance of the dLNAs are compared to that of their constituent single ended LNAs. / AFRIKAANSE OPSOMMING: Hierdie tesis behandel die komplikasies wat ontwerpers in die gesig staar tydens die karakterisering van mikrogolf differensiële laeruis versterkers. Die hoof ruisbronne in stroombane word bespreek en ekwivalente tweepoortnetwerkmodelle vir aktiewe toestelle word afgelei. Korrelasie tussen ruisbronne word gedefnieer deur middel van ruiskorrelasiematrikse en bestaande tweepoort- en multipoort-netwerkteorie word aangepas om ruismodelle in te sluit. Weens die feit dat differensiële- en gemene-wyse voortplanting van seine voorkom in multipoortnetwerke word gemengde-modus S-parameters behandel. Dieselfde teorie maak dit vervolgens moontlik om die gemengde-modus ruiskorrelasiematriks van ’n drie-poort differensiële laeruis versterker af te lei. Verder word daar ’n wyse voorgestel waarmee die differensiëleruissyfer van ’n drie-poort differensiële laeruis versterker vanuit twee enkel ruissyfermetings bereken kan word. Twee differensiële laeruis versterker ontwerpe, waarvan beide wyeband 180 -differensiaalkoppelaars implementeer, word bespreek en die differensiëlesein- asook die differensiëleruis-werking word vergelyk met die werking van die omsluite ongebalanseerde laeruis versterkers.

This thesis describes a unique approach of turning on and off transistor cores to reconfigure low-noise amplifiers. A small footprint single-pole, single-throw switch is optimized for low insertion loss and high isolation. A narrowband (non-switchable) LNA is developed as a basis of comparison for reconfigurable designs. The optimized switch is incorporated into different switchable transistor core architectures. These architectures are investigated to determine their ability to reconfigure amplifier performance. One switchable transistor core topology is integrated into a cascode LNA design. An in depth stability analysis employing the S-probe technique is used to help improve the reliability of the cascode design. In addition, a single-pole, double-throw transmit/receive switch, as well as a deserializer are developed to help support the LNA block in a reconfigurable phased-array radar system. This type of flexible radar design is very beneficial in challenging electromagnetic environments.

This thesis presents an overview of the simulation, design, and measurement of state-of-the-art Silicon-Germanium Hetro-Junction Bipolar Transistor (SiGe HBT) low-noise amplifiers (LNAs). The LNA design trade-off space is presented and methods for achieving an optimized design are discussed. In Chapter 1, we review the importance of LNAs and the benefits of SiGe HBT technology in high frequency amplifier design. Chapter 2 introduces LNA design and basic noise theory. A graphical LNA design approach is presented to aid in understanding of the high-frequency LNA design process. Chapter 3 presents an LNA design optimization method for power constrained applications. Measured results using this design technique are highlighted and shown to have record performance. Lastly, in Chapter 4, we highlight cryogenic noise performance and present measured results from cryogenic operation of SiGe HBT LNAs. We demonstrate in this thesis that SiGe HBT LNAs have the capability to meet the demanding needs for next generation wireless systems. The aim of the analysis presented herein is to provide designers with the fundamentals of designing SiGe HBT LNAs through relevant design examples and measured results.

For the new generation wireless communication systems, there is an increasing demand for devices that covers more than one frequency band. This results in a need for wide-band tunable front-ends. The main objective of this study is to use dual band filters in the design of a multi-band front-end. A wide-band low noise amplifier is also required. To accomplish this project, a fixed frequency bandstop filter, a tunable dual-band filter and a wide-band LNA are designed and implemented successfully. The predefined specifications of this front-end include gain, gain flatness, spurious signal rejection, frequency tuning range, noise figure and linearity. Total power dissipation and number of elements are also taken into consideration. Test results of the manufactured front-end are compared with the results of existing single band front-ends. In order to design a good tunable wide-band filter, just tuning its center frequency will not be enough. The noise figure of this dual-band filter will be proportional to its insertion loss if it will be used as a pre-selection filter in front of a LNA. Hence its insertion loss will affect the overall noise figure of the system. If it will be used after the LNA, its linearity will be more important. When a bandpass filter is tuned over wide range of frequencies, its bandwidth varies significantly which leads to a degradation in rejection of the spurious signals. Therefore, there must be a simultaneous control of center frequency, bandwidth and insertion loss while providing enough linearity. In order to accomplish this mission, a filter that has two passbands is designed and implemented. The first passband is tunable between 136MHz and 174MHz while the second one is tunable between 380MHz and 470MHz. Also, the low noise amplifier works properly between 136MHz and 470MHz. As a result, a front-end that covers two bands is obtained.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.

Um novo circuito amplificador de 50 MHz - 1 GHz com alta linearidade para o padrão IEEE 802.22 “wireless regional area” (WRAN) é apresentado. Ele foi implementado sem nenhum indutor e oferece uma saída diferencial para ser utilizada como balun. Técnicas de cancelamento de ruído e aumento de linearidade foram usadas para melhorar a performace do amplificador de modo que eles pudessem ser otimizados separadamente. A linearidade foi melhorada utilizando transistores conectados como diodo. O amplificador foi implementado em um processo CMOS 130 nm, em uma área compacta de 136 m x 71 m. As simulações são apresentadas para esquemáticos pós-leiaute para duas classes diferentes de projeto: um visando a melhor linearidade e o outro a melhor Figura de Ruído (FR). Quando otimizado para melhor linearidade, os resultados de simulação atingem um ganho de tensão > 23.7 dB (ganho de potência > 19.1 dB), uma figura de ruído < 3.6 dB na banda inteira (com 2.4 dB min), um ponto de intersecção de terceira ordem (IIP3) > 3.3 dBm (7.6 dBm max) e um coeficiente de reflexão de entrada S11 < -16 dB. Quando otimizado para melhor figura de ruído, ele atinge um ganho de tensão > 24.7 dB (ganho de potência > 19.8 dB), uma FR < 2 dB na banda inteira, um IIP3 > -0.3 dBm e um S11 < -11 dB. Resultados de simulação Monte Carlo confirmam baixa sensibilidade à variabilidade de processo. Além disso, uma baixa sensibilidade com a temperatura na faixa de -55 até 125 C foi observada para Ganho, FR e S11. Consumo de potência é 17.6 mA sob fonte de alimentação de 1.2 V. / A new 50 MHz - 1 GHz low-noise amplifier circuit with high linearity for IEEE 802.22 wireless regional area network (WRAN) is presented. It was implemented without any inductor and offers a differential output for balun use. Noise cancelling and linearity boosting techniques were used to improve the amplifier performance in a way they can be separately optimized. Linearity was improved using diode-connected transistors. The amplifier was implemented in a 130 nm CMOS process in a compact 136 m x 71 m area. Simulations are presented for post-layout schematics for two classes of design: one for best linearity, another for best noise figure (NF). When optimized for best linearity, simulation results achieve a voltage gain > 23.7 dB (power gain > 19.1 dB), a NF < 3.6 dB over the entire band (with 2.4 dB min figure), an input third-order intercept point (IIP3) > 3.3 dBm (7.6 dBm max.) and an input power reflection coefficient S11 < -16 dB. When optimized for best NF, it achieves a voltage gain > 24.7 dB (power gain > 19.8 dB), a NF < 2 dB over the entire band, an IIP3 > -0.3 dBm and an S11 < -11 dB. Monte Carlo simulation results confirm low sensitivity to process variations. Also a low sensitivity to temperature within the range -55 to 125 C was observed for Gain, NF and S11. Power consumption is 17.6 mA under a 1.2 V supply.