This thesis presents detail theoretical analysis of downconversion Gilbert cell mixer with the improvements on major performance parameters by utilizing different substrate biasing techniques. By modifying the threshold voltage of the switching core, the LO transistors perform more ideally as a perfect switch. It improves the active mixer performances in conversion gain, noise and linearity performances. The techniques are implemented on a 1.2 V low power CMOS downconversion mixer for performance comparisons between simulation and measurements result. They are realized in TSMC 0.18 um CMOS technology. It shows that body-biasing techniques help to increase the switching efficiency of the Gilbert mixer. And a mixer with a better switching provides better performance. With no additional power consumption, the no body effect technique in Design B has shown a 1.5 dB higher in conversion gain, 2 dBm higher in IIP3, and a 0.5 dB lower in NF performance. With the varying biasing technique implemented in Design C, it shows an improvement of 22 dB in conversion gain. Both Design B and C have less than 2 mW power consumption and are suitable for Bluetooth applications. This thesis introduces a stage-by-stage procedure for designing a Gilbert mixer; design tradeoffs at each stage are also discussed. / Thesis / Master of Applied Science (MASc)

Increased efficiency and reduced emissions from gas turbine (GT) engines are of consistently growing concern for the current gas turbine community and for the political environment. GT engines commonly produce undesirable emissions such as Carbon Monoxide (CO), Carbon Dioxide (CO₂), Nitric Oxides (NO_x), and Unburned Hydrocarbons (UHC), which all pose various threats to the environment. Lean premixed combustion of hydrogen provides a potential solution to these concerns. A key component of successful lean hydrogen combustion is the fuel-air mixer. A facility and methodology for the evaluation of such a hydrogen-air mixer is developed and discussed in this thesis. The facility developed utilizes three experimental techniques: Mie scattering flow visualization, schlieren flow visualization, and Laser Doppler Velocimetry (LDV) to characterize and evaluate mixer performance. Results from the two flow visualization experiments illustrate the effectiveness of the established facility. The results from the Mie scattering experiment are post processed and overlaid on CFD predictions of mixer performance and many similarities are found. Capability of the LDV to measure two components of mean velocity is also demonstrated. / Master of Science

In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.

<p>In this Master's thesis, a direct-conversion receiver front-end has been designed in a 0.18um CMOS technology. </p><p>Direct-conversion receivers (DCR) have obvious advantages over the heterodyne counterpart. Since the intermediate frequency (IF) is zero, the problem of image is circumvented. As a result, no front-end image reject filter is required and the channel selection requires only a low-pass filter, which makes it easy to integrate directly on chip. However, the DCR also suffers from several drawbacks such as extreme sensitivity to DC offsets, 1/f noise, local oscillator (LO) leakage/radiation, front-end nonlinearity and I/Q mismatch. This implies very high demands on the DCR front-end. </p><p>The front-end comprises a low-noise amplifier (LNA) and a mixer. Different LNA and mixer architectures has been studied and from the mentioned inherited problems with direct conversion, one proposal for a solution is a differential source degenerated LNA and a differential harmonic mixer, which has been designed and simulated. </p><p>The LNA has a gain of 12dB, a noise figure of 3.6dB and provides a return loss better than -15dB. The overall noise figure of the signal path is 8dB and the overall IIP3 and IIP2 is -12dBm and 31dBm, respectively.</p>

This work focuses on the process of mixing particulate materials and the design of the screw mixer for this activity. The theoretical part describes the mixing and properties of particulate matter. Subsequently, individual devices serving for different types of mixing are analyzed. The practical part contains calculations of the main dimensions and the required power consumption. The choice of suitable drive, bearings and gear is followed. Finally, the analysis of the blade shaft load and the strength analysis of the mixer blade using Autodesk Inventor are performed. Part of this work is enclosed drawing documentation of equipment assembly and selected partial components.

This work focuses on the process of mixing particulate materials and the design of the screw mixer for this activity. The theoretical part describes the mixing and properties of particulate matter. Subsequently, individual devices serving for different types of mixing are analyzed. The practical part contains calculations of the main dimensions and the required power consumption. The choice of suitable drive, bearings and gear is followed. Finally, the analysis of the blade shaft load and the strength analysis of the mixer blade using Autodesk Inventor are performed. Part of this work is enclosed drawing documentation of equipment assembly and selected partial components.

This diploma project works out and is focused on the continual mixing process of the particular matters. The project is divided into following chapters. Chapter 1 includes mixing theory and information of the experimental work of the particular matters for blade using. In chapter 2 there is Evaluation and calculation of the technical parameters for the mixer. Chapter 3 deals with the engine proposal and chapter 4 includes calculation and design work of the gear transmission. Chapter 5 includes the stress analysis of the shaft and blade with the I-deas software. In attachment there are also the mixer arrangement drawing and detailed drawings of the key parts and groups for the mixer.

<p>Izmenama u konstrukciji vertikalne me&scaron;alice zamenom originalne obloge pužnice sa oblogama koje su imale 13,5%, 27% i 40% perforacija je pobolj&scaron;an proces me&scaron;anja. Ova pobolj&scaron;anja se ogledaju u skraćenju vremena me&scaron;anja 15%, 30% i 50% u odnosu na originalnu konstrukciju, smanjenju utro&scaron;ka rada i energije i otvaranja mogućnosti vraćanja ove vrste me&scaron;alica u masovniju upotrebu, jer su tro&scaron;kovi kupovine i održavanja ove vrste me&scaron;alica daleko niži u odnosu na druge. Izrađen je model sistem za cilindričnu me&scaron;alicu, na bazi primene teorije Markovljevog niza, kao pogodan način za predviđanje procesa me&scaron;anja u ovoj vrsti me&scaron;alica, čak i u industrijskim uslovima. Dobijeni rezultati<br />su pokazali slaganje sa eksperimentalno dobijenim rezultatima, pri čemu je utvrđeno vreme neophodno za postizanje homogenosti u cilindričnoj me&scaron;alici iznosilo 5 minuta za odnos me&scaron;anja 1:10.000, dok za odnos me&scaron;anja 1:100.000 i vreme od 5 minuta, homogenost nije postignuta Poređenjem rezultata programa za analizu slike, koji je prethodno razvijen u okviru metode Microtracer-a, sa ručno dobijenim rezultatima, utvrđen je visok stepen korelacije (R=0.995, 0.979 i 0.987) i ovaj program je ocenjen kao značajno pobolj&scaron;anje i skraćenje vremena potrebnog za dobijanje rezultata.</p> / <p>Changes in the construction of vertical mixers by replacement of the original screw barrel with barrel which had 13.5%, 27% and 40% perforation generally have improved process of mixing. These improvements are reflected in shortening the mixing time of 15%, 30% and 50% comparing to the original construction, reduction of labor and energy and create the possibility of returning these types of mixers in the more common, as the cost of purchasing and maintaining these types of mixers is far lower compared to others. A model system for the cylindrical mixer, based on the theory of Markov chain, as a convenient way to predict the mixing process in this type of mixer, even in industrial conditions. The results show agreement with experimental results, with a determined time necessary to achieve homogeneity in a cylindrical mixer was 5 minutes for mixing ratio 1:10,000, and more than 5 minutes for the mixing ratio 1:100,000. Comparing the results of program for image analysis, which was previously developed under a Microtracers methods with manually obtained results revealed a high degree of correlation (R = 0995, 0979 and 0987) and this program was rated as significantly improving and shortening the time needed to obtain results</p>

<p>In today’s world the multi-standard wireless receivers are gaining more and more popularity. End-users want to access voice, data and streaming media from a single wireless terminal. An ideal approach for multi-standard receiver front-end is to digitize a wide band RF signal available from the antenna. All radio functions such as downconversion, demodulation and channel selection can be then performed in the digital domain. Analog to Digital Converter in such a case should guarantee very high linearity, speed and bandwidth specifications while consuming a lot of power. Unfortunately an ADC with such stringent requirements cannot be realized in today’s CMOS technology. In a typical receiver a mixer is used to downconvert the RF signal to baseband (or IF) before digitization is performed. A passive mixer is often used in this case to mitigate the effect of the low frequency flicker noise. Specially it can be a sampling mixer which also serves as a S/H circuit usually required for A/D conversion. In this thesis a lowpass sigma-delta converter with RF sampling is presented. The ΣΔ modulator is SC passive circuit plus comparator, so an operational amplifier usually needed to realize the integrator is avoided. To reduce the complexity, the sampling mixer in front of the modulator is merged with the passive loop filter. As a result the sampling mixer is closed in the modulator loop, so the overall linearity of the frontend is improved to some extent. Downconversion is combined with digitization that reduces the circuit complexity as well.The challenges while digitizing high frequency RF signal are discussed in details. Switches required to realize the loop filter are very critical and tend to be nonlinear. Parasitic effects associated with MOS transistors strongly show up at GHz frequencies. Optimized transistor sizes are obtained through simulation while addressing the speed and linearity trade-off. Another major challenge is the kT/C noise that is the real bottleneck in high frequency SC circuit design. A thermal noise model for ΣΔ-modulator with second-order loop filter is presented and it is shown that a passive ΣΔ-modulator is  in fact thermal noise limited rather than quantization noise limited. It is because the capacitor values are limited by the very high sampling frequency used in this case.The downconverting lowpass ΣΔ modulator with second order SC passive loop filter and 1-bit quantizer is simulated at transistor level in 90nm CMOS process. This modulator can operate at very high sampling frequency upto 4GHz and can sample RF signal with carrier of upto 4GHz as well. The designed ΣΔ modulator is flexible and supports sub-sampling by 2 to 8 (fs = 500MHz, ... 2GHz). Besides, the presented design is very power efficient as it does not use OpAmps – which consume most of the power in the typical ΣΔ modulators. From schematic simulation on average, signal-to-noise and distortion ratio (SNDR) of 52 dB is obtained (ENOB = 8.3). SNDR results does not vary much for three different cases of baseband digitalization, RF sampling and RF sub-sampling. This SNDR value seems to be a good number for a passive sigma-delta modulator. The detailed simulation results for the three cases discussed in the thesis work shown that, the modulator performs equally well for a wide range of sampling and RF signal frequencies.</p>

In today’s world the multi-standard wireless receivers are gaining more and more popularity. End-users want to access voice, data and streaming media from a single wireless terminal. An ideal approach for multi-standard receiver front-end is to digitize a wide band RF signal available from the antenna. All radio functions such as downconversion, demodulation and channel selection can be then performed in the digital domain. Analog to Digital Converter in such a case should guarantee very high linearity, speed and bandwidth specifications while consuming a lot of power. Unfortunately an ADC with such stringent requirements cannot be realized in today’s CMOS technology. In a typical receiver a mixer is used to downconvert the RF signal to baseband (or IF) before digitization is performed. A passive mixer is often used in this case to mitigate the effect of the low frequency flicker noise. Specially it can be a sampling mixer which also serves as a S/H circuit usually required for A/D conversion. In this thesis a lowpass sigma-delta converter with RF sampling is presented. The ΣΔ modulator is SC passive circuit plus comparator, so an operational amplifier usually needed to realize the integrator is avoided. To reduce the complexity, the sampling mixer in front of the modulator is merged with the passive loop filter. As a result the sampling mixer is closed in the modulator loop, so the overall linearity of the frontend is improved to some extent. Downconversion is combined with digitization that reduces the circuit complexity as well.The challenges while digitizing high frequency RF signal are discussed in details. Switches required to realize the loop filter are very critical and tend to be nonlinear. Parasitic effects associated with MOS transistors strongly show up at GHz frequencies. Optimized transistor sizes are obtained through simulation while addressing the speed and linearity trade-off. Another major challenge is the kT/C noise that is the real bottleneck in high frequency SC circuit design. A thermal noise model for ΣΔ-modulator with second-order loop filter is presented and it is shown that a passive ΣΔ-modulator is  in fact thermal noise limited rather than quantization noise limited. It is because the capacitor values are limited by the very high sampling frequency used in this case.The downconverting lowpass ΣΔ modulator with second order SC passive loop filter and 1-bit quantizer is simulated at transistor level in 90nm CMOS process. This modulator can operate at very high sampling frequency upto 4GHz and can sample RF signal with carrier of upto 4GHz as well. The designed ΣΔ modulator is flexible and supports sub-sampling by 2 to 8 (fs = 500MHz, ... 2GHz). Besides, the presented design is very power efficient as it does not use OpAmps – which consume most of the power in the typical ΣΔ modulators. From schematic simulation on average, signal-to-noise and distortion ratio (SNDR) of 52 dB is obtained (ENOB = 8.3). SNDR results does not vary much for three different cases of baseband digitalization, RF sampling and RF sub-sampling. This SNDR value seems to be a good number for a passive sigma-delta modulator. The detailed simulation results for the three cases discussed in the thesis work shown that, the modulator performs equally well for a wide range of sampling and RF signal frequencies.