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Machine learning has achieved great success in recent years, especially the deep learning algorithms based on Artificial Neural Network. However, high performance and large memories are needed for these models , which makes them not suitable for IoT device, as IoT devices have limited performance and should be low cost and less energy-consuming. Therefore, it is necessary to optimize the deep learning models to accommodate the resource-constrained IoT devices. This thesis is to seek for a possible solution of optimizing the ANN models to fit into the IoT devices and provide a hardware implementation of the ANN accelerator on FPGA. The contribution of this thesis mainly lies in two aspects: 1). analyze the sparsity in the two mainstream deep learning models – DBN and CNN. The DBN model consists of two hidden layers with Restricted Boltzmann Machines while the CNN model consists of 2 convolutional layers and 2 sub-sampling layer. Experiments have been done on the MNIST data set with the sparsity of 75%. The ratio of the multiplications resulting in near-zero values has been tested. 2). FPGA implementation of an ANN accelerator. This thesis designed a hardware accelerator for the inference process in ANN models on FPGA (Stratix IV: EP4SGX530KH40C2). The main part of hardware design is the processing array consists of 256 Multiply-Accumulators array, which can conduct multiply-accumulate operations of 256 synaptic connections simultaneously. 16-bit fixed point computation is used to reduce the hardware complexity, thus saving power and area. Based on the evaluation results, it is found that the ratio of the multiplications under the threshold of 2-5 is 75% for CNN with ReLU activation function, and is 83% for DBN with sigmoid activation function, respectively. Therefore, there still exists large space for complex ANN models to be optimized if the sparsity of data is fully utilized. Meanwhile, the implemented hardware accelerator is verified to provide correct results through 16-bit fixed point computation, which can be used as a hardware testing platform for evaluating the ANN models.

The field of deep learning has seen increasing breakthroughs and commercial adoption in recent years for enabling a wide range of applications including image and speech recognition, multimedia generation, information summarization, and human-like chatbots. This has led to a growing need for hardware that can quickly and efficiently perform deep learning inference, which increasingly requires massive amounts of computational power. To address this need, recent years have seen many works for optimizing deep learning inference in hardware. Systolic arrays are an efficient class of hardware designs to use as a starting point for this application. However, after hardware-oriented deep learning model optimizations reach their limits, after the known parallelism for executing their compute patterns in hardware is exhausted, and after technology scaling slows to a halt, there is an accelerator wall that limits further improvement on the implementation side. In this thesis, we contribute to this field through an under-explored direction by presenting new efficient matrix multiplication algorithms and/or their systolic-array hardware architectures that increase performance-per-area by reducing the workload at the algebraic level, and thus by computing the same result from a re-arranged compute pattern requiring fewer or cheaper operations to be performed in hardware. We evaluate our architectures in an end-to-end deep learning accelerator, demonstrating their ability to increase the performance-per-area of hardware accelerators beyond their normal theoretical limits. / Thesis / Doctor of Philosophy (PhD)

Nowadays, we use embedded electronic devices in almost every aspect of our daily lives. They represent our electronic identity; they store private information; they monitor health status; they do confidential communications, and so on. All these applications rely on cryptography and, therefore, present us a research objective: how to implement cryptography on embedded systems in a trustworthy and efficient manner. Implementing embedded cryptography faces two challenges - constrained resources and physical attacks. Due to low cost constraints and power budget constraints, embedded devices are not able to use high-end processors. They cannot run at extremely high frequencies either. Since most embedded devices are portable and deployed in the field, attackers are able to get physical access and to mount attacks as they want. For example, the power dissipation, electromagnetic radiation, and execution time of embedded cryptography enable Side-Channel Attacks (SCAs), which can break cryptographic implementations in a very short time with a quite low cost. In this dissertation, we propose solutions to efficient implementation of SCA-resistant and high-performance cryptographic software on embedded systems. These solutions make use of two state-of-the-art architectures of embedded processors: instruction set extensions and multi-core architectures. We show that, with proper processor micro-architecture design and suitable software programming, we are able to deliver SCA-resistant software which performs well in security, performance, and cost. In comparison, related solutions have either high hardware cost or poor performance or low attack resistance. Therefore, our solutions are more practical and see a promising future in commercial products. Another contribution of our research is the proper partitioning of the Montgomery multiplication over multi-core processors. Our solution is scalable over multiple cores, achieving almost linear speedup with a high tolerance to inter-core communication delays. We expect our contributions to serve as solid building blocks that support secure and high-performance embedded systems. / Ph. D.

Elliptic curve cryptography (ECC) is becoming the algorithm of choice for digital signature generation and authentication in embedded context. However, performance of ECC and the underlying modular arithmetic on embedded processors remains a concern. At the same time, more complex system-on-chip platforms with multiple heterogeneous cores are commonly available in mobile phones and other embedded devices. In this work we investigate the design space for ECC on TI's OMAP 3530 platform, with a focus of utilizing the on-chip DSP core to improve the performance and efficiency of ECC point multiplication on the target platform. We examine multiple aspects of ECC and heterogeneous design such as algorithm-level choices for elliptic curve operations and the effect of interprocessor communication overhead on the design partitioning. We observe how the limitations of the platform constrict the design space of ECC. However, by closely studying the platform and efficiently partitioning the design between the general purpose ARM core and the DSP, we demonstrate a significant speed-up of the resulting ECC implementation. Our system focused approach allows us to accurately measure the performance and power profiles of the resulting implementation. We conclude that heterogeneous multiprocessor design can significantly improve the performance and power consumption of ECC operations, but that the integration cost and the overhead of interprocessor communication cannot be ignored in any actual system. / Master of Science

Thèse ou mémoire avec insertion d'articles / Dans les forêts de feuillus nordiques, les traitements sylvicoles visant à régénérer l'érable à sucre (Acer saccharum Marsh.) et le bouleau jaune (Betula alleghaniensis Britt.), tels que le scarifiage du sol et le contrôle mécanique de la végétation compétitrice, résultent parfois en la formation d'une dense strate de hêtre à grandes feuilles (Fagus grandifolia Ehrh.). L'objectif de ce mémoire était de comparer la croissance et la survie de trois types de régénération de hêtre, soit les rejets de souche, les drageons racinaires et les semis, à celles de semis de bouleau jaune et d'érable à sucre dans des peuplements feuillus traités par coupe partielle et sous une contrainte de broutement par le cerf de Virginie. Sur une période de huit ans, 997 individus des trois espèces ont été suivis dans trois peuplements composés principalement d'érable à sucre, de bouleau jaune et de hêtre dans un dispositif expérimental situé à la station forestière de Duchesnay, près de Québec. Chaque peuplement comprenait quatre traitements de coupes partielles, de même qu'un témoin, ce qui a permis d'étudier un gradient de conditions de lumière et de compétition. Les rejets de souche et les drageons de hêtre ont montré une croissance plus élevée que les semis des trois espèces, alors que tous les types de hêtre ont montré des probabilités de survie plus importantes que les autres espèces, quelles que soient les conditions de lumière ou de compétition. Nos résultats indiquent que les traitements stimulant l'établissement de rejets de souche et de drageons de hêtre doivent être appliqués avec prudence et dans des conditions qui garantissent une croissance et des taux de survie suffisants des espèces désirées. Cette étude suggère également que le broutement sélectif par le cerf de Virginie est un facteur important pouvant exacerber le phénomène d'envahissement par le hêtre en supprimant la capacité de croitre en hauteur du bouleau jaune. / In northern hardwood forests, silvicultural treatments aimed at regenerating sugar maple (Acer saccharum Marsh.) and yellow birch (Betula alleghaniensis Britt.), such as soil scarification and mechanical control of competing vegetation, often result in the formation of dense American beech (Fagus grandifolia Ehrh.) thickets in the seedling and sapling layers. The aim of this Master's thesis was to compare the growth and survival of three types of beech regeneration, i.e. stump sprouts, root suckers and seedlings, with those of yellow birch and sugar maple seedlings in partially harvested stands under cervid browsing pressure. Over an eight-year period, 997 individuals of the three species were monitored in three stands composed mainly of sugar maple, yellow birch, and American beech in an experimental field trial in the Duchesnay Forest, located near Quebec City, Canada. Each stand included four partial harvest treatments of different intensities, as well as a control, providing a gradient of light and competition conditions. American beech stump sprouts and root suckers showed higher growth than seedlings of all three species, and all types of American beech regeneration showed higher survival probabilities than the other species, regardless of light or competition conditions. Our results suggest that treatments that induce the establishment of American beech stump sprouts and root suckers, like high intensity partial cut combined with soil scarification and mechanical control, should be applied with caution and under conditions that ensure sufficient growth and survival rates of the desired species. This thesis also suggests that selective browsing by cervids is an important factor that can exacerbate the phenomenon of dense beech thickets formation in the seedling and sapling layers by suppressing the yellow birch's ability to grow in height.

Le potentiel de multiplication de l'if du Canada par bouturage a été étudié à trois périodes de l'année (différentes conditions). Des extrémités de tiges constituées de la pousse de la dernière, des deux dernières et des trois dernières années de croissance (1, 2 ou 3 ans), provenant de tiges principales ou de ramifications sous-jacentes, ont été trempées dans une solution d'éthanol 50 % ou de 4 000 ppm d' AIB dilué dans l'éthanol 50 % et piquées dans un substrat composé de pedite et de tourbe de sphaigne dans une proportion de 3/2 (v/v). Dans une autre expérience, la base des boutures latérales de deux ans a été trempée dans diverses doses et combinaisons d'acide indolylbutyrique (Am) ou d'acide naphtalène acétique (ANA). Dans une dernière expérience, des boutures d'extrémité de tiges principales de deux ans ont été insérées dans des substrats d'enracinement composés de diverses proportions de perlite, de tourbe de sphaigne et de charbon activé. Tous ces traitements ont eu très peu d'effet sur le taux d'enracinement . des boutures, ces dernières s'enracinant pratiquement à tout moment de l'année dans une proportion de plus de 75 %. En revanche, la qualité de l'enracinement a été influencée par la plupart des facteurs étudiés.