The objective of this research is to develop an embedded, wireless, energy-harvesting prototype (E-WEHP) that can power on and sustain embedded sensing functions using the power present in ambient wireless signals in urban areas. This research is part of a bigger effort towards greening RF circuits and applications in order to reduce their pollution foot-print. Pollution due to modern electronics is primarily caused by non-biodegradable packaging waste and batteries that form a big part of most electronics. Electronic waste can especially be a nuisance in RFID and wireless sensors that are mass-produced and widely-used in consumer items, buildings, industries, agriculture and transportation. The first part of this research effort addresses the issue of minimizing electronic packaging waste by characterizing and using biodegradable substrates such as Paper and Perfluoropolymer (PFA) as a dielectric material in RF circuits. Towards this goal, the first of its kind active wireless sensor modules made of biodegradable paper substrate using a clean and novel inkjet-printing technology is developed and successfully operated in the 900 MHz free ISM band. The second and third part of this research effort addresses the issue of battery waste by investigating the use of ambient solar and wireless radiation for powering RF and embedded electronics for wireless localization and sensing applications without the use of batteries. The second part of this work presents a unique solar-powered tag called SOLTAG that combines solar cells along with an RFID-type powering mechanism to implement a very low-cost, battery-less, semi-passive wireless-tag but with a much longer range than passive EPC-Gen2 RFID tags. A GPS-like, low-cost, vehicle-tracking system based on a received-signal-strength-indication method using SOLTAGs in vehicles and a wireless network of Mica-motes is successfully developed and tested with accuracy down to 1.62 meters The third and main part of this research work presents a novel embedded-wireless-energy-harvesting-prototype (E-WEHP) that can successfully power-on and sustain sensing and M2M peripherals in a 16-bit microcontroller using the power present in ambient, wireless, Digital-TV signals without the use of batteries. This work involves an in-depth characterization of OFDM signals used in Digital-TV broadcasts in Tokyo and Atlanta along with the design and development of the E-WEHP hardware and firmware that exploits the multi-carrier nature of such TV signals for powering itself at a range of over 6 km from the TV broadcast sources. This work opens up the possibility of pervasively powering sensor motes for applications such as environmental sensing, smart homes, structural health monitoring, security and internet of things without the environmental and logistical cost of periodic battery replacement and disposal.

Įrenginys skirtas dviračio padangos standumo ir slopinimo charakteristikų tyrimams ir jos efektinio kelio profilio aukščio tyrimams. Šiems tyrimams reikalingas vienas akselerometras tvirtinamas ant rato ašies. Taip pat numatyta galimybė padidinti akselerometrų skaičių, kitų dviračio mazgų tyrimams. / Bicycle wheel dynamic recording device microcontroller PIC18F46J50 basis, who accepts information from four analogous ADXL326 and four digital ADXL345 accelerometers and this information transmits through USB link to a personal computer. Software of the personal computer accepts the sending information, processes it and saves to a text file for future processing. Received information is translated and is written on a wheel suppressor vibration characteristics. This device is dedicated to save experimental information, which are used to model a bicycle movement dynamics, when it is riding rough supporting surface.

This thesis investigates using processor-in-loop techniques with non-real-time electro-magnetic transient simulation software for designing microcontroller-based systems. The behaviour of a microcontroller is included in the simulation by directly integrating the target microcontroller into an EMTP co-simulation. Additionally, to assist the design process, the optimization functionality of the EMTP program is extended to the microcontroller algorithm. Since non-realtime simulation does not require specialized test hardware to accurately simulate systems, it is both cheaper and able to be used earlier in the controller design process then hardware-in-loop real-time simulation. A component is created in the PSCAD / EMTDC program to integrate a generic controller running an arbitrary periodic algorithm into an EMTP simulation. The component operation is verified by creating a co-simulation of a three-phase induction motor V / f. speed control. The co-simulation results match the behaviour of the resulting system under a fairly broad range of operating conditions, highlighting the applicability of the technique.

In this thesis, the automation of the long term and cyclic processes by using a programmable control unit is aimed. To achieve this goal, timing relays and various microcontrollers are investigated. PIC microcontroller is chosen to implement the control unit due to its advantages like high speed, Harvard and RISC architecture, low cost and flexibility for programming. Theory of the PIC microcontrollers is studied and a controller unit to be used in the mentioned processes is designed. Some features are added to the device to widen the application fields and consequently a multi-purpose programmable controller is realized. In the device, Microchip PIC16F877 is used as the microcontroller. The code of the controller is written in Assembly Language and is compiled with MPASM. This controller counts the signals coming from internal Timer 555 or external signals and activates ten different outputs in order. The operating times of the outputs can be changed by a keypad and shown in a display. By keeping the number of the used ports of the microcontroller, as few as possible, room for the future improvements and additions is provided.

In this thesis, an 8-bit microcontroller, 8051 core, is implemented using SystemC programming language. SystemC is a new generation co-design language which is capable of both programming software and describing hardware parts of a complete system. The benefit of this design environment appears while developing a System-on-Chip (SoC), that is a system consisting both custom hardware parts and embedded software parts. SystemC is not a completely new language, but based on C++ with some additional class libraries and extensions to handle hardware related concepts such as signals, multi-valued logic, clock and delay elements. 8051 is an 8 bit microcontroller which is widely used in industry for many years. The 8051 core is still being used as the main controller in today&rsquo / s highly complex chips, such as communication and bus controllers. During the development cycles of a System-on-Chip, instead of using separate design environments for hardware and software parts, the usage of a unified co-design environment provides a better design and simulation methodology which also decreases the number of iterations at hardware software integration. In this work, an 8-bit 8051 microcontroller core and external memory modules are developed using SystemC that can be re-used in future designs to achieve more complex System-on-Chip&rsquo / s. During the development of the 8051 core, simulation results are analyzed at each step to verify the design from the very beginning of the work, which makes the design processes more structured and controlled and faster as a result.

The aim of this thesis study is to develop a simulator for an 8-bit microcontroller and the written document of this thesis study analyses the process of devoloping a software for simulating an 8 bit microcontroller, MC68HC11. In this simulator study a file processing including the parsing of the assembler code and the compilation of the parsed instructions is studied. Also all the instruction execution process containing the cycle and instruction execution and the interrupt routine execution is observed through a graphical user interface. Through this graphical user interface all the registries, address bus and data bus updates can also be observed. C++ programming language is used to implement the application. Object oriented programing techniques are used to provide easy of implementation and template usages.

This thesis explains the design of a microcontroller-based device, which provides an efficient and practical alternative for the remote reading of digital electricity meters over Public Switch Telephone Network (PSTN). As an alternative application, a system is constructed providing file transfer capability to the PC connected to the port of implemented device in addition to remote reading of digital electricity meters. This thesis also provides detailed explanations about the basics of serial asynchronous communication over modem for PICs (peripheral interface controllers) together with description of each component included by the constructed system, which can be used in energy metering sector commonly.

In this thesis a microcontroller core is developed in an FPGA. Its instruction set is compatible with the microcontroller PIC16XX series by Microchip Technology. The microcontroller employs a RISC architecture with separate busses for instructions and data. Our goal in this research is to implement and evaluate the design in the FPGA. Increasing performance and gate capacity of recent FPGA devices permits complex logic systems to be implemented on a single programmable device. Such a growing complexity demands design approaches, which can lead to designs containing millions of logic gates, memories, high-speed interfaces, and other high-performance components. In recent years, the continuous development in the area of highly integrated circuits has lead to a change in the design methods used, making it possible to economically utilize FPGAs in many designs. A test demo board from the Digilent Inc is used to fit our testing requirements of the RISC microcontroller. The test demo board also had the capability of communicating with a personal computer (PC) so that we can load the program from PC. Based on the modern design methods the microcontroller core is developed using the Verilog hardware description language. Xilinx ISE Foundation 6.3i software is used for its synthesis and implementation. An embedded test program code using MPLAB is also developed, and then loaded into the designed microcontroller residing in the FPGA. In order to perform a functional test of the microcontroller core a special test program downloader application is designed by using Borland C++ Builder. First, the specification from the PIC16XX datasheet is transferred into an abstract behavioral description. Based on that, the next step is to develop a description of the microcontroller core with some minor modifications which can be synthesizable into a FPGA. Finally, the resulting gate level netlist is evaluated and tested using a demo board.

Thesis (MScEng)--Stellenbosch University, 2002. / ENGLISH ABSTRACT: This report describes the development of a Java Bytecode Compiler (JBC) for the 8051 micro-controller. Bytecodes are found in the class file generated when a Java source file is compiled with the java compiler (javac). On Java platforms, the Java Virtual Machine (JVM) interprets and executes the bytecodes. Currently existing Java platforms do not support programming the 8051 using Java. As an 8-bit micro-controller with only 64 KB of total memory, the 8051's word size and memory is too limited to implement a NM. Moreover, full applications of the 8051 require that it handles hardware interrupts and access 110 ports and special registers. This thesis proposes a JBC to compile the standard bytecodes found in the class file and generate equivalent assembly code that can run on the 8051. The JBC was tested on the 8051 compatible AT89C52*44 micro-controller with a program that simulates an irrigation controller. The code generated by the JBC executes correctly but is large in size and runs slower than code of a program written in assembly. Conclusions drawn are that the JBC can be used to compile Java programs intended for the 8051 and its family of micro-controllers. In particular, it is especially a good tool for people who prefer Java to other languages. The JBC is suitable for smaller programs that do not have efficiency as a major requirement. / AFRIKAANSE OPSOMMING: Hierdie tesis beskryf die ontwikkeling van 'n Java "Bytecode" samesteller (Java Bytecode Compiler, JBC) vir die 8051 mikro beheerder argitektuur. "Bytecodes" is die produk van die standaard Java samesteller "javac" en word deur 'n platform spesifieke Java Virtuele Masjien gelees en uitgevoer. Geen NM is huidig beskikbaar vir die 8051 argitektuur nie. Die gekose 8-bis 8051 mikro beheerder het 'n beperkte interne geheue van 64kB. Hierdie beperking maak dit nie geskik vir 'n IVM nie. Daar moet ook voorsiening gemaak word om hardeware onderbrekings te hantering en te kan kommunikeer met die poorte en spesiale registers van die mikro beheerder. JBC word ontwikkel wat die standaard "Bytecode" kompileer na geskikte masjien kode wat dan op die mikro beheerder gebruik kan word. Die JBC is ontwikkel en toets en 'n eenvoudige besproeiing program is geskryf om op 'n Atmel AT89C52*44 te loop. Die kode werk goed maar is nog nie geoptimeer nie en loop onnodig stadig. Optimerings metodes word aanbeveel en bespreek. Die gevolgtrekking is dat die huidige JBC kan gebruik word om Java kode te skryfvir die 8051 beheerder. Dit maak die hardeware platform nou beskikbaar aan Java programmeerders. Daar moet wel gelet word dat die JBC op die oomblik net geskik is vir klein programme en waar spoed nie die primêre vereiste is nie.

abstract: There is a tremendous need for wireless biological signals acquisition for the microelectrode-based neural interface to reduce the mechanical impacts introduced by wire-interconnects system. Long wire connections impede the ability to continuously record the neural signal for chronic application from the rodent's brain. Furthermore, connecting and/or disconnecting Omnetics interconnects often introduces mechanical stress which causes blood vessel to rupture and leads to trauma to the brain tissue. Following the initial implantation trauma, glial tissue formation around the microelectrode and may possibly lead to the microelectrode signal degradation. The aim of this project is to design, develop, and test a compact and power efficient integrated system (IS) that is able to (a) wirelessly transmit triggering signal from the computer to the signal generator which supplies voltage waveforms that move the MEMS microelectrodes, (b) wirelessly transmit neural data from the brain to the external computer, and (c) provide an electrical interface for a closed loop control to continuously move the microelectrode till a proper quality of neural signal is achieved. One of the main challenges of this project is the limited data transmission rate of the commercially available wireless system to transmit 400 kbps of digitized neural signals/electrode, which include spikes, local field potential (LFP), and noise. A commercially available Bluetooth module is only capable to transmit at a total of 115 kbps data transfer rate. The approach to this challenge is to digitize the analog neural signal with a lower accuracy ADC to lower the data rate, so that is reasonable to wirelessly transfer neural data of one channel. In addition, due to the limited space and weight bearing capability to the rodent's head, a compact and power efficient integrated system is needed to reduce the packaged volume and power consumption. 3D SoP technology has been used to stack the PCBs in a 3D form-factor, proper routing designs and techniques are implemented to reduce the electrical routing resistances and the parasitic RC delay. It is expected that this 3D design will reduce the power consumption significantly in comparison to the 2D one. The progress of this project is divided into three different phases, which can be outlined as follow: a) Design, develop, and test Bluetooth wireless system to transmit the triggering signal from the computer to the signal generator. The system is designed for three moveable microelectrodes. b) Design, develop, and test Bluetooth wireless system to wirelessly transmit an amplified (200 gain) neural signal from one single electrode to an external computer. c) Design, develop, and test a closed loop control system that continuously moves a microelectrode in searching of an acceptable quality of neural spikes. The outcome of this project can be used not only for the need of neural application but also for a wider and general applications that requires customized signal generations and wireless data transmission. / Dissertation/Thesis / M.S. Electrical Engineering 2012