No description available.

With the deployment of sensors in hardware equipment and advanced metering infrastructure, system operators have access to unprecedented amounts of data. Simultaneously, grid-connected power electronics technology has had a large impact on the way electrical energy is generated, transmitted, and delivered to consumers. Artificial intelligence and machine learning can help address the new power grid challenges with enhanced computational abilities and access to large amounts of data. This thesis discusses the fundamentals of neural networks and their applications in power systems such as load forecasting, power system stability analysis, and fault diagnosis. It extends application of neural networks to inverter-based resources by studying the implementation and performance of a neural network controller emulator for voltage-sourced converters. It delves into how neural networks could enhance cybersecurity of a component through multiple hardware and software implementations of the same component. This ensures that vulnerabilities inherent in one form of implementation do not affect the system as a whole. The thesis also proposes a comprehensive support vector classifier (SVC)--based submodule open-circuit fault detection and localization method for modular multilevel converters. This method eliminates the need for extra hardware. Its efficacy is discussed through simulation studies in PSCAD/EMTDC software. To ensure efficient usage of neural networks in power system simulation softwares, this thesis entails the step by step implementation of a neural network custom component in PSCAD/EMTDC. The custom component simplifies the process of recreating a neural network in PSCAD/EMTDC by eliminating the manual assembly of predefined library components such as summers, multipliers, comparators, and other miscellaneous blocks. / Master of Science / Data analytics and machine learning play an important role in the power grids of today, which are continuously evolving with the integration of renewable energy resources. It is expected that by 2030 most of the electric power generated will be processed by some form of power electronics, e.g., inverters, from the point of its generation. Machine learning has been applied to various fields of power systems such as load forecasting, stability analysis, and fault diagnosis. This work extends machine learning applications to inverter-based resources by using artificial neural networks to perform controller emulation for an inverter, provide cybersecurity through heterogeneity, and perform submodule fault detection in modular multilevel converters. The thesis also discusses the step by step implementation of a neural network custom component in PSCAD/EMTDC software. This custom component simplifies the process of creating a neural network in PSCAD/EMTDC by eliminating the manual assembly of predefined library components.

This thesis presents the real-time simulation of a realistic-size Modular Multilevel Converter (MMC) based High-Voltage Direct Current (HVDC) transmission system. Based on the concept of time-varying Thevenin equivalent, a computationally efficient model of the MMC is developed and deployed on an FPGA platform. The salient features of the developed MMC model are: (i) The decoupling of the solutions of the MMC model and the of the rest of the system, (ii) it provides an equivalent representation of the full MMC, (iii) it is suitable for parallel implementation. The model is used as part of the simulation of the 401-level France/Spain MMC-HVDC link between, in which 2 separate MMCs are included, showing the expandability of the designed system to larger DC grid scenarios. Hardware in the loop (HIL) testing capabilities of the system are also demonstrated with the addition of an external controller to the simulation system.

This thesis presents the real-time simulation of a realistic-size Modular Multilevel Converter (MMC) based High-Voltage Direct Current (HVDC) transmission system. Based on the concept of time-varying Thevenin equivalent, a computationally efficient model of the MMC is developed and deployed on an FPGA platform. The salient features of the developed MMC model are: (i) The decoupling of the solutions of the MMC model and the of the rest of the system, (ii) it provides an equivalent representation of the full MMC, (iii) it is suitable for parallel implementation. The model is used as part of the simulation of the 401-level France/Spain MMC-HVDC link between, in which 2 separate MMCs are included, showing the expandability of the designed system to larger DC grid scenarios. Hardware in the loop (HIL) testing capabilities of the system are also demonstrated with the addition of an external controller to the simulation system.

The recent introduction of a new converter topology, the modular multilevel converter (MMC) is a major step forward in voltage sourced converter (VSC) technology for high voltage, high power applications. To obtain a multilevel ac output waveform, a large number of semiconductor switches has to be used in the converter. The number of switches in the MMC for HVDC transmission is typically two orders of magnitudes larger than that in a two or three level VSC used in earlier generation. This large device count creates a computational challenge for electromagnetic transients (EMT) simulation programs, as it significantly increases the simulation time. The purpose of this research is to investigate whether the simulation can be speeded up. This research develops an efficient, time-varying Thévenin's equivalent model for the MMC converter based on partitioning the system’s admittance matrix. EMT simulation results show that the proposed equivalent model can drastically reduce the computational time without loss of accuracy. The use of the proposed equivalent method is demonstrated by simulating a point to point MMC based HVDC transmission system successfully with more than 100 levels. This approach enables what was hitherto not practical; the modeling of large MMC based HVDC systems on personal computers. With the assumption of ideal switch operation and using an equivalent average capacitor value based approach, an average valued model of MMC is also proposed in this thesis. The average model can be accurately used in most of the system level studies. The control algorithms and other modeling aspects of MMC applications are also presented in this thesis. One of the advantages of multilevel converters is the low operating losses as the smaller switching frequency of each individual power electronics switch and the low voltage step change during each switching. Using a recently developed, time domain simulation approach, the operating losses of the MMC converter are estimated in this thesis. When comparing the MMC operating losses against the losses of two-level VSC, the power loss for the two-level VSC is found to be significantly higher than the power loss of the MMC.

Over the past two decades, power consumption has increased exponentially worldwide, posing new challenges to power grids to meet the load requirements. With this growing power demand, the need for efficient high-density medium-voltage (MV) power converters has increased to support flexible power distribution grids. The modular multilevel converters (MMC) became the most typical MV power converters in applications from 2010. This topology has many advantages, such as voltage scalability, excellent output performance, and low voltage ratings for switching devices. However, without the excellent reliability of the MMC, applications cannot reap these benefits. The MMC topology comprises several series-connected submodules (typically a half-bridge or a full-bridge inverter). As a result of increased switching devices, the converter becomes vulnerable since a single device fault can disrupt the whole converter operation. Therefore, fault-tolerant strategies to replace faulty SM with a redundant SM are developed using additional bypass switches. Conventionally TRIACs and vacuum switches are employed as bypass switches that operate in the range of 2-10 microseconds. Despite having performance advantages, MMCs are still not fully employed in aerospace and naval industries due to their enormous size. Many Power Electronics Building Blocks (PEBB) are proposed, with size optimization, as submodules for modular converters. The PEBB1000, a 1000 V- PEBB proposed by Dr. Jun Wang, achieved a significant size reduction of 80% with a novel switching cycle control (SCC) scheme. This novel control scheme requires high switching frequency and high di/dt-currents for MMC operation. Due to di/dt-rate limitations, TRIAC-based switch cannot perform bypass operation. Therefore, research work has been conducted on bypass switches for PEBB1000 using wide-bandgap SiC devices. This thesis presents the design of a SiC MOSFET-based bypass switch for PEBB1000 in MMC application. A detailed fault case analysis is presented to show the feasibility of the bypass operation for 90% PEBB-level faults. Significant variations in PEBB1000 bypass requirements are observed through SCC-based MMC simulations. Accordingly, a 1700 V, 100 A bypass switch has been designed using the anti-series topology of MOSFETs. Various specifications, such as 142 nanoseconds operation time, 500 nanoseconds bypass commutation time, and 277A transient current conduction capability, are validated through practical tests. Results prove that SiC-MOSFETs work better than TRIACs in high di/dt-current conduction and operation times. For future work, false-triggering endurance has to be analyzed for 1000 V switching voltage. / Master of Science / When a building is on fire, the safety of people inside depends on the timely arrival of the fire rescue departments. Similarly, for an electrical fault, the safety of electrical systems depends on fast and secure fault protection devices. This thesis presents work on one such fault-protection device used in the power distribution grid: solid-state bypass switch. Distribution grids supply power majorly to households and industries at the city or state level. They employ medium-voltage (MV) converters to step down the voltages to meet the distribution requirements. In MV converters, several low-voltage modules are connected in series to achieve the high-voltage power conversion. When a fault occurs at one of the low-voltage modules in MV converters, power flow gets disrupted due to a series connection like a chain. Therefore, bypass switches are connected in parallel to low-voltage modules for an alternate power flow path. Conventionally used bypass switches have 2-10 microseconds operation time. Recent advancements in semiconductor devices, SiC MOSFETs, allow operation times less than one microsecond. Therefore, research work has been conducted on bypass switches using SiC MOSFETs. Finally, the SiC-MOSFET based bypass switch is built and tested according to converter requirements. Results proved that the designed switch operates in 142 nanoseconds, ten times faster than a conventional switch.

The modular multi-level converter (MMC) is the most prominent interface converter used between the HVDC grid and the HVAC grid. One of the important design challenges in MMC is to reduce the capacitor size. In the current practice, a rather large capacitor bank is required to store line-frequency related circulating energy, even though a number of control strategies have been introduced to reduce the capacitor voltage ripples. In the present paper, a novel control strategy is proposed by means of harmonic injections in conjunction with gain control to completely eliminate both the line frequency and the second-order harmonic of the capacitor voltage ripple. Ideally, the proposed method works with the full bridge topology. However, the concept also works with half bridge topology with a significant reduction of line frequency related ripple. To gain a better understanding of the nature of circulating energy and the means of reducing it, the method of state plane analysis is employed to offer visual support. In addition, the design trade-off between full bridge MMC and half bridge MMC is presented and a novel control strategy for a hybrid MMC is proposed. Finally, the work is supported with a scaled down hardware demonstration. / Master of Science / The modular multi-level converter (MMC) is the most prominent interface converter used between the HVDC grid and the HVAC grid. One of the important design challenges in MMC is to reduce the capacitor size. In the current practice, a rather large capacitor bank is required by the commonly used control strategy. The large capacitor bank increases the cost and the space of the MMC system. In the present paper, a novel control strategy is proposed to significantly reduce the capacitor bank in the system. Ideally, the proposed method works with the full bridge topology. However, the concept also works with half bridge topology with a significant reduction of capacitor bank. To gain a better understanding of the nature of the operating principles of capacitors, the method of state plane analysis is employed to offer visual support. In addition, the design trade-off between full bridge MMC and half bridge MMC is presented and a novel control strategy for a hybrid MMC is proposed. Finally, the work is supported with a scaled down hardware demonstration.

Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need for electric power by the loads. The Medium-Voltage DC (MVDC) concept can be an optimal solution. On the other hand, the Modular Multilevel Converter (MMC) is an attractive converter topology choice, as it has advantages such as excellent harmonic performance, distributed energy storage, and near ideal current and voltage scalability. The fault response, on the other hand, is a big challenge for the MVDC distribution systems and the traditional MMCs with the Half-Bridge submodule configuration, especially when a DC short circuit fault happens. In this study, the fault current behavior is analyzed. An alternative submodule topology and a fault operation control are explored to achieve the fault current limiting capability of the converter. A three-phase SiC-based MMC prototype with the Full-Bridge configuration is designed and built. The SiC devices can be readily adopted to take advantage of the wide-bandgap devices in MVDC applications. The Full-Bridge configuration provides additional control and energy storage capabilities. The full in-depth design, controls, and testing of the MMC prototype are presented, including among others: component selection, control algorithms, control hardware implementation, pre-charge and discharge circuits, and protection scheme. Systematical tests are conducted to verify the function of the converter. The fault current behavior and the performance of the proposed control are verified by both simulation and experiment. Fast fault current clearing and fault ride-through capability are achieved. / Master of Science / Recent research into industrial applications of electric power conversion shows an increase in the use of renewable energy sources and an increase in the need for electric power by the loads. The Medium-Voltage DC (MVDC) concept can be an optimal solution. On the other hand, the Modular Multilevel Converter (MMC) is an attractive converter topology choice. The fault response, on the other hand, is a big challenge for the MVDC distribution systems and the traditional MMCs, especially when a DC short circuit fault happens. In this study, the fault current behavior is analyzed. An alternative submodule topology and a fault operation control are explored to achieve the fault current limiting capability of the converter. A three-phase SiC-based MMC prototype with the Full-Bridge configuration is designed and built. The full in-depth design, controls, and testing of the MMC prototype are presented. Systematical tests are conducted to verify the function of the converter. The fault current behavior and the performance of the proposed control are verified by both simulation and experiment. Fast fault current clearing and fault ride-through capability are achieved.

La topologie modulaire multiniveaux est une structure d'électronique de puissance construite par la mise en série de sous-modules identiques, composés chacun d'une cellule de commutation et d'un condensateur. Un tel système de conversion pouvant comporter un grand nombre de cellules permet d'augmenter le rendement global et la qualité des signaux en sortie. De plus, il permet d'utiliser des composants basse tension présentant un meilleur comportement dynamique et un rapport qualité-prix bien supérieur aux composants moyenne tension. Il permet également, par rapport aux structures conventionnelles, une grande souplesse pour la conception et la fabrication du fait de son aspect modulaire, tout en s'affranchissant d'un transformateur volumineux et onéreux en entrée. Comparé aux autres types de topologies, avantageuses avec un nombre limité de niveaux, le convertisseur modulaire multiniveaux semble être mieux adapté aux applications en moyenne et haute tensions, qui sont tributaires de l'association des composants de puissance. Néanmoins, pour la variation de vitesse, un certain nombre de défis technologiques ont été mis en évidence, compte tenu du fonctionnement particulier de l'onduleur modulaire multiniveaux et des contraintes imposées par l'opération en très basse fréquence. En le fonctionnement normal, la forme d'onde des courants internes, contrairement aux autres types de topologies, n'est pas symétrique en raison de la distribution du courant direct dans chaque bras. Cela entraîne une disparité significative en termes de dissipation thermique parmi les interrupteurs constituant un sous-module. Avec le choix d'une technologie de packaging 3D, la possibilité de refroidir les puces semi-conductrices en double-face offre une meilleure capacité de refroidissement et une nouvelle perspective de conception des modules pour cette application. Un nouveau concept de report de puces est présenté et un prototype de tel module a été réalisé, modélisé et caractérisé. Il permet d'équilibrer globalement la chaleur dissipée par les puces sur les deux faces du module, problème inhérent à l'emploi de structure 3D. Conjugué à la mutualisation d'un interrupteur par deux puces en parallèle, la nouvelle architecture a aussi pour objectif d'équilibrer le refroidissement double-face dans le temps. En effet, pour les opérations en basse fréquence, les interrupteurs fonctionnent en régime instationnaire avec de forte variation de température, il n'est donc plus possible de compenser les effets thermomécaniques de chaque composant l'un par l'autre, comme en régime stationnaire et avec un positionnement planaire des puces. D'autre part, d'un point de vu systémique, la stratégie de commande et le dimensionnement des condensateurs flottants de l'onduleur modulaire multiniveaux sont deux aspects intimement liés. En effet, les condensateurs flottants sont le siège d'ondulations de tension de très forte amplitude. Cela a pour effet de déstabiliser l'onduleur, voire de provoquer la destruction des composants en atteignant des niveaux de tension trop élevés. Ainsi, des contrôleurs judicieusement conçus permettent de réduire les ondulations indésirables, et a fortiori, d'embarquer des capacités moins importantes dans le système, tant que ces dernières sont inversement proportionnelles à l'ondulation de la tension. Afin d'avoir une compréhension approfondie sur les dynamiques régissant le convertisseur modulaire multiniveaux, un modèle dynamique global basé sur la représentation d'état a été établi. Bien que cette représentation soit limitée à l'harmonique 2 des grandeurs caractéristiques, elle permet une fidèle interprétation du mécanisme de conversion sans passer par des modèles énergétiques bien plus complexes à exploiter, et de proposer des lois de commande montrant leur efficacité notamment autour de la fréquence nominale. Cela a été vérifié sur une maquette de puissance réalisée dans le cadre de cette thèse. / Multilevel modular topology converts energy between two direct and alternative endings. This structure is constructed by the series connection of identical sub-modules, composed of a switching cell and a floating capacitor, and with arm inductors. Such a conversion system may reach a large number of levels increases the overall efficiency and quality of the output signals. In addition, it allows the use of low voltage components with better dynamics and cost effectiveness above the high voltage components. It also allows flexibility in the work of design and manufacture due to its modularity, while avoiding a bulky and expensive input transformer, regarding the conventional technology. Compared with other types of topologies, advantageous with a limited number of levels, the modular multilevel converter seems to be more suited for medium and high voltage applications, which are dependent on the association of power components. However, for variable speed drive application, a certain number of technological challenges have been highlighted, given the specific functional characteristics of the modular multilevel inverter and the constraints imposed by the very low frequency operation. On the one hand, for the normal operation of a multilevel modular converter, the waveform of the internal currents, in contrast to other types of topologies, is not symmetrical due to the distribution of the direct current in each phase leg. This may entail a significant disparity in terms of heat dissipation within the switching devices constituting a sub-module. Therefore, the problem of thermal management of active components is emphasized in the use of a modular multilevel converter. With the choice of a 3D packaging technology, interconnection by bumps, the ability to cool the semiconductor chips through the both sides of a module offers better cooling effects and a new perspective to design the power module for the studied structure. The concept of laying chips on both the two substrates of module without facing each other provides overall balanced dissipation in the space and permit to overcome the unbalanced heat distribution induced by bumps. Combined with the sharing of a switch by two chips in parallel, the proposal of the new architecture for 3D power module also aims to balance the double-sided cooling in the time range. Indeed, for the very low frequency operation, the switches operate in unsteady state where each switch has its own thermal behavior, it is no longer possible to compensate the thermo-mechanical constraints over each component with the help of the others, as in steady state and with a planar chips positioning scheme. On the other hand, from a systemic point of view, the control strategy and the dimensioning of floating capacitors of modular multilevel inverter are two interrelated aspects. Because the floating capacitors, having the role of energy sources, are loaded / unloaded through the modulation period, which causes very high voltage ripples across those capacitors with a very low frequency. This will destabilize the inverter and even provoke the destruction of components by approaching too high voltage levels. Thus, wisely designed controllers reduce unwanted ripples and, furthermore, allow embarking much smaller capacity in the system, as they are inversely proportional to the voltage ripple. In order to have a thorough understanding on the dynamics governing the modular multilevel converter, a comprehensive dynamic model based on state-space representation was established. Although this representation is limited to the second harmonic of characteristic variable, it allows a faithful interpretation of the conversion mechanism without using energy models, more complex to operate, and control laws can also be proposed and their effectiveness around the nominal frequency has been underlined. Concerning the very low frequency operations, another solution has been proposed and is ongoing patent pending.

The demands of a modern way of life have changed the way power electronics systems work. For instance, the grid has to provide not only the service of delivering electrical energy but also the communication to enable interactions between customers and enable them to be producers of electrical energy, too. Thus, the smart grid has come into existence. The consequence of the smart grid is that consumers could be “smart.” The most obvious consumers are households, so the houses have to also be smart and must be equipped with various power electronics devices for producing and managing electrical energy. Again, all those devices have to communicate somehow and provide data for managing electrical energy in the house. Zoomed in further, novel, state-of-the-art measurement equipment could have been built from different power electronics devices, and communication among them would be necessary for good operation. Zoomed further in, communication among different pieces of power electronics devices (such as converters) could offer benefits such as flexibility, abstraction, and modularity. This thesis provides insight into different communication techniques and protocols used in power electronics systems. A top-down approach presents three different levels of communication used in real-life projects with all the challenges they bring, starting with the smart house, followed by the state-of-the-art impedance measurement unit, and finalizing with internal power electronics building block (PEBB) communication. In the case of a smart house, where the house is equipped with solar panels, charge controllers, batteries, and inverters, communication allows interoperation between different elements of the power electronics system, enabling energy management. Results show the operation of the system and energy management algorithm. A house of this type won first prize at an international competition where energy management was one of the disciplines. The impedance measurement unit consists of different power electronics devices. In this case, too, communication between devices enables the operation of the impedance measurement unit. Communication techniques used here are shown together with measurement results. Finally, inter-PEBB communication has been shown as an approach for interaction among the different elements inside the PEBB, such as controller, GDs, sensors, and actuators. Real-time communication protocol, including all challenges, is described and developed. This approach is shown to enable communication and synchronization among different nodes inside the PEBB. Communication enables all internal elements of the PEBB to be transparent outside the PEBB in the sense that data gathered from them could be reused anywhere else in the system. Also, this approach enables the development of distributed event (time) driven control, hardware and software, abstraction, high modularity, and flexibility. A very important aspect of inter-PEBB communication is synchronization. A simple technique of sharing a clock among the parts of a 6 kV PEBB has been shown. / M.S. / This thesis provides insight into different communication techniques and protocols used in power electronics systems. A top-down approach presents three different levels of communication used in real-life projects with all the challenges they bring, starting with the smart house and a custom device designed and developed to be a communication interface among different power electronics devices from different vendors, such as charge controllers or inverters, but with capabilities not only to communicate but to also provide a platform for the development of energy management algorithms used to make houses grid zero if not grid positive. Aside from the smart house, this thesis describes communication protocols and techniques used in the impedance measurement unit (IMU). This complex measurement device provides valuable and accurate impedance measurements and consists of different power electronics devices that need to communicate. Finally, at the power electronics building block (PEBB) level, real-time communication protocol with all challenges is described. Developed communication protocol provides communication and synchronization among different nodes such as GDs, sensors, and actuators inside the PEBB. This intra-PEBB communication and synchronization combined with inter-PEBB communication and synchronization provide the foundation for the development of truly distributed event- (time-) driven control as well as hardware and software abstraction.