El transporte ha cobrado gran relevancia en las ciudades modernas, en las que el aumento de población, los atochamientos y la polución, degradan la calidad de vida. Es en respuesta a estos problemas que surgen nuevos e innovadores medios de transporte, como el que se aborda en este trabajo. Un vehículo de pequeño tamaño consistente en una plataforma autobalanceada con dos ruedas laterales, en que el pasajero se ubica sobre la plataforma mientras las ruedas lo movilizan. Específicamente, se aborda el mejoramiento de un prototipo desarrollado en 2009, el cual logró ser funcional, pero su operación requería un alto grado de destreza y entrenamiento, además de presentar un comportamiento, en ocasiones, poco predecible. Por este motivo se planteó en este trabajo, la intervención completa del vehículo en cuanto a diseño electrónico y software de control, con el fin de generar una segunda versión del mismo con mejoras técnicas sustanciales. Adicionalmente, se abordaron algunos aspectos mecánicos y estéticos, con el fin de proteger los componentes electrónicos y mejorar la experiencia de manejo, permitiendo que el usuario maniobre el vehículo inclinando el mando de dirección lateralmente, siguiendo el movimiento natural del cuerpo. El rediseño de la electrónica se hizo en base a los conocimientos adquiridos en el trabajo anterior, integrando la información previa disponible y añadiendo elementos nuevos que permitieran cumplir los objetivos planteados. Los puentes H, encargados de accionar los motores, fueron reconstruidos utilizando una estructura de bus laminado, aumentando así su capacidad de corriente y reduciendo las inductancias parásitas. El mejoramiento de la electrónica de disparo de los puentes H, permitió reducir a una décima parte los tiempos de conmutación, mejorando la eficiencia del circuito. Se incorporaron además protecciones por hardware para evitar cortocircuitos, así como sensores para monitorear y controlar la corriente circulante por los motores. Se desarrolló una nueva unidad IMU independiente de la tarjeta de control, capaz de obtener mediciones de inclinación y de su derivada en tiempo real, sin contaminación por ruido inducido, gracias a su interfaz completamente digital. La tarjeta de control también fue rediseñada para ajustarse a la nueva configuración de los sistemas, mediante conexiones limpias, minimizando el número de cables. El nuevo software se desarrolló desde cero, utilizando un esquema modular e incorporando conceptos como la abstracción de hardware, para simplificar la portabilidad y facilitar la comprensión de su funcionamiento. Esto posibilita la utilización del vehículo como plataforma de desarrollo de estrategias de control, en la cual la interacción con el hardware y la administración del sistema ya están resueltas. Además, se implementó una interfaz de comunicación por comandos, a través de la cual se puede monitorear el sistema, modificar parámetros y ejecutar órdenes usando un programa cliente externo al vehículo, conectado vía USB a la tarjeta de control. Desde el punto de vista electrónico y luego de los cambios introducidos, el vehículo se desempeñó correctamente. Las medidas tomadas para mejorar la robustez del sistema permiten una operación confiable, sin necesidad de precauciones adicionales por parte del usuario. La mayor cantidad y calidad de las mediciones de los instrumentos, junto con la aplicación de dos lazos en cascada (tanto para el control de inclinación a través de un torque en los motores, como para sus perturbaciones en la dinámica) mejoró sensiblemente el comportamiento del vehículo, lo que fue verificado a través de encuestas de percepción realizadas a usuarios novatos antes y después de las modificaciones. Destaca en estas evaluaciones el tiempo requerido para un manejo mínimo, que se redujo de unos 30 minutos a alrededor de 10 minutos.

Les avancées technologiques sur la réduction de la longueur de grille en accord avec la loi de Moore permettent aujourd’hui d’avoir des transistors sur silicium assez performants (ft/fMax > 150 GHz). La connaissance des performances dynamiques et en bruit en gamme millimétrique des transistors passe par leur caractérisation qui aujourd’hui est rendue difficile à cause de la limitation en fréquence des appareils de mesure. Il a été question dans cette thèse d’établir dans un premier temps un état de l’art sur les tuners d’impédances. Cette étude a débouché sur la nécessité de concevoir et de caractériser des tuners intégrés pour s’affranchir des pertes d’insertions causées par les dispositifs passifs entre les tuners mécaniques et les transistors sous test. Nous avons décrit les BEOL et les différents composants constituant le tuner intégré, puis définit une architecture commune aux 2 technologies CMOS 65 nm et BiCMOS9MW. La mesure des tuners présente des performances meilleures (TOS de 7 :1 et 150 :1) que les tuners mécaniques standards. Les méthodes de caractérisation en bruit sont présentées avec une attention particulière sur la méthode des impédances multiples que nous avons utilisée en source froide. Nous concluons par l’extraction des 4 paramètres de bruit des transistors MOSFET et HBT, en utilisant les tuners intégrés conçus. Les performances obtenues sont respectivement de l’ordre de 2 dB et 3.5 dB à 80 GHz et sont en accord avec les modèles utilisés. Une ouverture vers des applications encore plus larges des tuners est présentée, permettant d’envisager des applications au-delà de la bande W (75-110 GHz), des systèmes load-pull et des amplificateurs à gain variable. / The advanced technologies following the gate length scaling in agreement with Moore’s law allow today to get high performances of silicon transistors (ft/fMax > 150 GHz). The knowledge of the silicon transistors’ dynamic and noise performances in millimeter wave range is mandatory but they characterization is difficult due to the limitation of measurement tools. In this thesis we establish in a first step a state of the art of existing impedance tune. This study is followed by the design and the characterization of integrated impedance tuners in order to avoid the insertion losses induced by the passive devices between mechanical tuner and transistors under test in classical setup. We have described the BEOL, the different integrated tuner’s components, and defined a common tuner’s architecture for both technologies (CMOS 65 nm and BiCMOS9MW). The tuner measures presented performances (TOS of 7:1 and 150:1) better than mechanical ones. The noise characterization methods are presented with particular focus on the multi impedance method that we have used in cold-noise source. We conclude by the extraction of the 4 noise parameters of the MOSFET and HBT transistors, using designed integrated tuners. The obtained noise performances in millimeter wave range are respectively around 2 dB (MOSFET) and 3.5 dB (HBT) and are in agreement with the used models. The possibility to address a broad band of applications with these tuners is also presented, such as load-pull applications, G band integrated tuner, variable gain amplifier.

<p>Advances in modern technology and recent demand for high power applications have motivated great interest in power electronics. Power semiconductor devices are key components that have enabled significant advances in power electronic systems. Historically, silicon has been the material of choice for power semiconductor devices such as diodes, transistors and thyristors. However, silicon devices are now reaching their fundamental limits, and a transition to wide bandgap semiconductors is critical to make further progress in the field. Among them, SiC (silicon carbide) has attracted increasing attention as a power semiconductor to replace silicon due to its superior properties and technological maturity. In fact, SiC power MOSFETs have been commercially available since 2011, and are actively replacing their silicon counterparts at blocking voltages above 1 kV. At these voltages, the specific on-resistance of SiC MOSFETs is 200-300x lower than that of silicon devices. However, conventional vertical SiC MOSFETs are still far from their theoretical performance at blocking voltages below 2 kV. In this regime, the channel resistance is the dominant limitation due to the relatively low channel mobility at the SiO2/4H-SiC MOS interface.<br></p><p> </p><p>In this thesis, the first successful demonstration of a novel power device in 4H-SiC called the trigate power DMOSFET (double diffused metal oxide semiconductor field effect transistor) is presented. This device reduces the channel resistance by a factor of 3-5× compared with the state-of-art commercial power DMOSFETs, without requiring an increase in the channel mobility. The trigate structure is applied to a power MOSFET for the first time along with a self-aligned short channel process. This new structure utilizes both the conventional horizontal surface as well as the sidewalls of a trench to increase the effective width of the channel without increasing the device area. Conceptual design, optimization, process development and electrical results are presented. The trigate power MOSFET with a trench depth of 1 μm designed for a blocking voltage of 650 V has a specific on-resistance of 1.98 mΩcm²and a channel resistance of 0.67 mΩcm².This corresponds to a ∼2× reduction in the total specific on-resistance, and a 3.3× reduction in the specific channel resistance as compared to a conventional DMOSFET with the same blocking voltage rating. This demonstration is a landmark that could help SiC technology compete successfully in the lower blocking voltage regime below 600 V, and access for the first time a completely new segment in the power electronics application space.</p>

京都大学 / 新制・課程博士 / 博士(情報学) / 甲第24747号 / 情博第835号 / 新制||情||140(附属図書館) / 京都大学大学院情報学研究科通信情報システム専攻 / (主査)教授 佐藤 高史, 教授 橋本 昌宜, 教授 新津 葵一 / 学位規則第4条第1項該当 / Doctor of Informatics / Kyoto University / DFAM

<p> This thesis focuses on the noise model verification at both device and circuit levels using circuit simulators. The techniques and procedures developed in this thesis are general and can be applied to any proposed RF noise model equations. To fulfil the two tasks, three main topics have been accomplished. First, a general noise source implementation method has been presented in detail in this thesis and is verified with measurements for both long and short-channel MOSFETs. This method provides a simple and effective way to implement the enhanced channel noise and induced gate noise of MOSFETs without increasing the simulation complexity for the simulators.</p> <p> Second, a systematic procedure to refine the model parameters used in noise calculation is presented. For a model to accurately predict the HF noise characteristics, the accuracy in the prediction of both DC and AC characteristics has to be ensured. The procedure proposed in this thesis provides both DC and AC model parameter verification and optimization for RF noise simulation purpose.</p> <p> Third, as for benchmark circuits to verify noise model at the circuit level, two LNA designs are proposed in the thesis. The first design gives the emphasis on the noise reduction technique and the LNA design procedure. The proposed noise reduction technique gives circuit designers more control on noise figure minimization through noise matching. The second design is used to experimentally verify the noise model at the circuit level.</p> / Thesis / Master of Applied Science (MASc)

With the use of the simplistic equivalent circuits, loss mechanism in conventional power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) gate drive circuits is analyzed. Resonant gate drive techniques are investigated and a new resonant gate drive circuit is presented. The presented circuit adds minor complexity to conventional gate drivers but reduces the MOSFET gate drive loss very effectively. To further expand its use in driving Half-Bridge MOSFETs, another circuit is proposed in this thesis. The later circuit simplifies the isolation circuitry for the top MOSFET and meanwhile consumes much lower power than conventional gate drivers. / Master of Science

The demand for high power density, high efficiency bus converters has increased interest in resonant topologies, particularly the LLC resonant converter. LLC resonant converters offer several advantages in efficiency, power density, and hold up time extension capability. Among high voltage (>500V) MOSFETs, Super Junction MOSFETs, such as Infineon's CoolMOS parts, offer lower Rds on than conventional parts and are a natural choice for this application to improve efficiency. However, there is a history of converter failure due to reverse recovery problems with the primary switch's body diode. Before selecting CoolMOS devices for use in a LLC resonant converter, it is necessary to investigate its performance in this application. Field failures of PWM soft switching phase shift full bridge converters have been attributed to large reverse recovery charge in the primary side MOSFET body diode. Under low load conditions the device cannot fully recover, and the large reverse recovery current can cause the device to enter secondary break down, leading to failure. The unique structure of Super Junction MOSFETs, such as CoolMOS, avoid this failure mode by providing a different path for the reverse current; however, the reverse recovery charge of CoolMOS devices is large and can cause a loss of efficiency. For this reason, it is important to avoid conditions under which the reverse recovery characteristics of the body diode can be seen. / Master of Science

In modern power electronics systems there is a growing trend to replace discrete devices with integrated power electronic modules (IPEMs). In this way, several components can be replaced by a single component. By using prefabricated building blocks, the engineer simplifies the design process, reducing the total design cycle time and cost. By integrating only the necessary components to provide power switching, the end user has a pre-optimized building block with the flexibility to be used in a large variety of applications. Besides simplifying the design process, power modules should be designed in such a way as to improve the performance of the power converter. This begs the question as to how best to judge if one IPEM has better performance than another or better performance than its discrete counterpart. In analyzing a converter's performance, popular criteria include efficiency, power density, device stresses, and EMI. All of these criteria are strongly linked to the switching characteristics of the IPEM's power devices. This thesis is a comprehensive study of the requirements for obtaining and analyzing the switching characteristics of the IPEM's power devices. It outlines the important switching characteristics and the implications of each characteristic on converter performance. It deals with the relevant measurement issues, specifically addressing the minimum requirements, which sensors are most suitable, and problems leading to inaccurate data. A parametric study is conducted to determine the effects of several circuit and operating parameters on the switching characteristics. Using the resulting data and the knowledge from the measurement study, we can decide how to design the testbed layout, what operating conditions should be chosen for testing, and what effects of the tester must be decoupled to truly see the effects of IPEM design. The thesis concludes with the design of standard test equipment and procedures. / Master of Science

Dans le contexte actuel d'optimisation des performances des dispositifs de microélectronique, le transistor MOSFET, brique de base, est soumis à des contraintes géométriques telles que son architecture même est remise en cause. L'augmentation du nombre de grille afin d'accentuer le contrôle électrostatique de la grille sur le canal a mis en avant des architectures ultimes telles que le nanofil dont la grille enrobe totalement le canal. Dans ce travail, une étude du nanofil de silicium a été réalisée afin d'estimer les potentialités de cette architecture au niveau transistor jusqu'à l'étude de petits circuits. Pour cela, un modèle analytique en courant a été mis en place et implémenté en Verilog-A afin de simuler des petits circuits dans un environnement de type ELDO. Toutefois, les paramètres du modèle telles que les masses effectives de transport (ou de confinement) ou le transport dans le film sont la clé de la prédictibilité au niveau circuit. C'est pourquoi des simulations avancées de type liaisons fortes ou Kubo-Greenwood ont été développées afin d'étudier finement l'évolution des caractéristiques du nanofil notamment vis-à-vis de son intégration géométriques. Issues de ces approches numériques, des expressions analytiques ont été établies afin d'inclure dans le modèle toute la physique observée en amont. Des effets comme l'évolution de la structure de bande ou l'impact des mécanismes d'interaction ont ainsi pu être apportés jusqu'au niveau circuit. Les résultats en courant acquièrent une certaine pertinence en créant un lien entre simulations numériques et données expérimentales. / The microelectronics industry is extremely competitive in the increase of performances for devices or circuits. Nanowire architectures are now considered for the integration of strongly scaled devices as predicted for advanced technology nodes. The particular shape of nanowires combined to the reduction of geometrical dimensions (diameter of several atomic layers) leads to the emergence of physical phenomena on the MOSFET electrostatics characteristics such as quantum confinement (2D effects), short channel or band structure effects as well as the electronic transport with quasi-ballistic effect. In this work, we propose an analytical model including these last mechanisms for silicon GAA nanowires. In order to guarantee the pertinence of the model, numerical code have been developed such as a Schrödinger-Poisson solver for the band structure and a mobility calculation based on the Kubo-Greenwood formula including phonons, surface roughness and remote Coulomb scattering. The different results have been gathered in a continuous model, validated on numerical simulations and experimental data. Finally, a complete chain has been built to study the impact of last phenomena from the atomistic study, the MOSFET device characteristics up to small circuit performances.

A dosimetria in vivo é uma ferramenta essencial para programas de garantia de qualidade no campo da radioterapia, sendo um procedimento comumente realizado com TLDs ou diodos. No entanto, um dosímetro que vem em crescente popularidade nos últimos anos é o detector do tipo transistor de efeito de campo de metal-óxido-semicondutor (MOSFET). Os dosímetros MOSFET preenchem todas as características necessárias para realização da dosimetria in vivo, uma vez que possuem tamanho pequeno, boa precisão e viabilidade de medição, além de seu fácil manuseio. No entanto, seu verdadeiro diferencial é permitir a leitura de dose em tempo real, possibilitando intervenção imediata na correção de desvios de parâmetros físicos e na antecipação de pequenas alterações anatômicas no paciente durante um tratamento. Assim, foi proposta a caracterização dosimétrica do detector microMOSFET TN-502RDM-H e a construção de seu respectivo modelo computacional em MCNP6. Os resultados mostraram que o dosímetro MOSFET possui boa reprodutibilidade, boa linearidade e independência energética para feixes de altas energias de fótons e elétrons. Com relação a linearidade, destaca-se o excelente desempenho do detector MOSFET para valores doses acima de 50cGy, tendo apresentado uma precisão de 0,3%. Além disso, foi obtido um fator de calibração único, considerando fótons e elétrons de altas energias, com 2,9% de reprodutibilidade. Também foram constatadas dependências angulares de 4% e 13% para irradiações com e sem a condição de equilíbrio eletrônico, respectivamente. Foi encontrada uma diferença de 8% na resposta entre fótons de baixas energias nas qualidades RQR 3 e RQR 10. Com relação ao modelo computacional, a utilização das técnicas caracterização estrutural de MEV e EDS possibilitaram estimar a geometria e a composição do dispositivo MOSFET. Dos resultados do modelo computacional, ressalta-se a excelente concordância da dependência energética simulada em MCNP6 com a calculada analiticamente e também com a literatura. Por fim, o dosímetro MOSFET mostrou bom desempenho dosimétrico, confirmando seu potencial clínico; fato este que, certamente, contribui para sua maior aceitação na radioterapia. Somado a isto, a obtenção de um modelo computacional adequado proporciona um leque de oportunidades para trabalhos futuros, possibilitando o aprimoramento do instrumento nos mais diversos procedimentos de tratamento do câncer por radiação. / In vivo dosimetry is an essential tool for quality assurance programs in the field of radiotherapy, being a commonly performed procedure with TLDs or diodes. However, a dosimeter coming in popularity growing in recent years is the metal-oxide-semiconductor field-effect transistor (MOSFET) type detector. MOSFET dosimeters fulfill all necessary characteristics to perform the dosimetry in vivo, since they have small size, good precision and viability of measurement, besides its easy handling. Nevertheless, its true differential is to provide dose reading in real time, allowing immediate intervention in the deviations correction of physical parameters and the anticipation of small anatomical changes in the patient during a treatment. Thus, it was proposed the dosimetric characterization of the TN-502RDM-H microMOSFET detector and the construction of its respective computational model in MCNP6. Results showed that MOSFET dosimeter has good reproducibility, good linearity and energy independence for high energy beams of photons and electrons. Regarding linearity, the excellent performance of the MOSFET detector for dose values above 50 cGy stands out, since the dosimeter presented an accuracy of up to 0.3%. In addition, a single calibration factor was obtained with a reproducibility of 2.9% considering photons and high energy electrons. Angular dependencies of 4% and 13% were also observed for irradiations with and without the charged-particle equilibrium (CPE), respectively. It was found a difference of 8% in the response between low energy photon in RQR 3 and RQR 10 qualities. Concerning the computational model, use of the structural characterization techniques of SEM and EDS allowed to estimate geometry and composition of the MOSFET device. Excellent agreement of simulated energy dependence in MCNP6 with that calculated analytically and with literature is highlighted. Finally, MOSFET dosimeter showed good dosimetric performance, confirming its clinical potential. This certainly contributes to their greater acceptance in radiotherapy. Further, obtaining a suitable computational model provides a range of opportunities for future work, making it possible to improve the instrument in a variety of cancer treatment procedures.