Agricultural vehicles use electronic control units (ECUs) as control system. HistoricallyECUs have only been equipped with a minimum of features. With therecent progress in electronics, which have made components faster, smaller andcheaper, the trend is now to integrate more advanced functionality into the ECUs. Agricultural vehicles are present all over the world and they have to operateunder a wide variety of conditions. This put high requirements on the system andit is critical that a modern ECU can detect and locate errors. For an ECU to beable to operate on a world-wide market it is required to be flexible, expandableand robust. In addition to these requirements it is also wanted that an ECU havea long lifespan and a low cost. In this thesis different problems that modern ECUs have to face are investigated.Suggestions of how to solve these problems are also presented. Thereare two focuses in the thesis, 1) how ECUs can acquire information from its inputs/outputs; and 2) the requirements of the ECU hardware. This thesis does not aim to deliver a fully specified system description butrather to provide an overview of how an ECU can be designed and which problemsthat it has to face. A selection of areas of ECU design which are investigated in this thesis are,1) typical inputs/outputs; 2) analog-to-digital converters and their application; 3)how multiplexers can be used; 4) requirements of general purpose inputs/outputs(GPIO); 5) monitoring of a controller area network (CAN); 6) power-supply requirementand monitoring; 7) monitoring of the vehicle’s battery; 8) memory; 9)requirement of the microcontroller (MCU);Agricultural vehicles use electronic control units (ECUs) as control system. HistoricallyECUs have only been equipped with a minimum of features. With therecent progress in electronics, which have made components faster, smaller andcheaper, the trend is now to integrate more advanced functionality into the ECUs.Agricultural vehicles are present all over the world and they have to operateunder a wide variety of conditions. This put high requirements on the system andit is critical that a modern ECU can detect and locate errors. For an ECU to beable to operate on a world-wide market it is required to be flexible, expandableand robust. In addition to these requirements it is also wanted that an ECU havea long lifespan and a low cost.In this thesis different problems that modern ECUs have to face are investigated.Suggestions of how to solve these problems are also presented. Thereare two focuses in the thesis, 1) how ECUs can acquire information from its inputs/outputs; and 2) the requirements of the ECU hardware.This thesis does not aim to deliver a fully specified system description butrather to provide an overview of how an ECU can be designed and which problemsthat it has to face.A selection of areas of ECU design which are investigated in this thesis are,1) typical inputs/outputs; 2) analog-to-digital converters and their application; 3)how multiplexers can be used; 4) requirements of general purpose inputs/outputs(GPIO); 5) monitoring of a controller area network (CAN); 6) power-supply requirementand monitoring; 7) monitoring of the vehicle’s battery; 8) memory; 9)requirement of the microcontroller (MCU);

Este trabalho tem como objetivo a especificação de um conjunto de módulos de circuito, capazes de executar as funções de multiplexação relativas Hierarquia Digital E1, do ITU-T. A fim de alcançar o objetivo proposto, são realizadas consultas as normas nacionais (Praticas Telebrás) e internacionais (ITU-T) e estudos bibliográficos acerca do projeto e implementação dos circuitos executores das funções de multiplexação E1. Após a fase inicial de especificação e projeto dos módulos de circuito, os mesmos foram submetidos a intensa rotina de simulações, a fim de validar as arquiteturas propostas. Os módulos de circuito projetados são apresentados e descritos. Os resultados das simulações desenvolvidas são mostrados e comentados. Os módulos poderão ser empregados na produção de um chip-set de circuitos integrados para implementação de equipamentos multiplexadores E1. / The aim of this work is the specification of a set of circuit modules, capable to perform the multiplexing functions related to the ITU-T's E1 Digital Hierarchy. In order to reach the proposed objective, the national (Telebris Practices) and international (ITU-7) standards are consulted, as well as bibliographical references for the design and implementation of E1 multiplexing functions performing circuits. After the initial step of specification and design of the circuit modules, they are submitted to an intensive simulation routine, in order to validate the proposed architectures. The designed circuit modules are presented and described. The simulation results are shown and discussed. These modules may be used in the production of an integrated circuits chip-set, for implementation of El multiplexing equipments.

Este trabalho tem como objetivo a especificação de um conjunto de módulos de circuito, capazes de executar as funções de multiplexação relativas Hierarquia Digital E1, do ITU-T. A fim de alcançar o objetivo proposto, são realizadas consultas as normas nacionais (Praticas Telebrás) e internacionais (ITU-T) e estudos bibliográficos acerca do projeto e implementação dos circuitos executores das funções de multiplexação E1. Após a fase inicial de especificação e projeto dos módulos de circuito, os mesmos foram submetidos a intensa rotina de simulações, a fim de validar as arquiteturas propostas. Os módulos de circuito projetados são apresentados e descritos. Os resultados das simulações desenvolvidas são mostrados e comentados. Os módulos poderão ser empregados na produção de um chip-set de circuitos integrados para implementação de equipamentos multiplexadores E1. / The aim of this work is the specification of a set of circuit modules, capable to perform the multiplexing functions related to the ITU-T's E1 Digital Hierarchy. In order to reach the proposed objective, the national (Telebris Practices) and international (ITU-7) standards are consulted, as well as bibliographical references for the design and implementation of E1 multiplexing functions performing circuits. After the initial step of specification and design of the circuit modules, they are submitted to an intensive simulation routine, in order to validate the proposed architectures. The designed circuit modules are presented and described. The simulation results are shown and discussed. These modules may be used in the production of an integrated circuits chip-set, for implementation of El multiplexing equipments.

La demande croissante des réseaux optiques actuels en termes de bande passante résulte en un besoin d’exploiter la capacité offerte par la fibre optique. Un des moyens indispensable pour permettre ceci est l’utilisation du multiplexage en longueur d’onde. Il en résulte la nécessité d’utilisation de dispositifs, parmi lesquels le filtre optique, agiles en longueur d’onde et transparents par rapport aux débits. C’est dans ce contexte que notre travail se situe. La technologie utilisée est celle des filtres interférentiels en polarisation. Contraint par un cahier des charges particulier aux applications télécoms, le principal objectif consiste en l’augmentation des performances de ce type de filtre d’une part, et l’association de fonctionnalités additionnelles nécessaires dans les réseaux d’autre part. En utilisant le principe physique des interférences en polarisation, une structure est alors implémentée, suivant les contraintes liées aux trois paramètres majeurs du filtre que sont le contraste, la fonction d’égalisation et la reconfiguration de la bande passante. Par ailleurs, les architectures des filtres optiques diffèrent selon l’emplacement dans le réseau. Ainsi, si une architecture des plus simples est utilisée à la réception, au niveau des nœuds du réseau, celle-ci devient beaucoup plus complexe, s’adaptant à différents degrés de nœuds, et portent le nom de multiplexeurs optiques à insertion/extraction de longueur d’onde (ROADM). Un dispositif de ce type, basé sur les filtres biréfringents, est donc présenté. Une approche système est ensuite menée dans le but de mettre en évidence les avantages et les limitations de la technologie utilisée / The growing needs, in term of bandwidth in optical networks, increase over years. To satisfy these needs, the entire bandwidth of the optical fiber has to be exploited. In this context, the wavelength division multiplexing technique is used to allow the utilization of several wavelengths and results in considerably enhanced network bit-rate. However, such networks must use specific components which have particular wavelength-capabilities. Among these components, one of the most important and critical device is the optical filter. Our work is focused on the implementation of specific optical filters, using the polarization interference filter technology. The main purpose of this work is to enhance the filter rejection ratio, and to add new functionalities such as the amplitude equalization and the bandwidth tuning functions. After satisfying optical network expectations, another point, related to the filter utilization in the network, concern the device architecture which is determined by its network-location. A simple architecture with an input and an output is needed at the reception; meanwhile, a specific one is expected at network nodes. Thus, a new kind of devices is introduced, called reconfigurable optical add/drop multiplexers (ROADM). Therefore, such a device is implemented by the birefringent filter developed in this manuscript. Then, the developed device is placed in a transmission chain, and simulation results underline its limitations, by proceeding to comparison between this structure and typical optical filters. As conclusion of this work, some solutions and perspectives are presented, and very interesting challenges are highlighted

The main objectives of this thesis were to develop a lowtemperature PECVD process suitable for optoelectronicintegration, and to optimize silica glass composition forUV-induced modifications of a refractive index in PECVDfabricated planar devices. The most important achievement isthe successful development of a low temperature silicadeposition, which for the first time makes it is possible tofabricate good quality low loss integrated components whilekeeping the temperature below 250oC during the entirefabrication process. Two strong absorption peaks thatappear at1.5 mm communication window due to N-H and Si-H bonds have beencompletely eliminated by process optimization. This openspossibilities for monolithic integration with other,temperature sensitive devices, such as semiconductor lasers anddetectors, or polymer-based structures on the common siliconplatform. PECVD technology for low loss amorphous silicon inapplication to SiO2/Si based photonic crystal structures hasbeen also optimized to remove hydrogen incorporated during thedeposition process, responsible for the porosity of thedeposited material and creation of similar to silica absorptionbands. Change of the refractive index of germanium doped silicaunder UV irradiation is commonly used for fabrication of UVinduced fiber Bragg gratings. Here we describe our achievementsin fabrication of fiber Bragg gratings and their application todistributed sensor systems. Recently we have built up a laserlab for UV treatment in application to planar technology. Wehave demonstrated the high photosensitivity of PECVD depositedGe-doped glasses (not thermally annealed) even without hydrogenloading, leading to a record transmission suppression of 47dBin a Bragg grating photoinduced in a straight buried channelwaveguide. We have also used a UV induced refractive indexchange to introduce other device modifications or functions,such as phase shift, wavelength trimming and control ofpolarization birefringence.The developed low temperature technology and the UVprocessing form a unique technology platform for development ofnovel integrated functional devices for optical communicationsystems. A substantial part of the thesis has been devoted tostudying different plasma deposition parameters and theirinfluence on the optical characteristics of fabricatedwaveguides to find the processing window giving the besttrade-off between the deposition rate,chamber temperatureduring the process, optical losses and presence of absorptionbands within the interesting wavelength range. The optimalconditions identified in this study are low pressure (300-400mTorr), high dilution of silane in nitrous oxide and high totalflow (2000 sccm), low frequency (380 KHz) RF source and high RFpower levels (800-1000 W). The thesis provides better understanding of the plasmareactions during the deposition process. RF Power is the keyparameter for increasing the rate of surface processes so as toaccommodate each atomic layer in the lowest energy statepossible. All the process conditions which favor a moreenergetic ion bombardment (i.e. low pressure, low frequency andhigh power) improve the quality of the material, making it moredense and similar to thermal oxide, but after a certain pointthe positive trend with increasing power saturates. As theenergy of the incoming ion increases, a competing effect setsin at the surface: ion induced damage and resputtering. Finally, the developed technologies were applied for thefabrication of some test and new concept devices for opticalcommunication systems including multimode interference (MMI)-based couplers/splitters, state-of-the-art arrayed waveguidegrating-based multi/ demultiplexers, the first Bragg gratingassisted MMI-based add-drop multiplexer, as well as moreresearch oriented devices such as a Mach-Zehnder switch basedon silica poling and a Photonic Crystal-based coupler. <b>Keywords:</b>silica-on-silicon technology, PECVD, plasmadeposition, photonic integrated circuits, planar waveguidedevices, UV Bragg gratings, photosensitivity, arrayed waveguidegratings, multimode interference couplers, add-dropmultiplexers.

<p>The main objectives of this thesis were to develop a lowtemperature PECVD process suitable for optoelectronicintegration, and to optimize silica glass composition forUV-induced modifications of a refractive index in PECVDfabricated planar devices. The most important achievement isthe successful development of a low temperature silicadeposition, which for the first time makes it is possible tofabricate good quality low loss integrated components whilekeeping the temperature below 250oC during the entirefabrication process. Two strong absorption peaks thatappear at1.5 mm communication window due to N-H and Si-H bonds have beencompletely eliminated by process optimization. This openspossibilities for monolithic integration with other,temperature sensitive devices, such as semiconductor lasers anddetectors, or polymer-based structures on the common siliconplatform. PECVD technology for low loss amorphous silicon inapplication to SiO2/Si based photonic crystal structures hasbeen also optimized to remove hydrogen incorporated during thedeposition process, responsible for the porosity of thedeposited material and creation of similar to silica absorptionbands.</p><p>Change of the refractive index of germanium doped silicaunder UV irradiation is commonly used for fabrication of UVinduced fiber Bragg gratings. Here we describe our achievementsin fabrication of fiber Bragg gratings and their application todistributed sensor systems. Recently we have built up a laserlab for UV treatment in application to planar technology. Wehave demonstrated the high photosensitivity of PECVD depositedGe-doped glasses (not thermally annealed) even without hydrogenloading, leading to a record transmission suppression of 47dBin a Bragg grating photoinduced in a straight buried channelwaveguide. We have also used a UV induced refractive indexchange to introduce other device modifications or functions,such as phase shift, wavelength trimming and control ofpolarization birefringence.The developed low temperature technology and the UVprocessing form a unique technology platform for development ofnovel integrated functional devices for optical communicationsystems.</p><p>A substantial part of the thesis has been devoted tostudying different plasma deposition parameters and theirinfluence on the optical characteristics of fabricatedwaveguides to find the processing window giving the besttrade-off between the deposition rate,chamber temperatureduring the process, optical losses and presence of absorptionbands within the interesting wavelength range. The optimalconditions identified in this study are low pressure (300-400mTorr), high dilution of silane in nitrous oxide and high totalflow (2000 sccm), low frequency (380 KHz) RF source and high RFpower levels (800-1000 W).</p><p>The thesis provides better understanding of the plasmareactions during the deposition process. RF Power is the keyparameter for increasing the rate of surface processes so as toaccommodate each atomic layer in the lowest energy statepossible. All the process conditions which favor a moreenergetic ion bombardment (i.e. low pressure, low frequency andhigh power) improve the quality of the material, making it moredense and similar to thermal oxide, but after a certain pointthe positive trend with increasing power saturates. As theenergy of the incoming ion increases, a competing effect setsin at the surface: ion induced damage and resputtering.</p><p>Finally, the developed technologies were applied for thefabrication of some test and new concept devices for opticalcommunication systems including multimode interference (MMI)-based couplers/splitters, state-of-the-art arrayed waveguidegrating-based multi/ demultiplexers, the first Bragg gratingassisted MMI-based add-drop multiplexer, as well as moreresearch oriented devices such as a Mach-Zehnder switch basedon silica poling and a Photonic Crystal-based coupler.</p><p><b>Keywords:</b>silica-on-silicon technology, PECVD, plasmadeposition, photonic integrated circuits, planar waveguidedevices, UV Bragg gratings, photosensitivity, arrayed waveguidegratings, multimode interference couplers, add-dropmultiplexers.</p>

[pt] Redes ópticas convencionais exigem conversão eletro-óptica em cada nó para roteamento adequado dos pacotes. Adicionalmente, recursos de gerenciamento relevantes são requisitados para auxiliar o roteamento. Neste trabalho, inteligência e funcionalidade são introduzidas na camada física de redes ópticas com topologia em malha de modo a prover um esquema eficiente de roteamento de portadoras ópticas e endereçamento de pacotes. No arranjo apresentado ocorre que: (a) nenhuma conversão optoeletrônica (O/E/O) torna-se necessária, exceto nos nós fonte e destinação; (b). recursos de gerenciamento são praticamente dispensados na camada física. Ao representar a rede por grafos, critérios de custo mínimo são atingidos. Em seguida, utilizam-se algoritmos que, em consonância com os custos mínimos, levam ao roteamento. A conectividade desejada é então introduzida, com os algoritmos seguindo a técnica de reutilização de capacidade dentro um mesmo comprimento de onda. Desta forma, os caminhos de luz são determinados englobando todos os pares de nós da rede. Chamamos este arranjo de SWRA (Smart Wavelength Routing Assignment) dado que cada portadora segue de forma passiva seu exato caminho na rede. A implicação é a sensível redução nos custos, tanto pelo lado dos conversores O/E/O, bem como pelo lado do gerenciamento da rede. Demonstra-se que este arranjo pode estar sujeito a colisão de dados em uma mesma portadora. Uma solução é apresentada pela introdução de buffers elétricos de baixo custo, dimensionados através de ferramentas estatísticas. / [en] In conventional optical networks, optoelectronic conversions are needed in each node for the sake of a proper packet routing. Simultaneously, intensive managing resources should be allocated to accomplish the routing task. The correct introduction of intelligence and functionality within the network physical layer may lead to some advantages over conventional networks. Two advantages are worthwhile be mentioning (a)-no optoelectronic conversions (O/E/O) are needed, except for the source and destination nodes, and (b)-management resources are practically unnecessary within the physical layer. As the network uses a graph representation, it is possible to reach minimal cost criteria. Next, coping with the minimal cost, suitable algorithms are used for proper wavelength routing. The desired connectivity is introduced, and the algorithms will lead to the technique of capacity reuse within the wavelength. In this way, light-paths are obtained, linking all network node pairs. We called this arrangement as SWRA (Smart Wavelength Routing Assignment), since within the network each wavelength follows its precise path in a passive way. The result appears as a significant cost reduction, which reflects the lack of O/E/O converters and on the use of less management gear. However, this arrangement may suffer occasional data collision within any wavelength. Hence, a solution to avoid this impairment is presented and described, using low-cost electric buffers. Additionally, the statistical evaluation of those buffers is supplied. / [es] Redes ópticas convencionales exigen conversión eletro- óptica en cada nodo para un adequado ruteamiento de los paquetes. Adicionalmente, se necesitan recursos relevantes de gerenciamiento para auxiliar el ruteamiento. En este trabajo, inteligencia y funcionalidad son introducidas en la camada física de redes ópticas con topología en malla a fin de proporcionar un esquema eficiente de roteamiento de portadoras ópticas y direccionamiento de paquetes. En el arreglo presentado sucede que: (a) no es necesaria ninguna conversión optoeletrónica (O/E/O), excepto en los nodos fuente y destino; (b). recursos de gerenciamiento son prácticamente dispensados en la camada física. Al representar la rede por grafos, es posible alcanzar criterios de costo mínimo. Enseguida, se utilizan algoritmos que, en consonancia con los costos mínimos, conducen al roteamiento. La conectividad deseada se introduce con los algoritmos siguiendo la técnica de reutilización de la capacidad dentro de la misma longitud de onda. De esta forma, los caminos de luz se determinan englobando todos los pares de nodos de la red. Este arreglo se denomina SWRA (Smart Wavelength Routing Asignment) dado que cada portadora sigue de forma pasiva su exacto camiño en la red. La implicación de este procedimento es uma sensible reducción de los costos, tanto por el lado de los conversores O/E/O, así como por el lado del gerenciamiento de la red. Se demuestra que este arreglo puede estar sujeto a colisión de dados en una misma portadora. Se presenta una solución introduciendo buffers eléctricos de bajo costo, dimensionados a través de herramientas estadísticas.

Le problème de l'adaptation d'impédance en ingénierie des hyper fréquences et en électronique en général consiste à minimiser la réflexion de la puissance qui doit être transmise, par un générateur, à une charge donnée dans une bande de fréquence. Les exigences d'adaptation et de filtrage dans les systèmes de communication classiques sont généralement satisfaites en utilisant un circuit d'adaptation suivi d'un filtre. Nous proposons ici de concevoir des filtres d'adaptation qui intègrent à la fois les exigences d'adaptation et de filtrage dans un seul appareil et augmentent ainsi l'efficacité globale et la compacité du système. Dans ce travail, le problème d'adaptation est formulé en introduisant un problème d'optimisation convexe dans le cadre établi par la théorie de d'adaptation de Fano et Youla. De ce contexte, au moyen de techniques modernes de programmation semi-définies non linéaires, un problème convexe, et donc avec une optimalité garantie, est obtenu. Enfin, pour démontrer les avantages fournis par la théorie développée au-delà de la synthèse de filtres avec des charges complexes variables en fréquence, nous examinons deux applications pratiques récurrentes dans la conception de ce type de dispositifs. Ces applications correspondent, d'une part, à l'adaptation d'un réseau d'antennes dans le but de maximiser l'efficacité du rayonnement, et, d'autre part, à la synthèse de multiplexeurs où chacun des filtres de canal est adapté au reste du dispositif, notamment les filtres correspondant aux autres canaux. / The problem of impedance matching in electronics and particularly in RF engineering consists on minimising the reflection of the power that is to be transmitted, by a generator, to a given load within a frequency band. The matching and filtering requirements in classical communication systems are usually satisfied by using a matching circuit followed by a filter. We propose here to design matching filters that integrate both, matching and filtering requirements, in a single device and thereby increase the overall efficiency and compactness of the system. In this work, the matching problem is formulated by introducing convex optimisation on the framework established by the matching theory of Fano and Youla. As a result, by means of modern non-linear semi-definite programming techniques, a convex problem, and therefore with guaranteed optimality, is achieved. Finally, to demonstrate the advantages provided by the developed theory beyond the synthesis of filters with frequency varying loads, we consider two practical applications which are recurrent in the design of communication devices. These applications are, on the one hand, the matching of an array of antennas with the objective of maximizing the radiation efficiency, and on the other hand the synthesis of multiplexers where each of the channel filters is matched to the rest of the device, including the filters corresponding to the other channels.

Optical communications systems operate at the limits of their margins to respond to increasing capacity demands. Some of the signal processing functions required must soon operate at speeds beyond electronic implementation. Optical signal processors are fundamentally analog which requires precise control of the operating state. Programmable optical components are consequently essential. The thesis explores and elucidates the properties of meshes of generalized Mach-Zehnder interferometers (GMZIs) amenable to silicon (Si) photonics integration that are based on multimode interference couplers with programmability achieved via voltage controlled phase-shift elements within the interferometer arms to perform a variety of finite impulse response (FIR) and infinite impulse response (IIR) signal processing functions. The thesis presents a novel class of integrated photonic phased array systems with a single-stage, multistage, and feedback architectures. The designed photonic integrated systems utilize nano-electromechanical-system (NEMS) operated phase shifters of cascaded free suspended slot waveguides that are compact and require a small amount of power to operate. The structure of the integrated photonic phased array switch (IPPAS) elements is organized such that it brings the NEMS-operated phase shifters to the exterior sides of the construction; facilitating electrical connection. The transition slot couplers used to interconnect the phase shifters to the rest of the silicon structure are designed to enable biasing one of the silicon beams of each phase shifter from an electrode located at the side of the phase shifter. The other silicon beam of each phase shifter is biased through the rest of the silicon structure of the fabric, which is taken as a ground. Phased array processors of 2×2 and 4×4 multiple-input-multiple-output (MIMO) ports are conveniently designed within reasonable footprints native to the current fabrication technologies. The response of the single-stage 4×4 broadband IPPAS element is determined, and its phase synthesis states required for single-throw, double-throw and broadcast routing operations are predicted. The transmission responses of the single-stage wavelength division multiplexing (WDM) processors of 2×2 and 4×4 MIMO ports are simulated. The wavelength steering capability of the transmission interferograms by applying progressive phase shifts through the array of NEMS-operated phase shift elements of the single-stage 4×4 WDM (de)multiplexer is demonstrated. The advantages of cascading broadband and WDM phased array sections are articulated through several study cases. Five different cascaded phased array architectures are trialed for the construction of non-blocking 4×4 IPPAS broadband switches that are essential elements in the construction of universal photonic processors. A cascaded 2×2 WDM (de)multiplexer that can set the bandwidth of the (de)multiplexed cyclic channels into a binary number of programmable values is demonstrated. The envelope and wavelength modulations of the transmission responses utilizing a cascaded forward structure of three 2×2 sections that can be utilized for the (de)multiplexing of different bandwidth channels are demonstrated providing individual wavelength steering capability of the narrowband and wideband channels and the individual wavelength steering capability of the slow envelope and wavelength modulating functions. Innovative universal 2×2 and 4×4 cascaded phased array processors of advanced high-order architectures that can function as both non-blocking broadband routers and tunable WDM (de)multiplexers with spectrum steering and bandwidth control of the (de)multiplexed demands are introduced. The multimode interference (MMI) coupler is utilized for the construction of several IIR feedback photonic processors. Tunable photonic feedback processors have the advantage of using less number of MMI couplers compared to their counterparts of FIR forward-path processors saving on the footprint and loss merits. A passive feedback 2×2 (de)multiplexer made of a 4×4 MMI coupler and two loopback paths is proposed. The inclusion of an imbalance in the lengths of the loopback paths of the same symmetrical feedback (de)multiplexer is demonstrated to achieve wavelength modulation of the (de)multiplexed transmission responses that are useful for the (de)multiplexing of different bandwidth channels. Several newly introduced IIR feedback architectures are demonstrated to function similarly as their counterparts of FIR forward-path processors as binary bandwidth variable (de)multiplexers, envelope and wavelength modulation (de)multiplexers, and universal feedback processors. The investigation provided in this thesis is also supported with dynamic zero-pole evolution analysis in the complex plane of analysis of the studied FIR and IIR photonic processors to enhance understanding the principle of operation. This research expands the prospective for constructing innovative silicon-on-insulator (SOI) based optical processors for applications in modern optical communication systems and programmable elastic optical networks (EONs).

This thesis aims to create effective and comprehensive learning materials for students enrolled in the Switching Theory and Digital Design course. The lab is designed to enable students to program an FPGA using VHDL in the Quartus programming environment to control traffic intersections with sensors and traffic signals. This laboratory aims to provide students with practical experience in digital engineering design and help them develop the necessary skills to program and implement state machines for regulating traffic environments