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The next generation of power converters not only must meet the characteristics demanded by the load, but also has to meet some specific requirements like limited space and high ambient temperature etc. This needs the power converter to achieve high power density and high temperature operation. It is usually required that the active power devices operate at higher switching frequencies to shrink the passive components volume. The power semiconductor devices for high frequency high density power converter applications have been investigated. Firstly, the methodology is developed to evaluate the power semiconductor devices for high power density applications. The power density figure of merit (PDFOM) for power MOSFET and IGBT are derived from the junction temperature rise, power loss and package points of view. The device matrices are generated for device comparison and selection to show how to use the PDFOM. A calculation example is given to validate the PDFOM. Several semiconductor material figures of merit are also proposed. The wide bandgap materials based power devices benefits for power density are explored compared to the silicon material power devices. Secondly, the high temperature operation characteristics of power semiconductor devices have been presented that benefit the power density. The electrical characteristics and thermal stabilities are tested and analyzed, which include the avalanche breakdown voltage, leakage current variation with junction temperature rise. To study the thermal stability of power device, the closed loop thermal system and stability criteria are developed and analyzed. From the developed thermal stability criterion, the maximum switching frequency can be derived for the converter system design. The developed thermal system analysis approach can be extended to other Si devices or wide bandgap devices. To fully and safely utilize the power devices the junction temperature prediction approach is developed and implemented in the system test, which considers the parasitic components inside the power MOSFET module when the power MOSFET module switches at hundreds of kHz. Also the thermal stability for pulse power application characteristics is studied further to predict how the high junction temperature operation affects the power density improvement. Thirdly, to develop high frequency high power devices for high power high density converter design, the basic approaches are paralleling low current rating power MOSFETs or series low voltage rating IGBTs to achieve high frequency high power output, because power MOSFETs and low voltage IGBTs can operate at high switching frequency and have better thermal handling capability. However the current sharing issues caused by transconductance, threshold voltage and miller capacitance mismatch during conduction and switching transient states may generate higher power losses, which need to be analyzed further. A current sharing control approach from the gate side is developed. The experimental results indicate that the power MOSFETs can be paralleled with proper gate driver design and accordingly the switching losses are reduced to some extent, which is very useful for the switching loss dominated high power density converter design. The gate driving design is also important for the power MOSFET module with parallel dice inside thus increased input capacitance. This results in the higher gate driver power loss when the traditional resistive gate driver is implemented. Therefore the advanced self-power resonant gate driver is investigated and implemented. The low gate driver loss results in the development of the self-power unit that takes the power from the power bus. The overall volume of the gate driver can be minimized thus the power density is improved. Next, power semiconductor device series-connection operation is often used in the high power density converter to meet the high voltage output such as high power density boost converter. The static and dynamic voltage balancing between series-connected IGBTs is achieved using a hybrid approach of an active clamp circuit and an active gate control. A Scalable Power Semiconductor Switch (SPSS) based on series-IGBTs is developed with built-in power supply and a single optical control terminal. An integrated package with a common baseplate is used to achieve a better thermal characteristic. These design features allow the SPSS unit to function as a single optically controlled three-terminal switching device for users. Experimental evaluation of the prototype SPSS shows it fully achieved the design objectives. The SPSS is a useful power switch concept for building high power density, high switching frequency and high voltage functions that are beyond the capability of individual power devices. As conclusions, in this dissertation, the above-mentioned issues and approaches to develop high density power converter from power semiconductor devices standpoint are explored, particularly with regards to high frequency high temperature operation. To realize such power switches the related current sharing, voltage balance and gate driving techniques are developed. The power density potential improvements are investigated based on the real high density power converter design. The power semiconductor devices effects on power density are investigated from the power device figure of merit, high frequency high temperature operation and device parallel operation points of view. / Ph. D.

This dissertation presents the analysis and development of an innovative semiconductor device and topology for the high power current source converter (CSC). The CSC is very attractive in high power applications due to its lower output dv/dt, easy regeneration capability and implicit short-circuit protection. Traditionally, either a symmetrical gate turn-off (GTO) thyritor or an asymmetrical GTO in series with a diode is used as the power switch in the CSC. Since the GTO has a lower switching speed and requires a complicated gate driver, the symmetrical GTO based CSC usually has low dynamic response speed and low efficiency. To achieve high power rating, fast dynamic response speed and low harmonics, an advanced semiconductor device and topology are needed for the CSC. Based on symmetrical GTO and power MOSFET technologies, a symmetrical emitter turn-off (ETO) thyristor is developed that shows superior switching performance, high power rating and reverse voltage blocking capability. The on-state characteristics, forced turn-on characteristics, forced turn-off characteristics and the load-commutated characteristics are studied. Test results show that although the load-commutation loss is high, the developed symmetrical ETO is suitable for use in high power CSC due to its low conduction loss, fast switching speed and reverse voltage blocking capability. The snubberless turn-on capability is preferred for a semiconductor device in a power conversion system, and can be achieved for devices with forward biased safe operation area (FBSOA). The FBSOA of the ETO is investigated and experimentally demonstrated. The ETO device has excellent FBSOA due to the negative feedback provided by the emitter switch. However, the FBSOA for a large area ETO is poor. A new ETO concept is therefore proposed for future development in order to demonstrate the FBSOA over a large area device. To improve the turn-on performance of the large area ETO, a novel concept, named the transistor-mode turn-on, is proposed and studied. During the transistor-mode turn-on process, the ETO behaves like a transistor instead of a thyristor. Without a snubber, the transistor-mode turn-on for the ETO is hard to achieve. Through the selection of a proper gate drive and di/dt snubber, the transistor-mode turn-on can be implemented, and the turn-on performance for the ETO can be dramatically improved. To increase the power rating of the CSC without degrading the utilization of power semiconductor devices, a novel multilevel CSC, named the parallel-cell multilevel CSC, is proposed. Based on a six-switch CSC cell, the parallel-cell multilevel CSC has the advantages of high power rating, low harmonics, fast dynamic response and modularity. Therefore, it is very suitable for high power applications. The power stage design, modeling, control and switching modulation scheme for a parallel-cell multilevel CSC based static var compensator (STATCOM) are analyzed and verified through simulation. / Ph. D.

Bidirectional power switching devices are needed in many power management applications, particularly in lithium-ion battery protection circuitry. A monolithic bidirectional power switch fabricated with a simplified CMOS technology is introduced in this dissertation. Throughout the design process, ISE TCAD tool plays an important role. Design variables are carefully analyzed to improve the device performance or yield the best trade off. Optimization is done with the help of TCAD simulation and theoretical calculations. The device has been successfully fabricated using simplified 0.5 micron CMOS process. The experimental result shows a breakdown voltage of 25V. Due to the interdigitated source to source design, the inter-terminal current flowing path is effectively reduced to a few microns. The experimental result shows an ultra low specific on resistance. In comparison with other bi-directional power semiconductor switches by some major semiconductor manufacturers, the proposed BDS device has less than one half of the specific on resistance, thus substantially lower on state power loss of the switch. The proposed BDS device has a unique NPNPN structure, in comparison with NPNP structure, which is the analytical structure for CMOS latch-up, the proposed device inherently exhibits a better latch up immunity than CMOS inverter, thanks to the negative feed back mechanism of the extra NPN parasitic BJT transistor. In order to implement the device into simulators like PSPICE or Cadence IC Design, a compact model named variable resistance model has been built. This simple analytical model fits quite well with experimental data, and can be easily implemented by Verilog-A or other hardware description languages. Also, macro modeling is possible provided that the model parameters can be extracted from experimental curves. Several advanced types of BDS devices have been proposed, they exceed the basic BDS design in terms of breakdown voltage and /or on resistance. These advanced structures may be prominent for further improvement of the basic BDS device to a higher extend. Some cell phone providers such as Nokia is already asking for higher breakdown voltage of BDS device, due to the possibility of incidentally insert the battery pack into the cell phone with wrong pin polarity. Hopefully, the basic BDS design or one of these advanced types may eventually be implemented into the leading brand cell phone battery packs.

The thesis deals with study of high-temperature alloying process of power semiconductor devices. Mechanical durability and loss heat extraction is achieved via contacting silicon devices on molybdenum electrode in vacuum alloying furnace. Properties of alloy contact determine electrical, geometrical and mechanical parameters of device and are related with durability of device under heavy load during operation in various industrial machines or transport vehicles. Process parameters are evaluated in terms of input materials and their preparation along with temperature ramp profile and conditions in vacuum furnace. Test samples are analyzed to assess their electrical and geometrical parameters and selected samples underwent element analysis of alloy contact. Optimal process parameters are estimated according to analysis of experiments.

No description available.

The work deals with the capacitance measurement of high-voltage PN junctions. The work is divided into theoretical and practical parts. The theoretical part presents insight into the fundamental properties of PN junctions and methods for measuring of the capacitance of PN junctions, primarily by C-V measurement. In the practical part, several kinds of measuring circuits are introduced and a suitable method of measurement is found. The calculations of basic parameters - the width of the base and resistivity are presented and discussed. The results were compared with the values obtained by calculation from the technological parameters of the junction.

Les objectifs de la thèse sont d’élaborer des systèmes d’instrumentation électronique qui permettent une analyse et un diagnostic fins de l’état d’intégrité et du processus de vieillissement des composants de puissance à semi-conducteur. Ces travaux visent à évaluer la variation de la conductivité de la métallisation à l’aide de capteurs à Courant Foucault (CF) mais aussi à estimer l’effet du vieillissement des puces et de leur assemblage sur la distribution de courant dans les puces afin de mieux comprendre les mécanismes de défaillance. Des éprouvettes simplifiées mais également des modules de puissance représentatifs ont été vieillis par les cyclages thermique. Les capteurs développés ont été utilisés afin, d’une part de suivre le vieillissement, mais aussi d’autre part afin de comprendre l’effet de ce vieillissement sur le comportement des puces de puissance. Un banc d’instrumentation dédié a été élaboré et exploité pour la mesure locale de la conductivité électrique par le capteur à courants de Foucault, et l’estimation de la distribution de courants à partir de la mesure de cartographies de champ magnétique par capteurs de champ, ou à partir de la cartographie de la distribution de tension sur la métallisation de source. Ce banc a permis en premier lieu d’évaluer la pertinence et les performances de différents types de capteurs exploitables. Le travail s’est également appuyé sur des techniques de traitement de signal, à la fois pour estimer de manière quantitative les informations de conductivité des métallisations issues des capteurs à courant de Foucault, mais aussi pour l’analyse de la distribution de courant à partir des informations fournies par des capteurs de champ magnétiques. Les modèles utilisés exploitent des techniques de modélisation comportementale (le modèle approché de « transformateur analogique » modélisant capteurs à CF ou bien d’inversion de modèle semi-analytique dans le cas l’estimation de la distribution de courant). Les résultats obtenus à partir de ces modèles nous permettrons, d’une part de mieux comprendre certains mécanismes de défaillance, mais également de proposer une implantation et des structures de capteurs pour le suivi « in situ » de l’intégrité des composants. / This thesis is dedicated to develop electronic instrumentation systems that allow to analyse the ageing process and to make a diagnosis the failure mechanisms of power semiconductor device. The research objectives were to evaluate the electrical conductivity variation of metallization layer using the eddy current technique but also to estimate the ageing effect of the semiconductor dies and their module packaging on the current distribution in the die, to better understand the mechanism failures. The specimens simplified and the power semiconductor modules were aged by thermal cycles. The various sensors have been used (eddy current sensor, Hall sensor), to follow the ageing process, and to understand the ageing effect on the power semiconductor die. The experimental instrumentation system has been developed and used, to realize the non destructive evaluation by the eddy current technique on the metallization layer and to measure the map of magnetic field induced above the die by the magnetic sensor, the potential distribution. In the first time, this system allowed to evaluate the relevance and the performance of different type sensors used for the local measure on the electrical conductivity by eddy current sensors and on the currents distribution by Hall sensors or the potential distribution of the source metallization layer. This work was also supported by the signal processing techniques. To estimate quantitatively the electrical conductivity of metallization layer by the eddy current sensors, a model using the two-winding transformer analogy simulate the electromagnetic interaction between the sensor and the conducting plate. And, the current distribution from the measured data is given by inverting a mesh-free modeling of the induced magnetic field. The results obtained from these models can allow us to firstly understand certain failure mechanisms, but also to propose the integrated circuit with the sensors for monitoring "in situ" the state ageing of power semiconductor device.

Les Energies Marines Renouvelables (EMR) se développent aujourd’hui très vite tant au niveau de la recherche amont que de la R&D, et même des premiers démonstrateurs à la mer. Parmi ces EMR, l'énergie des vagues présente un potentiel particulièrement intéressant. Avec une ressource annuelle brute moyenne estimée à 40 kW/m au large de la côte atlantique, le littoral français est plutôt bien exposé. Mais l’exploitation à grande échelle de cette énergie renouvelable ne sera réalisable et pertinente qu'à condition d'une bonne intégration au réseau électrique (qualité) ainsi que d'une gestion et d'un dimensionnement optimisé au sens du coût sur cycle de vie. Une première solution de génération tout électrique pour un houlogénérateur a d’abord été évaluée dans le cadre de la thèse de Marie RUELLAN menée sur le site de Bretagne du laboratoire SATIE (ENS de Cachan). Ces travaux ont mis en évidence le potentiel de viabilité économique de cette chaîne de conversion et ont permis de poser la question du dimensionnement de l’ensemble convertisseur-machine et de soulever les problèmes associés à la qualité de l’énergie produite. Puis une seconde thèse a été menée par Judicaël AUBRY dans la même équipe de recherche. Elle a consisté, entre autres, en l’étude d’une première solution de traitement des fluctuations de la puissance basée sur un système de stockage par supercondensateurs. Une méthodologie de dimensionnement de l’ensemble convertisseur-machine et de gestion de l’énergie stockée fut également élaborée, mais en découplant le dimensionnement et la gestion de la production d’énergie et de ceux de son système de stockage. Le doctorant devra donc : 1. S’approprier les travaux antérieurs réalisés dans le domaine de la récupération de l’énergie des vagues ainsi que les modèles hydrodynamiques et mécaniques réalisés par notre partenaire : le LHEEA de l’Ecole Centrale de Nantes - 2. Résoudre le problème du couplage entre dimensionnement/gestion de la chaîne de conversion et dimensionnement/gestion du système de stockage. 3. Participer à la réalisation d’un banc test à échelle réduite de la chaine électrique et valider expérimentalement les modèles énergétiques du stockage et des convertisseurs statiques associés - 4. Proposer une méthodologie de dimensionnement de la chaine électrique intégrant le stockage et les lois de contrôle préalablement élaborées 5. Déterminer les gains en termes de capacités de stockage obtenus grâce à la mutualisation de la production (parc de machines) et évaluer l’intérêt d’un stockage centralisé - 6. Analyser l’impact sur le réseau d’une production houlogénérée selon divers scenarii, modèles et outils développés par tous les partenaires dans le cadre du projet QUALIPHE. L’exemple traité sera celui de l’Ile d’Yeu (en collaboration avec le SyDEV. / The work of this PhD thesis deals with the minimization of the per-kWh cost of direct-drive wave energy converter, crucial to the economic feasibility of this technology. Despite the simplicity of such a chain (that should provide a better reliability compared to indirect chain), the conversion principle uses an oscillating system (a heaving buoy for example) that induces significant power fluctuations on the production. Without precautions, such fluctuations can lead to: a low global efficiency, an accelerated aging of the fragile electrical components and a failure to respect power quality constraints. To solve these issues, we firstly study the optimization of the direct drive wave energy converter control in order to increase the global energy efficiency (from wave to grid), considering conversion losses and the limit s from the sizing of an electrical chain (maximum force and power). The results point out the effect of the prediction horizon or the mechanical energy into the objective function. Production profiles allow the study of the flicker constraint (due to grid voltage fluctuations) linked notably to the grid characteristics at the connection point. Other models have also been developed to quantify the aging of the most fragile and highly stressed components, namely the energy storage system used for power smoothing (with super capacitors or electrochemical batteries Li-ion) and power semiconductors.Finally, these aging models are used to optimize key design parameters using life-cycle analysis. Moreover, the sizing of the storage system is co-optimized with the smoothing management.