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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

Active rectification and control of magnetization currents in synchronous generators with rotating exciters : Implementation of the SVPWM algorithm using MOSFET technology

Johansson, Tomas January 2015 (has links)
This thesis aims to design and build a power electronics system for the rectification and control of magnetization currents in synchronous generators with rotating exciters.The rotating exciter provides three-phase AC while the generator rotor needs DC with a high degree of control. The system needs to be able to rectify the three-phase AC to a stable DC without unwanted harmonic content, neither on the DC or the AC side. For control purposes it is also important that the current in the rotor can be changed very swiftly, preferably by several amperes during a single revolution ofthe machine.The system of choice is a synchronous rectifier bridge consisting of six MOSFET switches operated using the Space vector pulse width modulation (SVPWM) algorithm. This method gives a stable and controllable DC voltage while it keeps the harmonic content of the input currents at a minimum. However the DC voltage will always be higher than the peak line-to-line voltage from the exciter. To be able to lower the voltage below this value a Buck-converter is placed after the rectifier bridge.To gain a higher degree of control of the current density in the rotor windings the windings have been subdivided into three parts. To provide individual control of the current in the three rotor parts each part have been outfitted with a Push and Pull H-bridge.The proposed system has been both simulated using MATLAB Simulink and built and tested in the laboratory with satisfactory results. / I detta examensarbete presenteras ett kraftelektroniksystem för förbättrad kontroll av magnetiseringsstömmar i vattenkraftsgeneratorer som är utrustade med roterande matare.Generatorer används för att konvertera energi från rörelseenergi till elektrisk energi. Detta görs genom att man utsätter spolar för varierande magnetfält; då induceras spänning i spolarna. I vattenkraftsgeneratorer används oftast stora elektromagneter placerade i en rotor för att skapa dessa magnetfält. För att magnetisera elektromagneterna behövs ström som på något sätt måste överföras mellan den statiska och den roterande sidan i generatorn. Traditionellt görs detta med hjälp av släpringar och kolborstar som genom mekanisk kontakt överför elektriciteten. En roterande matare kan beskrivas som en liten generator som har sina elektriska utgångar på den roterande sidan istället för på den statiska sidan. Genom att placera en roterande matare på samma axel som den stora generatorn kan man istället alstra den elektricitet som behövs för att magnetisera generatorn direkt på den roterande sidan. Däregenom undviks många problem som är associerade med lösningen med släpringar.Den roterande mataren ger dock växelström medan magnetiseringsströmmen måste vara likström. Det är här kraftelektroniken kommer in i bilden. Det finns flera sätt att åstadkomma likriktning av ström. I det här projektet har ett fullständigt aktivt system byggts. Systemet är uppbyggt av transistorer av MOSFET typ och kan kontrolleras trådlöst med hjälp av Bluetoothteknik. Systemet ger full kontroll över strömmar och spänningar både på växelströmssidan och på likströmssidan och ska användas till en testgenerator på avdelningen för ellära vid Uppsala Universitet. Där ska den utökade kontroll som systemet ger förutsättningar till användas för att undersöka hur den här typen av system kan optimera de magnetiska krafterna inuti generatorn. En sådan optimering kan minska vibrationerna i generatorn och därigenom minska slitaget på lager och andra delar i maskinen.
22

The design of an analogue class-D audio amplifier using Z-domain methods

Kemp, Pieter Stephanus 03 1900 (has links)
Thesis (MScEng)--Stellenbosch University, 2012 / ENGLISH ABSTRACT: The class-D audio power amplifier has found widespread use in both the consumer and professional audio industry for one reason: efficiency. A higher efficiency leads to a smaller and cheaper design, and in the case of mobile devices, a longer battery life. Unfortunately, the basic class-D amplifier has some serious drawbacks. These include high distortion levels, a load dependent frequency response and the potential to radiate EMI. Except for EMI, the aforementioned issues can be mitigated by the proper implementation of global negative feedback. Negative feedback also has the potential to indirectly reduce EMI, since the timing requirements of the output devices can be relaxed. This thesis discusses the design of a clocked analogue controlled pulse-width modulated class-D audio amplifier with global negative feedback. The analogue control loop is converted to the z-domain by modelling the PWM comparator as a sampling operation. A method is implemented that improves clip recovery and ensures stability during over-modulation. Loop gain is shaped to provide a high gain across the audio band, and ripple compensation is implemented to minimize the negative effect of ripple feedback. Experimental results are presented. / AFRIKAANSE OPSOMMING: Die klas-D klankversterker geniet wydverspreide gebruik in beide die verbruiker en professionele oudio industrie vir een rede: benuttingsgraad. ’n Hoër benuttingsgraad lei tot ’n kleiner en goedkoper ontwerp, en in die geval van draagbare toestelle, tot langer batterylewe. Ongelukkig het die basiese klas-D klankversterker ernstige tekortkominge, naamlik hoë distorsievlakke, ’n lasafhanklike frekwensierespons en die vermoë om EMI te genereer. Behalwe vir EMI kan hierdie kwessies deur die korrekte toepassing van globale negatiewe terugvoer aangespreek word. Negatiewe terugvoer het ook die potensiaal om EMI indirek te verminder, aangesien die tydvereistes van die skakel stadium verlaag kan word. Hierdie tesis bespreek die ontwerp van ’n geklokte analoog-beheerde pulswydte-modulerende klas-D klankversterker met globale negatiewe terugvoer. Die analoogbeheerlus word omgeskakel na die z-vlak deur die PWM vlakvergelyker as ’n monster operasie te modelleer. ’n Metode word geïmplementeer wat die stabiliteit van die lus verseker tydens oormodulasie. Die lusaanwins word gevorm om ’n hoë aanwins in die oudioband te verseker en riffelkompensasie word geïmplementeer om die negatiewe effek van terugvoerriffel teen te werk. Eksperimentele resultate word voorgelê.
23

STABILITY IMPROVEMENTS FOR GENERALIZED AVERAGE-VALUE MODEL OF DC-DC CONVERTERS

Al-Ani, Mahsen Salah 01 January 2018 (has links)
Power electronics have a significant role in modern electrical devices, for instance, hybrid electric vehicles. Power electronics are the technology in between the source and the load circuits and can convert the power from dc to ac or from dc to ac. There are also many types of dc-dc converters, like such as boost and buck converters, which exhibit switching ripple behavior. A boost converter increases the output voltage (with respect to the input voltage) and reduces the output current. A buck converter decreases the output voltage and increases the output current. Many models are used to predict the behavior of the boost and buck converters. The detailed (DET), state-space averaged (SSA), and generalized averaging method (GAM) models are capable of predicting the average behavior of dc-dc converters. For DET and GAM models, the rippling behavior can also be predicted. These models differ in terms of required run time, existence of constant equilibrium points, and accuracy. The DET model has a long run time and does not have constant equilibrium, but it is very accurate. The SSA technique is a mathematical and time-invariant model that capable of describing the behavior of a dc-dc boost converters. It can derive the small signal ac equations of a switching converter and is used to illustrate the average behavior of any linear or nonlinear system in converters. The SSA does not take extensive runtime simulation and has constant equilibrium points, and can be applied to continuous, discrete and sample data systems. The GAM model can predict the average and ripple behavior in power electronic systems and has constant equilibrium and fast run time. However, it has a numerical stability issue. The integrator stabilized multifrequency averaging (ISMFA) model is employed to solve the stability issue in the GAM model, but it is a complicated dynamic method and has restrictions in its process. In the present study, a simplified but stable GAM model is introduced to predict the average and ripple behavior of boost dc-dc converters and to overcome the limitations of other methods. In this work, the stabilized GAM model has been used for a dc-dc boost converters. The stability of the proposed model is analyzed. The performance of the improved GAM model is compared with the DET, SSA, and GAM models. The results show that the stabilized GAM model is stable with the additional poles created by the GAM assignable by parameter choice. The new GAM model predicts the same results as the existing GAM method without the underlying stability concerns. The stabilized GAM model exhibits constant ii equilibrium point and requires significantly lower run times than the DET model, but it is also able to predict the ripple performance of the converter. The stabilized GAM model does not take a long run time, is less complicated, has fewer restrictions, has constant equilibrium and internal stability, and has more straightforward implementation than other models, like the ISMFA model. It represents a suitable alternative to DET models when high accuracy simulations are desired without long simulation run times.
24

Etude théorique et expérimentale de micro-OLEDs rapides sur électrodes coplanaires en régime d'impulsions à haute densité de courant / Theoretical and experimental studie of µ-OLED on coplanar waveguide electrodes in nanosecond scale pulses width under high current densities

Chime, Alex Chamberlain 20 December 2017 (has links)
Ce travail de thèse explore l’excitation électrique de micro-OLEDs en régime d’impulsion afin d’évaluer la possibilité d’atteindre le seuil laser dans les diodes laser organiques qui restent encore à démontrer. Ils’agit d’identifier des solutions scientifiques et techniques ouvrant la voie vers des densités d’excitations électriques équivalentes aux seuils laser observés en pompage optique. Dans la littérature, les seuils les plus bas sont équivalents à des densités de courant entre 0.72 et 4kA/cm² si on suppose une efficacité quantique externe de 1%. De telles densités de courant imposent un régime d’excitation électrique impulsionnel pour s’affranchir des risques de destructions par effet thermique et des pertes par annihilation singulet-triplet dès lors que l’on travaille avec des durées d’impulsion de l’ordre de la nanoseconde. Et pour espérer des réponses électriques et optiques efficaces à de telles durées d’impulsions, il est proposé ici de combiner l’électronique hyperfréquence et l’optoélectronique organique. A cet effet, un modèle électrique équivalent de l’OLED permettant d’accéder à son temps de réponse en mode tout-ou-rien est développé. De plus, des électrodes spécifiques sont dimensionnées et structurées sous forme de lignes coplanaires d’impédance caractéristique 50Ω afin de maîtriser l’impédance du circuit d’excitation et d’assurer le transfert du maximum d’énergie de l’impulsion d’excitation vers celui-ci. Après dépôts de l’hétéro-structure organique basée sur le système hôte-dopant Alq3:DCM, les composants ainsi réalisés sont caractérisés électriquement et optiquement avec différentes techniques par analyse vectorielle, en régime continu et en régime d’impulsion. En régime d’impulsion de très courtes durées (2.5~20ns) et à faible taux de répétition (100Hz), des temps de réponse de 330ps etdes densités de courant maximales entre 4 et 6kA/cm² ont été mesurés alors que le maximum de luminance culmine à 4.11x10⁶ cd/m². / This thesis explores the pulsed electrical excitation of micro-OLEDs in order to evaluate the possibility of reaching the laser threshold in organic laser diodes that have not yet be demonstrated. The main goal is the identification of the scientific and technical solutions towards high electrical excitation current densities equivalent to the laser thresholds observed under optical pumping. In the literature, the lowest reported thresholds are equivalent to current densities between 0.72 and 4kA/cm², assuming an external quantum efficiency of 1%. Such current densities imply a pulsed electrical excitation regime to prevent the risks of device breakdown by Joule heating effects and to avoid losses by excitons annihilation processes, as long as the pulses duration are in nanosecond range. To expect efficient electrical and optical responses to such pulse durations, it is suggested to combine microwave electronics and organic optoelectronics. For this purpose, an equivalent electrical model of the organic light emitting device, allowing access to its on-off mode time response, is developed. Additionally, specific electrodes are designed and patterned in the coplanar waveguide configuration with characteristic impedance of 50Ω, inorder to control the impedance of the excitation circuit and to ensure the maximum energy transfer of the excitation pulse to the device. After deposition of organic hetero-structure based on the Alq3:DCM host-guest system, the device is characterized electrically and optically with different techniques by vector network analysis, in continuous mode and in pulse mode. In pulse excitation regime with very short pulses durations (2.5~20ns) and low repetition rate (100Hz), time response of 330ps and maximum current densities between 4 and 6kA/cm² are recorded while the maximum of luminance peaks at 4.11x10⁶ cd/m².
25

Pulse Width Modulation for On-chip Interconnects

Boijort, Daniel, Svanell, Oskar January 2005 (has links)
<p>With an increasing number of transistors integrated on a single die, the need for global on-chip interconnectivity is growing. Long interconnects, in turn, have very large capacitances which consume a large share of a chip’s total power budget.</p><p>Power consumption can be lowered in several ways, mainly by reduction of switching activity, reduction of total capacitance and by using low voltage swing. In this project, the issue is addressed by proposing a new encoding based on Pulse Width Modulation (PWM). The implementation of this encoding will both lower the switching activity and decrease the capacitance between nearby wires. Hence, the total effective capacitance will be reduced considerably. Schematic level implementation of a robust transmitter and receiver circuit was carried out in CMOS090, designed for speeds up to 100 MHz. On a 10 mm wire, this implementation would give a 40% decrease in power dissipation compared to a parallel bus having the same metal footprint. The proposed encoding can be efficiently applied for global interconnects in sub-micron systems-on-chip (SoC).</p>
26

Multilevel Space Vector PWM for Multilevel Coupled Inductor Inverters

Vafakhah, Behzad 06 1900 (has links)
A multilevel Space Vector PWM (SVPWM) technique is developed for a 3-level 3-phase PWM Voltage Source Inverter using a 3-phase coupled inductor to ensure high performance operation. The selection of a suitable PWM switching scheme for the Coupled Inductor Inverter (CII) topology should be based on the dual requirements for a high-quality multilevel PWM output voltage together with the need to minimize high frequency currents and associated losses in the coupled inductor and the inverter switches. Compared to carrier-based multilevel PWM schemes, the space vector techniques provide a wider variety of choices of the available switching states and sequences. The precise identification of pulse placements in the SVPWM method is used to improve the CII performance. The successful operation of the CII topology over the full modulation range relies on selecting switching states where the coupled inductor presents a low winding current ripple and a high effective inductance between the upper and lower switches in each inverter leg. In addition to these requirements, the CII operation is affected by the imbalance inductor common mode dc current. When used efficiently, SVPWM allows for an appropriate balance between the need to properly manage the inductor winding currents and to achieve harmonic performance gains. A number of SVPWM strategies are developed, and suitable switching states are selected for these methods. Employing the interleaved PWM technique by using overlapping switching states, the interleaved Discontinuous SVPWM (DSVPWM) method, compared to other proposed SVPWM methods, doubles the effective switching frequency of the inverter outputs and, as a result, offers superior performance for the CII topology by reducing the inductor losses and switching losses. The inverter operation is examined by means of simulation and experimental testing. The experimental performance comparison is obtained for different PWM switching patterns. The inverter performance is affected by high-frequency inductor current ripple; the excessive inductor losses are reduced by the DSVPWM method. Additional experimental test results are carried out to obtain the inverter performance as a variable frequency drive when operated in steady-state and during transient conditions. The CII topology is shown to have great potential for variable speed drives. / Power Engineering and Power Electronics
27

Design of a DC/DC buck converter for ultra-low power applications in 65nm CMOS Process

Safari, Naeim January 2012 (has links)
Switching mode DC/DC converters are critical building blocks in portable devices and hence their power efficiency, accuracy and cost are a major issue. The primary focus of this thesis is to address these critical issues.This thesis focuses on the different methods of feedback control loop which are employed in the switching mode DC/DC converters such as voltage mode control and current mode control. It also discusses about the structure of buck converter and tries to find an efficient solution for stepping-down the DC voltage level in ultra-low power applications. Based on this analysis, a 20 MHz voltage mode DC/DC buck converter with an on-chip compensated error amplifier in 65 nm CMOS process is designed and implemented.The power efficiency has been improved by sizing the power switches to have a low parasitic output and gate capacitances to reduce the capacitive and gate-drive losses. Also the error amplifier biasing current is chosen a small value (12.5 μA) to reduce the power dissipations in the control loop of the system. The maximum 84% power efficiency is achieved at 1.1 V to 500 mV conversion, above 81% efficiency can be achieved at load current from 0.5 mA to 1.26 mA. Due to wide bandwidth error amplifier and proper compensation network the fast transient response with settling time around 45 μs is achieved.
28

Time Variation of Partial Discharge Activity Leading to Breakdown of Magnet Wire under Repetitive Surge Voltage Application

Hayakawa, Naoki, Inano, Hiroshi, Nakamura, Yusuke, Okubo, Hitoshi 12 1900 (has links)
No description available.
29

Pulse Width Modulation for On-chip Interconnects

Boijort, Daniel, Svanell, Oskar January 2005 (has links)
With an increasing number of transistors integrated on a single die, the need for global on-chip interconnectivity is growing. Long interconnects, in turn, have very large capacitances which consume a large share of a chip’s total power budget. Power consumption can be lowered in several ways, mainly by reduction of switching activity, reduction of total capacitance and by using low voltage swing. In this project, the issue is addressed by proposing a new encoding based on Pulse Width Modulation (PWM). The implementation of this encoding will both lower the switching activity and decrease the capacitance between nearby wires. Hence, the total effective capacitance will be reduced considerably. Schematic level implementation of a robust transmitter and receiver circuit was carried out in CMOS090, designed for speeds up to 100 MHz. On a 10 mm wire, this implementation would give a 40% decrease in power dissipation compared to a parallel bus having the same metal footprint. The proposed encoding can be efficiently applied for global interconnects in sub-micron systems-on-chip (SoC).
30

Implementation of Double Pulse Width Modulation for Uniformity of LED Light Bars in LCD Back-Light

Huang, Chao-Hsuan 25 August 2011 (has links)
This thesis proposes a dimming approach with Double Pulse Width Modulation for equalizing the light output of the back light with light emitted diodes (LEDs) for large scale outdoor liquid crystal displays (LCDs). The approach compensates the difference among the LED light bars by adjusting the power outputs of converters according to the feedback of light strength from light sensors. With the proposed Double Pulse Width Modulation method, local brightness adjustment on the light bars can be made to provide a uniform light output and the dimming function for LCD can be retained. Experiments results made on a 46¡¨ LCD with four LED light bars demonstrate that the double pulse-width- modulation can provide uniformly in the light bar output. The experimental results show the proposed Double Pulse Width Modulation (DPWM) method can alleviate the problem from divergence of the light bars and thus can generate more uniform light output on LCDs.

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