Experimental research on high-power converters, particularly in an academic environment, faces severe infrastructural constraints. Usually, power source and loads of required ratings are not available. Further, more importantly, the energy consumption is huge. One possibility is to establish an experimental research platform, comprising of a network of high-power converters, through which power is circulated and which draws only the losses from the mains. This work deals with the establishment of a circulating power test set-up, comprising of two line-side PWM converters, inclusive of control and modulation methods for the two converters. Two types of circulating power test setups are developed. In the first setup, the converters are connected in parallel, on ac as well as dc sides, such that real and/or reactive power is circulated between them. In the second test setup, the dc buses of the converters are separated; hence, only reactive power circulation is possible. These setups are used to conduct heat-run tests with low energy expenditure on the PWM converters at various operating conditions up to power levels of 150 kVA. Further, these are used to validate analytically-evaluated thermal characteristics of high-power PWM converters. A safe thermal limit is derived for such converters in terms of apparent power (kVA) handled, power factor and switching frequency. The effects of voltage sag and of unequal current sharing between parallel IGBT modules on the safe thermal limit are studied. While the power drawn by the circulating-power setup from the grid is much lower than the ratings of the individual converters, the harmonic injection into the mains by the setup could be significant since the harmonics drawn by both converters tend to add up. This thesis investigates carrier interleaving to improve the waveform quality of grid current, drawn by the circulating-power test setup. The study of carrier interleaving is quite general and covers various applications of parallel-connected converters such as unity power factor rectification, static reactive power compensation and grid-connected renewable energy systems. In literature, carrier interleaving has been employed mainly for unity power factor rectifiers, sharing a common dc load equally. In such case, the fundamental components of the terminal voltages of the parallel converters are equal. However, when the power sharing between the two converters is unequal, or when power is circulated between the two converters, the terminal voltages of the two converters are not equal. A method to estimate rms grid current ripple, drawn by parallel-connected converters with equal and/or unequal terminal voltages, in a synchronous reference frame is presented. Further, the influence of carrier interleaving on the rms grid current ripple is studied. The optimum interleaving angle, which minimizes the rms grid current ripple under various applications, is investigated. This angle is found to be a function of modulation index of the converters in the equal terminal voltages case. In the unequal terminal voltages case, the optimum interleaving angle is shown to be a function of the average modulation index of the two parallel converters. The effect of carrier interleaving is experimentally studied on the reactive power circulation setup at different values of kVA and different dc bus voltages. The grid current ripple is measured for different values of interleaving angle. It is found experimentally that the optimum interleaving angle reduces the rms grid current ripple by between 37% and 48%, as compared without interleaving, at various operating conditions. Further, the reactive power circulation test set-up is used to evaluate and compare power conversion losses corresponding to different PWM techniques such as conventional space-vector PWM (CSVPWM), bus-clamping PWM (BCPWM) and advanced bus-clamping PWM methods for static reactive power compensator (STATCOM) application at high power levels. It is demonstrated theoretically as well as experimentally that an advanced bus-clamping PWM method, termed minimum switching loss PWM (MSLPWM), leads to significantly lower power conversion loss than CSVPWM and BCPWM techniques at a given average switching frequency.

Η παρούσα διπλωματική εργασία πραγματεύεται τη μελέτη, το σχεδιασμό, την πρσοομοίωση και την κατασκευή κυκλώματος για την οδήγηση και τον έλεγχο στροφών κινητήρα τύπου DC Brushless.Η εργασία αυτή εκπονήθηκε στο εργαστήριο Ηλεκτρομηχανικής Μετατροπής Ενέργειας του τμήματος Ηλεκτρολόγων Μηχανικών και Τεχνολογίας Ηλεκτρονικών Υπολογιστών. Σκοπός της παρούσας εργασίας είναι η μελέτη και η κατασκευή κυκλώματος τριφασικού αντιστροφέα ισχύος για να επιτύχουμε οδήγηση και έλεγχο κινητήρα τύπου DC Brushless. Ο κινητήρας αυτού του τύπου είναι Σύγχρονος κινητήρας Μόνιμου Μαγνήτη. Για το λόγο αυτό το πρώτο πράγμα που μελετήθηκε στην παρούσα εργασία είναι κάποιες θεμελιώδεις ιδιότητες του μαγνητικού πεδίου, καθώς και τα χαρακτηριστικά των μαγνητικών υλικών που χρησιμοποιούνται σε τέτοιους τύπους κινητήρων. Στην συνέχεια αναλύονται οι κινητήρων Brushless DC ως προς την κατασκευή τους καθώς και τη λειτουργία τους. Παρατίθενται οι εξισώσεις που περιγράφουν τη λειτουργία τους και οι χαρακτηριστικές ροπής-ταχύτητας και επιπλέον γίνεται σύγκριση αυτών με κινητήρες άλλων τύπων. Ακολουθεί η περιγραφή της προσομοίωσης του συστήματος η οποία πραγματοποιήθηκε στο πρόγραμμα προσομοίωσης ηλεκτρικών κυκλωμάτων Simulink του Matlab. Αναλύεται η λογική στην οποία βασιστήκαμε για την προσομοίωση και παρατίθενται οι κυματομορφές της τάσης και του ρεύματος σε διάφορα σημεία του κυκλώματος. Έπειτα γίνεται μια θεωρητική ανάλυση του κυκλώματος του αντιστροφέα που κατασκευάστηκε καθώς και όλων των άλλων κυκλωμάτων και στοιχείων που απαιτήθηκαν για τη λειτουργία της διάταξης. Επιπλέον περιγράφεται η μέθοδος παλμοδότησης που χρησιμοποιήθηκε για την έναυση/σβέση των διακοπτικών στοιχείων ισχύος. Τέλος γίνεται αναλυτική παράθεση του τελικού κυκλώματος που κατασκευάστηκε. Προχωράμε με την περιγραφή των ιδιοτήτων και δυνατοτήτων του μικροελεγκτή που χρησιμοποιήθηκε στην πλακέτα μας, καθώς επίσης και με τη λογική που ακολουθήθηκε κατά τον προγραμματισμό του. Τέλος παραθέτονται τα αποτελέσματα των πειραμάτων και τα παλμογραφήματα που ελήφθησαν κατά τη διεξαγωγή τους. Γίνεται σχολιασμός των αποτελεσμάτων αυτών και αξιολόγηση της κατασκευής. / This thesis is focused in the study and development of a Drive System for a DC Brushless motor. This work was conducted in the Laboratory of Electromechanical Energy Conversion, at the department of Electrical and Computer Engineering, in the University of Patras, Greece. DC Brushless motors, have been used in the last years they are used in a number of applications. They combine all the benefits of a DC motor, such as their operation simplicity and their linear characteristics, avoiding the brushes and the necessary excitation of DC motors, making them a suitable choice for low and medium power applications. The main purpose of this project is the Study and Construction of a Three-Phase Voltage Source Inverter for the control of the performance of a DC Brushless Motor by the implementation of a Scalar control. This thesis began with the simulation of the motor, since it is necessary for the understanding of its dynamic behavior. Then an analysis on the design and construction of the required circuit boards is done. Finally the used microcontroller (dsPIC family) was studied thoroughly, before writing the necessary code(C & assembly) for open and closed loop control. Finally, measurements were taken for the open loop control system. Conclusions were made as far as the behavior of the motor and ways to optimize the control were discussed.

<div> Recent advancements of health monitoring sensing technologies are enabling plethora of new applications in a variety of biomedical areas. In this work, we present a new sensing technology that enables a fully autonomous monitoring of urinary tract infection (UTI). UTI is the second most common infection in the human body caused by bacterial pathogens, and costs millions of dollars each year to the patients and the health care industry. UTI is easily treatable using antibiotics if identified in early stages. However, when early stage identification is missed, UTI can be a major source of serious complications such as ascending infections, loss of kidney function, bacteremia, and sepsis. Unfortunately, the limitations of existing UTI monitoring technologies such as high cost, time-intensive sample preparation, and relatively high false alarm rate prohibit reliable detection of UTI in early stages. The problem becomes more serious in certain patient groups such as infants and geriatric patients suffering from neurodegenerative diseases, who have difficulties in realizing the symptoms and communicating the symptoms with their caregivers. In addition to the aforementioned difficulties, the fact that UTI is often asymptomatic makes early stage identifications quite challenging, and the reliable monitoring and detection of UTI in early stages remain as a serious problem.</div><div> To address these issues, we propose a diaper-embedded, self-powered, and fully autonomous UTI monitoring sensor module that enables autonomous monitoring and detection of UTI in early stages with minimal effort. The sensor module consists of a paper-based colorimetric nitrite sensor, urine-activated batteries, a boost dc-dc converter, a low-power sensor interface utilizing pulse width modulation, a Bluetooth low energy module for wireless transmission, and a software performing calibration at run-time. </div><div> To further optimize the sensor module, a new fully integrated DC-DC converter with low-profile and low ripple is developed. The proposed DC-DC converter maintains an extremely low level of output voltage ripples in the face of different battery output voltages, which is crucial for realizing low-noise sensor interfaces. Since the DC-DC converter is a part of a module embedded into a diaper, it is highly desirable for the DC-DC converter to have a small physical form factor in both area and height. To address this issue, the proposed DC-DC converter adopts a new charge recycling technique that enables a fully integrated design without utilizing any off-chip components. In addition, the DC-DC converter utilizes sub-module sharing techniques – multiple modules share a voltage buffer and a recycle capacitor to reduce power consumption and save chip area. The DC-DC converter provides a regulated voltage of 1.2V and achieves a maximum efficiency of 80% with a 300ohm load resistance. The output voltage ripple is in the range of 19.6mV to 26.6mV for an input voltage ranging from 0.66 to 0.86V.<br></div>

Near-field wireless power transfer (WPT) technology facilitates the energy autonomy of heterogeneous systems, significantly augmenting complementary metal-oxide-semiconductor field-effect-transistor (CMOS) technology. In low-power wearable devices, existing power conditioning integrated circuits do not maximize the power factor (PF) for rectification and power conversion efficiency (PCE) due to multiple conversion. Additionally, there is no core power management for the entire power flow. The majority of the research focuses on active rectifiers, which reduce the turn-on voltage for rectification. Certain studies target the output voltage regulation via feedback to the transmitter or direct battery charging without power maximization. Firstly, this study investigates a high-power factor WPT front-end circuit that is namely the mono-periodic switching rectifier (MPSR) and implemented in a 0.18µm 1.8V/5V CMOS process. Integrated phase synchronizers are used to align the waveshape of a wirelessly-coupled sinusoidal voltage source in a receiving coil to the corresponding conducting current. Using this approach, the PF can be increased from roughly 0.6 to unity without requiring any wireless or wired feedback to the transmitter. The proposed MPSR can also provide AC-DC rectification, and step up and down the sinusoidal voltage source's peak amplitude using a pulse-width modulator. Measured voltage conversion ratios range between 0.73X and 2X, and the PF can be boosted up to unity. Secondly, the wireless power system-on-chip (WPower-SoC) is proposed and implemented in a 0.18µm 1.8V/3.3V CMOS process. The WPower-SoC integrating power management can provide rectification, output voltage regulation, and battery charging. Additionally, the implementation of feedforward envelope detection (FED) can reduce the variation in a wireless power link and improve load transient responses. Simulated results demonstrate that 5% of the output voltage regulation is improved when an output load changes. Moreover, the FED reduces approximately 40% of the transient response time. Overshoot and undershoot voltages are decreased by 23% and 26.5%, respectively. The measured output voltage regulates at 3.42V and can supply output power up to 342mW. A temperature sensor as part of the power management core remains active when the WPT receivers enter sleep mode to prolong the battery usage time. In the final part of this study, a nano-watt high-accuracy temperature sensing core is implemented in a 0.18µm 1.8V/3.3V CMOS process that can self-compensate the temperature shift without the need for additional compensating techniques that consume extra power.

De nombreux systèmes utilisent des convertisseurs électroniques de puissance fonctionnant en modulation de largeur d'impulsions (MLI) comme organe de réglage ou de commande. On peut en particulier citer les entraînements à vitesse variable, les alimentations à découpage ou les filtres actifs. L'objectif du travail est de contribuer à l'étude en temps discret du fonctionnement de ces systèmes lorsqu'ils sont munis d'une commande numérique dont la période d'échantillonnage est synchronisée sur la période de modulation de largeur d'impulsions. Pour cela nous avons développé une méthode originale qui consiste à écrire les équations différentielles qui décrivent la dynamique du système en remplaçant sur chaque période de modulation les fonctions binaires qui représentent les états successifs (ON ou OFF) des semi-conducteurs de puissance par un développement limité en série de Fourier. En introduisant de manière judicieuse dans les équations différentielles du système, des termes harmoniques des fonctions binaires qui décrivent les états des interrupteurs, cette manière de procéder nous a permis de décomposer l'étude en deux étapes : · dans une première étape en limitant le développement en série de Fourier des fonctions binaires décrivant les états des interrupteurs à leur premier terme (c'est-à-dire à leurs valeurs moyennes) nous avons construit un modèle discret d'ordre zéro qui rend compte de l'effet moyen de la découpe MLI, · dans une deuxième étape nous avons construit un modèle dynamique approché de l'écart existant entre le modèle d'ordre zéro et le modèle détaillé du système. Ce modèle fournit une bonne estimation des ondulations induites par la découpe MLI dans les grandeurs du système. Pour le cas des entraînements par moteurs synchrones à aimants permanents alimentés par onduleurs de tension nous avons ainsi pu mettre en évidence que l'étude de la stabilité des boucles des courants du moteur à partir du modèle d'ordre zéro reste valable en présence des ondulations dues à la MLI pour autant qu'on utilise une MLI symétrique avec rafraîchissement des références une fois par période. / Nowadays, a large number of systems are using Pulse Width Modulation (PWM) Power Electronic Converters as control part. These systems can, for example, be variable-speed drives, switching power supplies or active filters. The goal of this work is to contribute to the study of operation of this type of system when they are equipped with a digital control part of which the sampling period is synchronized on the modulation one. After having shown how the equations of these systems can be written down and indicated how their evolution in closed loop operation can be described by using iterative maps, we have tried to develop an approach which allows simplifying this study. The iterative map method has been used in order to take into account the “sequential “character of these systems, i.e. the fact that the control signals are sequences of events which correspond to the changes of the state of the converter semiconductor switches. Therefore we have developed an original method which consists in replacing on each modulation period, in the differential equations describing the system dynamics, the binary functions representing the successive ON or OFF states of the power semiconductors, by a limited Fourier series development of these functions. This method has allowed splitting the study of these systems into two steps: • in the first step a “zero order” model was built. This first model, which provides the average effect of the PWM pulse pattern, has been obtained by limiting the Fourier series development of the binary functions describing the states of the converter switches, to their first term, the one corresponding to their average values on the PWM period, • in the second step we have introduced an approached dynamic model characterising the error between the zero order model and the exact model of the system. This model was built by considering a well chosen number of harmonic terms of the binary functions describing the ON-OFF states of the switches in the differential equations of the system. By combining the error model and the zero order model we have been able to estimate in which measure the ripples induced by the PWM modulation affect the results of the system stability study made by using the zero order model. For the case of Permanent Magnets Synchronous Motors fed by Voltage Source Inverters we have shown that the study of the stability of the motor currents loops made with the zero order model remains valid in the presence of ripples induced by the PWM, as long as a symmetrical modulation is used, with references which are refreshed one time on each switching period.

An efficient Light Emitting Diode (LED) lamp driver circuit is proposed for retrofitting the conventionally used incandescent lamps with existing TRIAC dimmer. The dimming feature in a wide range of firing angle from 30¢X to 130¢X can be accomplished by means of double pulse-width modulation (DPWM) and analog current regulation. The LED lamp driver adopts a flyback converter with an auxiliary active power MOSFET for synchronous switch and an associated inductor for zero voltage switching (ZVS), leading to lower switching loss and thus achieving a higher circuit efficiency. In the thesis, the mode operation of the driver circuit is analyzed and the design equations are derived accordingly. A laboratory circuit is designed for an 50 W LED lamp which is composed of 45 high-brightness white LEDs in series. Experiments are carried out to test the circuit performances with two dimming schemes. The experimental results indicate that the driver can achieve a circuit efficiency of 95 % at the rated output. When the LED lamp is dimmed, the circuit efficiency with DPWM is higher than that with the analog current regulation. On the other hand, the LED lamp dimmed by analog current regulation has a higher efficiency but a less color shift by DPWM.

In this thesis, the conventional pulse-width modulated (PWM) and zero-voltage switching (ZVS) quasi-resonant buck converters are analyzed and a variable-frequency control technique is proposed to regulate the output voltage due to the immediate input line and load changes. The quasi-resonant technique provides favorable switching conditions for active switch to reduce switching losses and electromagnetic interference (EMI). The method is based on shaping the voltage across the active switch in quasisinusoidal fashion and the switching action occurs with nearly zero voltage across the active switch. This requires only two additional components to the conventional PWM buck converter. The proposed quasi-resonant converter is capable of operating in megahertz range with a significant improvement in performance and power density. Detailed analytic and small-signal models of the ZVS quasi-resonant buck converter are established and the switching behavior is investigated in order to provide nearly zerovoltage turn-on. The performance of the ZVS quasi-resonant technique is verified with the computer simulations. The results are compared with the experiments in the laboratory involving both the open-loop and closed-loop operations. The detailed experiment procedure is added to use this converter for educational purposes.

This research work is devoted to the design, development and implementation of a Current Source Converter (CSC) based Active Power Filter (APF) for Medium Voltage (MV) applications. A new approach has been proposed to the design of the CSC based APF for reducing the converter kVA rating considerably. This design approach is called the Selective Harmonic Amplification Method (SHAM), and is based on the amplification of some selected harmoniccurrent components of the CSC by the input filter, and the CSC control system, which is specifically designed for this purpose. The proposed SHAM has been implemented on the first industrial CSC based APF for the elimination of 11th and 13th current harmonics of 12-pulse rectifiers fed from Medium Voltage (MV) underground cables in order to comply with IEEE Std. 519-1992. 450 kVA rated APF with only 205 kVA CSC rating has been connected to the MV bus via a coupling transformer of 600kVA, 34.5/1.1 kV. The power stage of the CSC based APF is composed of water-cooled high voltage IGBT and diode modules. Reference currents to be generated by the CSC are obtained by the use of a selective harmonic extraction method, by mploying synchronously rotating reference frames for each selected harmonic component. An Active damping method is also used to suppress the oscillations around the natural frequency of the input filter, excluding the harmonic components to be eliminated by APF. Simulation and field test results have shown that SHAM can successfully be applied to a CSC based APF for reduction of converter kVA rating, thus making it a cost- competitive alternative to voltage source converter based APFs traditionally used in industry applications.

Harmonic distortions are inevitably caused by a rectifier and an inverter due to their inherent nonlinearities. An AC-DC-AC converter, configured by the series connection of a rectifier, DC link, and an inverter, induces harmonic distortions at both AC sides and at the DC link. These harmonics can nonlinearly interact or modulate the fundamental frequencies at the AC sides to cause interharmonic distortions. Harmonic and interharmonic distortions can seriously hamper the normal operation of the power system by means of side effects such as excitation of undesirable electrical and/or mechanical resonances, misoperation of control devices, and so forth. This dissertation presents effective methodologies to mitigate harmonic and interharmonic distortions by applying dithered pulse-width modulated (PWM) signals to a voltage-sourced inverter (VSI) type adjustable speed drive (ASD). The proposed methods are also efficient because the dithering applications are performed on control signals without the need for additional devices. By the help of dithering, the rejection bandwidth of a harmonic filter can be relaxed, which enables a lower-order configuration of harmonic filters. First, this dissertation provides a dithering application on gating signals of a sinusoidal PWM (SPWM) inverter in the simulated VSI-ASD model. The dithering is implemented by adding intentional noise into the SPWM process to randomize rising and falling edges of each pulse in a PWM waveform. As a result of the randomized edges, the periodicity of each pulse is varied, which result in mitigated harmonic tones. This mitigation of PWM harmonics also reduces associated interharmonic distortions at the source side of the ASD. The spectral densities at harmonic and interharmonic frequencies are quanti fied by Fourier analysis. It demonstrates approximately up to 10 dB mitigation of harmonic and interharmonic distortions. The nonlinear relationship between the mitigated interharmonics and harmonics is confirmed by cross bicoherence analysis of source- and DC-side current signals. Second, this dissertation proposes a dithered sigma-delta modulation (SDM) technique as an alternative to the PWM method. The dithering method spreads harmonic tones of the SD M bitstream into the noise level. The noise-shaping property of SDM induces lower noise density near the fundamental frequency. The SDM bitstream is then converted into SDM waveform after zero-order interpolation by which the noise-shaping property repeats at every sampling frequency of the bitstream. The advantages of SDM are assessed by comparing harmonic densities and the number of switching events with those of SPWMs. The dithered SD M waveform bounds harmonic and noise densities below approximately -30 dB with respect to the fundamental spectral density without increasing the number of switching events. Third, this dissertation provides additional validity of the proposed method via hardware experiments. For harmonic assessment, a commercial three-phase inverter module is supplied by a DC voltage source. Simulated PWM signals are converted into voltage waveforms to control the inverter. To evaluate interharmonic distortions, the experimental configuration is extended to a VSI-ASD model by connecting a three-phase rectifier to the inverter module via a DC link. The measured voltage and current waveforms are analyzed to demonstrate coincident properties with the simulation results in mitigating harmonics and interharmonics. The experimental results also provide the efficacy of the proposed methods; the dithered SPWM method effectively mitigates the fundamental frequency harmonics and associated interharmonics, and the dithered SDM reduces harmonics with the desired noise-shaping property. / text

The dissertation documents research work carried out on Pulse Width Modulation (PWM) strategies for hard switched Voltage Source Inverters (VSI) for variable speed electric drives. This research is aimed at Hybrid Electric Vehicles (HEV). PWM is at the heart of all variable speed electric drives; they have a huge influence on the overall performance of the system and may also help eventually give us an extra degree of freedom in the possibility to rethink the inverter design including the re-dimensioning of the inverter components.HEVs tend to cost more than conventional internal combustion engine (ICE) vehicles as they have to incorporate two traction systems, which is the major discouraging factor for consumers and in turn for manufacturers. The two traction system increases the maintenance cost of the car as well. In addition the electric drives not only cost extra money but space too, which is already scarce with an ICE under the hood. An all-electric car is not yet a viable idea as the batteries have very low energy density compared with petrol or diesel and take considerable time to charge. One solution could be to use bigger battery packs but these add substantially to the price and weight of the vehicle and are not economically viable. To avoid raising the cost of such vehicles to unreasonably high amounts, autonomy has to be compromised. However hybrid vehicles are an important step forward in the transition toward all-electric cars while research on better batteries evolves. The objective of this research is to make electric drives suitable for HEVs i.e. lighter, more compact and more efficient -- requiring less maintenance and eventually at lower cost so that the advantages, such as low emissions and better fuel efficiency, would out-weigh a little extra cost for these cars. The electrical energy source in a vehicle is a battery, a DC Voltage source, and the traction motor is generally an AC motor owing to the various advantages it offers over a DC motor. Hence the need for a VSI, which is used to transform the DC voltage into AC voltage of desired amplitude and frequency. Pulse width modulation techniques are used to control VSI to ensure that the required/calculated voltage is fed to the machine, to produce the desired torque/speed. PWM techniques are essentially open loop systems where no feedback is used and the instantaneous values differ from the required voltage, however the same average values are obtained. Pulse width modulated techniques produce a low frequency signal (desired average value of the switched voltage) also called the fundamental component, along with unwanted high frequency harmonics linked to the carrier signal frequency or the PWM period. In modern cars we see more and more mechanical loads driven by electricity through digital processors. It is very important to eliminate the risk of electromagnetic interference between these systems to avoid failure or malfunction. Hence these unwanted harmonics have to be filtered so that they do not affect the electronic control unit or other susceptible components placed in the vicinity. Randomised modulation techniques (RPWM) are used to dither these harmonics at the switching frequency and its multiple. In this thesis a random modulator based on space vector modulation is presented which has additional advantages of SVM. Another EMI problem linked to PWM techniques is that they produce common mode voltages in the load. For electric machines, common mode voltage produces shaft voltage which in turn provokes dielectric stress on the motor bearings, its lubricant and hence the possibility of generating bearing currents in the machine that can be fatal for the machine. To reduce the common mode voltage a space vector modulation strategy is developed based on intelligent placement of zero vectors. (...)