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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
241

Um algoritmo formal para remoção de redundâncias / A formal algorithm for redundancy removal

Marques, Felipe de Souza January 2003 (has links)
Os algoritmos para síntese de circuitos digitais em geral visam a melhoria de uma função de custo composta de quatro critérios: área, desempenho, potência e testabilidade. Normalmente estes algoritmos conseguem uma relação de compromisso para a otimização de dois critérios. Efeitos indesejáveis também podem surgir com a otimização de um destes critérios. Por exemplo, as otimizações de desempenho podem introduzir falhas de colagem não testáveis (redundâncias) em um circuito, reduzindo a sua testabilidade. Muitos algoritmos de síntese lógica exploram propriedades específicas de determinadas funções a serem sintetizadas. Um exemplo de função com propriedades específicas são as funções ditas unate. Um exemplo deste tipo de função é o sinal de carry de um somador completo. Este tipo de função exige cuidados especiais para evitar a introdução de redundâncias. Muitos dos algoritmos para síntese lógica empregam a decomposição de Shannon para melhorar o desempenho de um circuito. A equação geral da decomposição de Shannon é expressa através de uma função binate. As redundâncias sempre serão introduzidas nos circuitos quando uma equação binate é utilizada para representar uma função unate. Diagramas de Decisão Binária (BDDs) são um tipo estruturas de dados muito utilizadas em algoritmos para síntese lógica. A decomposição de Shannon também é utilizada para derivar circuitos a partir de BDDs. Este tipo de estrutura representa uma função lógica, mas não mantém uma representação sem redundâncias da mesma. Infelizmente, os circuitos derivados a partir desta estrutura poderão ser redundantes, principalmente quando a decomposição de Shannon for utilizada. Existem estruturas de dados capazes de representar uma função sem redundâncias. Este é o caso dos VPBDDs , que possuem propriedades especiais que preservam características de testabilidade da função representada. Baseando-se nas propriedades dos VPBDDs, um novo algoritmo para remoção de redundâncias foi proposto. Este algoritmo é capaz de gerar circuitos sem redundâncias, mesmo quando a função, que é representada pelo VPBDD, é unate. Além da geração de circuitos sem redundâncias, o algoritmo garante que o atraso do circuito não aumenta após a remoção de redundâncias. A área dos circuitos resultantes pode aumentar, diminuir ou permanecer a mesma, considerando o número de portas lógicas utilizadas. Todos os resultados obtidos neste trabalho mostram que o algoritmo consegue realizar a remoção de redundâncias, sem prejudicar o atraso do circuito. Além disso, todos os caminhos redundantes do circuito têm seu atraso reduzido, pois com a remoção de redundâncias o número de portas lógicas em série é reduzido. A aplicação deste algoritmo apresenta bons resultados para circuitos aritméticos. Isto se deve principalmente ao fato do carry ser uma função unate, o que pode introduzir redundâncias no circuito se esta propriedade (de ser unate) não for tratada adequadamente. O algoritmo proposto também abre possibilidades para a criação de outras ferramentas de CAD, como por exemplo: uma ferramenta para análise de timing, um gerador de circuitos aritméticos sem redundâncias, ou ainda uma ferramenta para geração de teste, incluindo lista de falhas, vetores de teste e cobertura de falhas. / Algorithms for digital circuit design aim the reduction of a cost function composed of four criteria: area, delay, power and testability. Usually these algorithms are able to obtain a trade-off for the optimization of two of these criteria. Undesired effects may occur due to the optimization of one of the criteria. For instance, delay optimizations may introduce non testable stuck-at faults (redundancies) in a circuit, this way reducing its testability. Several logic synthesis algorithms exploit specific properties of the logic functions to be synthesized. One example of function with specific properties are the socalled unate functions. An example of this kind of function is the carry-out sign in a full adder circuit. This kind of function require special care in order to avoid redundancy introduction. Shannon decomposition [SHA 38] is used in many logic synthesis algorithms for improving circuit performance. The general case of the Shannon decomposition is represented by a binate (not unate) equation. Redundancies are introduced in a circuit when a binate equation is used to express a unate function. Binary Decision Diagrams (BDDs) are a kind of data structures widely used in the field of logic synthesis. Shannon decomposition is also used to derive circuits from BDDs. This data structure is used to represent logic functions, but it is not able to maintain an irredundant representation of any logic function. Unfortunately, circuits derived from BDDs will possibly have redundancies, specially when Shannon decomposition is used. Some data structures are able to represent any logic function in a irredundant form. This is the case of the VPBDDs [REI 95a] [REI 2000], which have special properties that preserve the testability properties of the functions being represented. Based on VPBDD properties, a novel algorithm for redundancy removal was proposed [MAR 2002]. This algorithm is able to generate irredundant circuits even when the function represented by the VPBDD is unate. In addition to the generation of irredundant circuits, the algorithm guarantees that the circuit delay will not be increased by redundancy removal. The final area may be increased, reduced or even remain the same, considering the number of logic gates. The results obtained in this work indicate that the algorithm is able to perform redundancy removal without increasing the circuit delay. Besides, all the redundant paths in the circuit have their delay reduced, as the number of logic gates in series will be reduced by the redundancy removal process. The application of this algorithm gives good results for arithmetic circuits. This is mainly due to the fact that the carry chain is composed of unate functions, this way redundancies are introduced in the circuit if this property is not adequately treated. The proposed algorithm allows for the creation of other CAD tools, as for instance: a timing analysis tool, a generator of irredundant arithmetic circuits, or even a test generation tool, including list of faults, test vectors as well as fault coverage.
242

Highly redundant and fault tolerant actuator system : control, condition monitoring and experimental validation

Antong, Hasmawati P. January 2017 (has links)
This thesis is concerned with developing a control and condition monitoring system for a class of fault tolerant actuators with high levels of redundancy. The High Redundancy Actuator (HRA) is a concept inspired by biomimetics that aims to provide fault tolerance using relatively large numbers of actuation elements which are assembled in parallel and series configurations to form a single actuator. Each actuation element provides a small contribution to the overall force and displacement of the system. Since the capability of each actuation element is small, the effect of faults within the individual element of the overall system is also small. Hence, the HRA will gracefully degrade instead of going from fully functional to total failure in the presence of faults. Previous research on HRA using electromechanical technology has focused on a relatively low number of actuation elements (i.e. 4 elements), which were controlled with multiple loop control methods. The objective of this thesis is to expand upon this, by considering an HRA with a larger number of actuation elements (i.e. 12 elements). First, a mathematical model of a general n-by-m HRA is derived from first principles. This method can be used to represent any size of electromechanical HRA with actuation elements arranged in a matrix form. Then, a mathematical model of a 4-by-3 HRA is obtained from the general n-by-m model and verified experimentally using the HRA test rig. This actuator model is then used as a foundation for the controller design and condition monitoring development. For control design, two classical and control method-based controllers are compared with an H_infinity approach. The objective for the control design is to make the HRA track a position demand signal in both health and faulty conditions. For the classical PI controller design, the first approach uses twelve local controllers (1 per actuator) and the second uses only a single global controller. For the H_infinity control design, a mixed sensitivity functions is used to obtain good tracking performance and robustness to modelling uncertainties. Both of these methods demonstrate good tracking performance, with a slower response in the presence of faults. As expected, the H_infinity control method's robustness to modelling uncertainties, results in a smaller performance degradation in the presence of faults, compared with the classical designs. Unlike previous work, the thesis also makes a novel contribution to the condition monitoring of HRA. The proposed algorithm does not require the use of multiple sensors. The condition monitoring scheme is based on least-squares parameter estimation and fuzzy logic inference. The least-squares parameter estimation estimates the physical parameters of the electromechanical actuator based on input-output data collected from real-time experiments, while the fuzzy logic inference determines the health condition of the actuator based on the estimated physical parameters. Hence, overall, a new approach to both control and monitoring of an HRA is proposed and demonstrated on a twelve elements HRA test rig.
243

REDUNDANT FIRMWARE TEST SETUP IN SIMULATION AND HARDWARE: A FEASIBILITY STUDY

Ekström, Per, Eriksson, Elisabeth January 2018 (has links)
A reliable embedded real-time system has many requirements to fulfil. It must meet target deadlines in a number of situations, most of them in a situation that puts heavy stress on the system. To meet these demands, numerous tests have been created which test the hardware for any possible errors the developers might think of, in order to maximise system reliability and stability. These tests will take a lot of time to execute, and as system complexity grows, more tests are introduced leading to even longer testing times. In this thesis, a method to reduce the testing time of the software and, to a lesser extent, the hardware is examined. By using the full system simulator Simics, an existing industry system from ABB was integrated and tests were performed. A proof of concept test suite for automatic redundancy tests was also implemented. By looking at the test results, it was concluded that the method shows promise. However, problems with the average latency and performance troubles with Simics shows that more work must be put into this research before the system can be run at full speed.
244

Composition et fonctionnement d'une communauté microbienne au sein d'un drainage minier acide : approches culturales et fonctionnelles / Composition and functioning of a microbial community in an acid mine drainage : cultural and functional approaches

Delavat, François 05 October 2012 (has links)
Le drainage minier acide de Carnoulès est caractérisé par un pH très acide et une forte concentration en métaux et en arsenic. Par différentes approches moléculaires, des études précédentes ont montré une faible biodiversité et ont permis d'établir un modèle de fonctionnement de la communauté bactérienne. Le but de ce travail de thèse a été de préciser la composition et le fonctionnement de cette communauté bactérienne, en utilisant pour cela des approches culturales et fonctionnelles, en se focalisant particulièrement sur le recyclage de la matière organique. L'élaboration de différents milieux a permis l'isolement de 49 souches bactériennes appartenant à 19 genres, augmentant ainsi de 10 % la diversité bactérienne détectée à Carnoulès par rapport aux approches métagénomiques précédentes. Parmi les 19 genres, 3 sont nouveaux dont un, inféodé aux écosystèmes acides, a été caractérisé taxonomiquement et dénommé Acidiminas carnoulesii. La capacité de l'isolat Q8 appartenant au genre Paenibacillus à dégrader I'amidon et la xylane, dans de larges gammes de pH et de concentrations en arsenic, a permis d'attribuer à Paenibacillus un rôle dans la résilience de la communauté pour ces fonctions. Un criblage fonctionnel de I'ADN de Q8 dans Escherichia coli apermis d'isoler les gènes codant les protéines de dégradation de ces polymères. Par ailleurs, un criblage de 80000 clones de la banque d'ADN métagénomique de Carnoulès a permis la détection de 28 clones positifs pour l'activité amylolytique. Deux protéines ne présentant aucune similarité de séquence avec des amylases connues ont été caractérisées in vitro, confirmant leurs activités amylolyiques et démontrant que la bioprospection dans des sites a priori incongrus, autorise des découvertes insoupçonnées. Ces travaux ont ainsi permis de montrer que les approches culturales et fonctionnelles apportent des informations nouvelles par rapport à celles obtenues par les approches moléculaires. La complémentarité de ces approches est vérifiée, et elle apparaît indispensable dans l'analyse de la complexité des écosystèmes. Cependant, la compréhension de leur fonctionnement exigera des efforts redoublés. / The Carnoulès acid mine drainage is characterized by an acidic pH and high metal and arsenic concentrations. Based on the low bacterial biodiversity, molecular approaches allowed the determination of a bacterial community functioning model. The aim of the PhD work was to clariff both the composition andthe functioning of this community, using cultural and functional approaches, focusing on the organic matter recycling. Different media were designed that allowed the isolation of 49 bacterial strains belonging to 19 genera,leading to a 70 o  increase in the bacterial diversity compared with previous metagenomic approaches. Among the 19 genera,3 are new, one of which, a previously uncultured genus frequently detected in acidic environments, has been taxonomically characterized and named Acidiminos cornoulesii.The ability of strain Q8, belonging to the genus Paenibacillus, to degrade starch and xylan over a wide rangeof pH values as well as 4rsenic concentrations allows to assign to Paenibacillus a role in the resilience of the community for these functions. A function-based screening of the Q8-DNA in Escherichia coli led to isolatethe genes encoding the polymer-degrading proteins.Moreover, a function-based screening of 80,000 clones from a Carnoulès metagenomic DNA library led to the detection of 28 positive clones for the amylolyic activity. Two proteins sharing no sequence similarity with known amylases were characterized in vitro, demonstrating that bioprospecting in a priori incongruous sites can lead to unsuspected discoveries.These works show that new informations using cultural and functional approaches can be obtained compared to those gained with molecular approaches. Results confirmed the complementarity between both approachesis crucial to analyze complex ecosystems. Nevertheless, more research efforts still have to be undertaken tounderstand their functioning.
245

Um algoritmo formal para remoção de redundâncias / A formal algorithm for redundancy removal

Marques, Felipe de Souza January 2003 (has links)
Os algoritmos para síntese de circuitos digitais em geral visam a melhoria de uma função de custo composta de quatro critérios: área, desempenho, potência e testabilidade. Normalmente estes algoritmos conseguem uma relação de compromisso para a otimização de dois critérios. Efeitos indesejáveis também podem surgir com a otimização de um destes critérios. Por exemplo, as otimizações de desempenho podem introduzir falhas de colagem não testáveis (redundâncias) em um circuito, reduzindo a sua testabilidade. Muitos algoritmos de síntese lógica exploram propriedades específicas de determinadas funções a serem sintetizadas. Um exemplo de função com propriedades específicas são as funções ditas unate. Um exemplo deste tipo de função é o sinal de carry de um somador completo. Este tipo de função exige cuidados especiais para evitar a introdução de redundâncias. Muitos dos algoritmos para síntese lógica empregam a decomposição de Shannon para melhorar o desempenho de um circuito. A equação geral da decomposição de Shannon é expressa através de uma função binate. As redundâncias sempre serão introduzidas nos circuitos quando uma equação binate é utilizada para representar uma função unate. Diagramas de Decisão Binária (BDDs) são um tipo estruturas de dados muito utilizadas em algoritmos para síntese lógica. A decomposição de Shannon também é utilizada para derivar circuitos a partir de BDDs. Este tipo de estrutura representa uma função lógica, mas não mantém uma representação sem redundâncias da mesma. Infelizmente, os circuitos derivados a partir desta estrutura poderão ser redundantes, principalmente quando a decomposição de Shannon for utilizada. Existem estruturas de dados capazes de representar uma função sem redundâncias. Este é o caso dos VPBDDs , que possuem propriedades especiais que preservam características de testabilidade da função representada. Baseando-se nas propriedades dos VPBDDs, um novo algoritmo para remoção de redundâncias foi proposto. Este algoritmo é capaz de gerar circuitos sem redundâncias, mesmo quando a função, que é representada pelo VPBDD, é unate. Além da geração de circuitos sem redundâncias, o algoritmo garante que o atraso do circuito não aumenta após a remoção de redundâncias. A área dos circuitos resultantes pode aumentar, diminuir ou permanecer a mesma, considerando o número de portas lógicas utilizadas. Todos os resultados obtidos neste trabalho mostram que o algoritmo consegue realizar a remoção de redundâncias, sem prejudicar o atraso do circuito. Além disso, todos os caminhos redundantes do circuito têm seu atraso reduzido, pois com a remoção de redundâncias o número de portas lógicas em série é reduzido. A aplicação deste algoritmo apresenta bons resultados para circuitos aritméticos. Isto se deve principalmente ao fato do carry ser uma função unate, o que pode introduzir redundâncias no circuito se esta propriedade (de ser unate) não for tratada adequadamente. O algoritmo proposto também abre possibilidades para a criação de outras ferramentas de CAD, como por exemplo: uma ferramenta para análise de timing, um gerador de circuitos aritméticos sem redundâncias, ou ainda uma ferramenta para geração de teste, incluindo lista de falhas, vetores de teste e cobertura de falhas. / Algorithms for digital circuit design aim the reduction of a cost function composed of four criteria: area, delay, power and testability. Usually these algorithms are able to obtain a trade-off for the optimization of two of these criteria. Undesired effects may occur due to the optimization of one of the criteria. For instance, delay optimizations may introduce non testable stuck-at faults (redundancies) in a circuit, this way reducing its testability. Several logic synthesis algorithms exploit specific properties of the logic functions to be synthesized. One example of function with specific properties are the socalled unate functions. An example of this kind of function is the carry-out sign in a full adder circuit. This kind of function require special care in order to avoid redundancy introduction. Shannon decomposition [SHA 38] is used in many logic synthesis algorithms for improving circuit performance. The general case of the Shannon decomposition is represented by a binate (not unate) equation. Redundancies are introduced in a circuit when a binate equation is used to express a unate function. Binary Decision Diagrams (BDDs) are a kind of data structures widely used in the field of logic synthesis. Shannon decomposition is also used to derive circuits from BDDs. This data structure is used to represent logic functions, but it is not able to maintain an irredundant representation of any logic function. Unfortunately, circuits derived from BDDs will possibly have redundancies, specially when Shannon decomposition is used. Some data structures are able to represent any logic function in a irredundant form. This is the case of the VPBDDs [REI 95a] [REI 2000], which have special properties that preserve the testability properties of the functions being represented. Based on VPBDD properties, a novel algorithm for redundancy removal was proposed [MAR 2002]. This algorithm is able to generate irredundant circuits even when the function represented by the VPBDD is unate. In addition to the generation of irredundant circuits, the algorithm guarantees that the circuit delay will not be increased by redundancy removal. The final area may be increased, reduced or even remain the same, considering the number of logic gates. The results obtained in this work indicate that the algorithm is able to perform redundancy removal without increasing the circuit delay. Besides, all the redundant paths in the circuit have their delay reduced, as the number of logic gates in series will be reduced by the redundancy removal process. The application of this algorithm gives good results for arithmetic circuits. This is mainly due to the fact that the carry chain is composed of unate functions, this way redundancies are introduced in the circuit if this property is not adequately treated. The proposed algorithm allows for the creation of other CAD tools, as for instance: a timing analysis tool, a generator of irredundant arithmetic circuits, or even a test generation tool, including list of faults, test vectors as well as fault coverage.
246

Low-Dimensional Control Representations for Muscle-Based Characters : Application to Overhead Throwing / Modèles de commande de dimension réduite pour des avatars actionnés par des muscles : Application à des mouvements de lancer

Cruz Ruiz, Ana Lucia 02 December 2016 (has links)
L’utilisation de personnages virtuels dans le cadre de simulations basées sur les lois de la physique trouve maintenant des applications allant de la biomécanique à l’animation. L’un des éléments incontournables de cette performance est le contrôleur de mouvement, capable de transformer les actions souhaitées en mouvements synthétisés. La conceptualisation de ces contrôleurs a profondément évolué grâce à l'apport des connaissances en biomécanique qui a conduit à l'utilisation de modèles de personnages encore plus détaillés car s'inspirant de l’appareil squelettique et surtout musculaire de l’être humain (ou personnages à modèle musculaire). Contrôler les personnages virtuels implique un défi de taille : contrôler la redondance, ou le fait même qu’un nombre important de muscles ou d’actionneurs aient besoin d’être contrôlés simultanément pour exécuter la tâche de motricité demandée.L’objectif de cette thèse est d’y répondre en s’inspirant du système de contrôle moteur humain permettant de gérer cette redondance. Une solution de contrôle, pour les personnages virtuels, est proposée d’après la théorie des synergies musculaires et appliquée à des mouvements de contrôle du lancer. Les synergies musculaires sont des représentations de contrôle à faible dimension et qui permettent aux muscles d’être contrôlés en groupe, réduisant ainsi de manière significative le nombre de variables. Grâce à cette stratégie, cette thèse permet les contributions suivantes : en premier lieu, la validation de la théorie des synergies musculaires, utilisée ici pour étudier un nouveau mouvement et pour tenter de contrôler un personnage virtuel. Et elle contribue également à l'ensemble des domaines impliquant des simulations corporelles, ayant recours aux personnages à modèle musculaire (comme par exemple, la biomécanique ou l'animation) en leur proposant une solution de contrôle permettant de réduire la redondance. / The use of virtual characters in physics-based simulations has applications that range from biomechanics to animation. An essential component behind such applications is the character’s motion controller, which transforms desired tasks into synthesized motions. The way these controllers are designed is being profoundly transformed through the integration of knowledge from biomechanics, which motivates the idea of using more detailed character models, inspired by the human musculoskeletal system (or muscle-based characters). Controlling these characters implies solving an important challenge: control redundancy, or the fact that numerous muscles or actuators need to be coordinated simultaneously to achieve the desired motion task.The goal of this thesis is to address this challenge by taking inspiration from how the human motor control system manages this redundancy. A control solution for virtual characters is proposed based on the theory of muscle synergies, and applied on the control of throwing motions. Muscle synergies are low-dimensional control representations that allow muscles to be controlled in groups, thus reducing significantly the number of control variables.Through this solution this thesis has the following contributions: 1) A contribution to the validation of the muscle synergy theory by using it to study a new motion, and challenging it with the control of a virtual character, and 2) a contribution to the variety of domains involving physical simulation with muscle-based characters (e.g, biomechanics, animation) by proposing a control solution that reduces redundancy.
247

Teorie komunikace jakožto explanatorní princip přirozené víceúrovňové segmentace textů / The Theory of Communication as an Explanatory Principle for the Natural Multilevel Text Segmentation

Milička, Jiří January 2016 (has links)
1. Phonemes, words, clauses and sentences are not a logical necessity of language, unlike distinctive features and morphemes. 2. Despite this, such nested segmentation is very firmly present in languages and in our concepts of language description, 3. because nested segmentation and inserting redundancy on multiple levels is an efficient way to get the language signal through the burst-noise channel. 4. There are various strategies how redundancy can be added and what kind of redundancy can be added. 5. The segment delimiter is expressed by some additional information and the amount of delimiting information is independent from the length of the seg- ment it delimits. This principle can serve as a basis for a successful model for the Menzerath's relation.
248

Análise dos tempos de reparo em sistemas redundantes do tipo Cold Standby com alternância

Botelho, Heitor Cabral January 2016 (has links)
Nas indústrias química e petroquímica o uso de sistemas redundantes é comum. Exceto pelos programas de lubrificação, a estratégia de manutenção adotada para estes sistemas é, principalmente, a manutenção corretiva. Os objetivos desta dissertação são, a partir do registro do histórico de falhas dos equipamentos de uma unidade fabril petroquímica e conceitos de confiabilidade, estimar o tempo limite que estes sistemas podem operar sem intervenções de manutenção, mantendo a disponibilidade do sistema em níveis adequados. Esse tempo limite foi usado para desenvolver um indicador a ser utilizado no processo de priorização das atividades de manutenção. Para atingir os objetivos foram desenvolvidas as seguintes etapas: a) revisão dos dados de confiabilidade; b) elaboração de modelagem de sistemas de bombeamento. Inicialmente foi realizada uma revisão dos dados de confiabilidade coletados pela empresa em estudo, a partir da qual se obteve análise dos problemas encontrados com os dados, sumário de procedimentos a serem adotados para cada tipo de problema e sugestões para evitar sua reincidência. Por meio dos resultados iniciais, foi elaborada a modelagem de sistemas de bombeamento, utilizando o método de Monte Carlo. Obtevese, como resultado, curvas de disponibilidade do sistema versus tempos para reparo. O método proposto é simples de ser utilizado em campo e, definida a disponibilidade desejada para o sistema redundante, permite o cálculo do máximo tempo para reparo do equipamento em falha. / In chemical and petrochemical industries redundant systems are usual. Except by lubrication programs, the maintenance strategy adopted for these systems is mainly corrective maintenance. Considering the historical failure records of the equipment of a factory and the use of reliability concepts, the goal of this work is to estimate the maximum time that these systems can operate without maintenance interference, while keeping the system availability on adequate levels. This maximum time was used to develop an indicator to be used in the process of prioritization of maintenance activities. To achieve these goals, the following steps have been developed: a) reliability data review; b) elaboration of a pumping system model. Initially, a review of the reliability data collect at the studied company was performed, from which an analysis of the problems encountered at these data, a summary of procedures to be adopted for each type of problem, and suggestions to avoid its recurrence were established. As a consequence of first results, a model for each pumping system using the Monte Carlo method was developed and availability curves of the system versus time to repair were obtained. The proposed method is simple to use in the field and, considering the desired availability for the redundant system, it allows the calculation of the maximum time to repair equipment failures.
249

Redundant Skewed Clocking of Pulse-Clocked Latches for Low Power Soft-Error Mitigation

January 2015 (has links)
abstract: An integrated methodology combining redundant clock tree synthesis and pulse clocked latches mitigates both single event upsets (SEU) and single event transients (SET) with reduced power consumption. This methodology helps to change the hardness of the design on the fly. This approach, with minimal additional overhead circuitry, has the ability to work in three different modes of operation depending on the speed, hardness and power consumption required by design. This was designed on 90nm low-standby power (LSP) process and utilized commercial CAD tools for testing. Spatial separation of critical nodes in the physical design of this approach mitigates multi-node charge collection (MNCC) upsets. An advanced encryption system implemented with the proposed design, compared to a previous design with non-redundant clock trees and local delay generation. The proposed approach reduces energy per operation up to 18% over an improved version of the prior approach, with negligible area impact. It can save up to 2/3rd of the power consumption and reach maximum possible frequency, when used in non-redundant mode of operation. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2015
250

Análise dos tempos de reparo em sistemas redundantes do tipo Cold Standby com alternância

Botelho, Heitor Cabral January 2016 (has links)
Nas indústrias química e petroquímica o uso de sistemas redundantes é comum. Exceto pelos programas de lubrificação, a estratégia de manutenção adotada para estes sistemas é, principalmente, a manutenção corretiva. Os objetivos desta dissertação são, a partir do registro do histórico de falhas dos equipamentos de uma unidade fabril petroquímica e conceitos de confiabilidade, estimar o tempo limite que estes sistemas podem operar sem intervenções de manutenção, mantendo a disponibilidade do sistema em níveis adequados. Esse tempo limite foi usado para desenvolver um indicador a ser utilizado no processo de priorização das atividades de manutenção. Para atingir os objetivos foram desenvolvidas as seguintes etapas: a) revisão dos dados de confiabilidade; b) elaboração de modelagem de sistemas de bombeamento. Inicialmente foi realizada uma revisão dos dados de confiabilidade coletados pela empresa em estudo, a partir da qual se obteve análise dos problemas encontrados com os dados, sumário de procedimentos a serem adotados para cada tipo de problema e sugestões para evitar sua reincidência. Por meio dos resultados iniciais, foi elaborada a modelagem de sistemas de bombeamento, utilizando o método de Monte Carlo. Obtevese, como resultado, curvas de disponibilidade do sistema versus tempos para reparo. O método proposto é simples de ser utilizado em campo e, definida a disponibilidade desejada para o sistema redundante, permite o cálculo do máximo tempo para reparo do equipamento em falha. / In chemical and petrochemical industries redundant systems are usual. Except by lubrication programs, the maintenance strategy adopted for these systems is mainly corrective maintenance. Considering the historical failure records of the equipment of a factory and the use of reliability concepts, the goal of this work is to estimate the maximum time that these systems can operate without maintenance interference, while keeping the system availability on adequate levels. This maximum time was used to develop an indicator to be used in the process of prioritization of maintenance activities. To achieve these goals, the following steps have been developed: a) reliability data review; b) elaboration of a pumping system model. Initially, a review of the reliability data collect at the studied company was performed, from which an analysis of the problems encountered at these data, a summary of procedures to be adopted for each type of problem, and suggestions to avoid its recurrence were established. As a consequence of first results, a model for each pumping system using the Monte Carlo method was developed and availability curves of the system versus time to repair were obtained. The proposed method is simple to use in the field and, considering the desired availability for the redundant system, it allows the calculation of the maximum time to repair equipment failures.

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