Les nombres aléatoires ont été de tous temps utilisés pour des jeux de hasard, plus récemment pour créer des codes secrets et ils sont aujourd'hui nécessaire à l'exécution de programmes informatiques. Les générateurs de nombres aléatoires sont maintenant bien éloignés de simples dés à lancer et sont constitués de circuits électroniques ou d'algorithmes. Ceci pose des problèmes quant à la reconnaissance du caractère aléatoire des nombres générés. De plus, de la même manière ou autrefois les dés étaient pipés pour augmenter les chances de gagner, il est aujourd'hui possible d'influencer la sortie des générateurs de nombres aléatoires.Ce sujet est donc toujours d'actualité avec des exemples récents très médiatisés. Ceci concernait en effet la console de jeu PS3 qui génère un nombre aléatoire constant où la distribution de clefs secrètes redondantes sur internet.Ce mémoire présente l'étude de plusieurs générateurs ainsi que diverses manières de les perturber. Il montre ainsi des faiblesses inhérentes à leurs conceptions et des conséquences possibles de leur défaillance sur des composants de sécurité. Ces travaux ont de plus permis de mettre en évidence l'importance des problématiques concernant le test des nombres aléatoires ainsi que des retraitements corrigeant des biais dans ces nombres. / Random numbers have been used through the ages for games of chance, more recently for secret codes and today they are necessary to the execution of computer programs. Random number générators have now evolved from simple dices to electronic circuits and algorithms. Accordingly, the ability to distinguish between random and non-random numbers has become more difficult. Furthemore, whereas in the past dices were loaded in order to increase winning chances, it is now possible to influence the outcome of random number generators.In consequence, this subject is still very much an issue and has recently made the headlines. Indeed, there was talks about the PS3 game console which generates constant random numbers and redundant distribution of secret keys on the internet.This thesis presents a study of several generators as well as different means to perturb them. It shows the inherent defects of their conceptions and possible consequences of their failure when they are embedded inside security components. Moreover, this work highlights problems yet to be solved concerning the testing of random numbers and the post-processing eliminating bias in these numbers distribution.

No mercado financeiro, a precificação de contratos complexos muitas vezes apoia-se em técnicas de simulação numérica. Estes métodos de precificação geralmente apresentam baixo desempenho devido ao grande custo computacional envolvido, o que dificulta a análise e a tomada de decisão por parte do trader. O objetivo deste trabalho é apresentar uma ferramenta de alto desempenho para a precificação de instrumentos financeiros baseados em simulações numéricas. A proposta é construir uma calculadora eficiente para a precificação de opções multivariadas baseada no método de Monte Carlo, utilizando a plataforma CUDA de programação paralela. Serão apresentados os conceitos matemáticos que embasam a precificação risco-neutra, tanto no contexto univariado quanto no multivariado. Após isso entraremos em detalhes sobre a implementação da simulação Monte Carlo e a arquitetura envolvida na plataforma CUDA. No final, apresentaremos os resultados obtidos comparando o tempo de execução dos algoritmos. / In the financial market, the pricing of complex contracts often relies on numerical simulation techniques. These pricing methods generally present poor performance due to the large computational cost involved, which makes it difficult for the trader to analyze and make decisions. The objective of this work is to present a high performance tool for the pricing of financial instruments based on numerical simulations. The proposal is to present an efficient calculator for the pricing of multivariate options based on the Monte Carlo method, using the parallel programming CUDA platform. The mathematical concepts underlying risk-neutral pricing, both in the univariate and in the multivariate context, will be presented. After this we will detail the implementation of the Monte Carlo simulation and the architecture involved in the CUDA platform. At the end, we will present the results obtained comparing the execution time of the algorithms.

A new type of computing architecture called ePUMA is under development by the ePUMA Research Team at the Department of Electrical Engineering at Linköping University in Linköping. This contains several single instruction multiple data (SIMD) cores, which are called SIMD Units, where up to 64 computations can be done in parallel. The goal with the architecture is to create a low-power chip with good performance for embedded applications. One possible application is video games. In this work we have studied a selected set of video game related algorithms, including a Pseudo-Random Number Generator, Clipping and Rasterization & Fragment Processing, analyzing how well they fit the ePUMA platform.

Aujourd'hui, nous utilisons de plus en plus d'appareils "connectés" (téléphone portable, badge d'accès ou de transport, carte bancaire NFC, ...), et cette tendance ne va pas s'inverser. Ces appareils requièrent l'utilisation de primitives cryptographiques, embarquées dans des composants électroniques, dans le but de protéger les communications. Cependant, des techniques d'attaques permettent d'extraire de l'information du composant électronique ou fauter délibérément son fonctionnement. Un nouveau médium d'attaque, exploitant les ondes électromagnétiques est en pleine expansion. Ce médium, par rapport à des techniques de fautes à base de perturbations par faisceau LASER, propose l'avantage d’être à relativement faible coût. Nous présentons dans cette thèse la résistance d'un type de bloc cryptographique, à savoir les générateurs de nombres réellement aléatoires, aux ondes électromagnétiques. Nous montrons qu'il est possible d'extraire de l'information sensible du champ électromagnétique produit par le composant électronique, et qu'il est également possible de perturber un générateur en le soumettant à un fort champ électromagnétique harmonique / Nowadays, our society is using more and more connected devices (cellphones, transport or access card NFC debit card, etc.), and this trend is not going to reverse. These devices require the use of cryptographic primitives, embedded in electronic circuits, in order to protect communications. However, some attacks can allow an attacker to extract information from the electronic circuit or to modify its behavior. A new channel of attack, using electromagnetic waves is skyrocketing. This channel, compared to attacks based on LASER beam, is relatively inexpensive. We will, in this thesis, present a new attack, using electromagnetic waves, of a certain type of cryptographic primitive: the true random number generator. We will show that it is possible to extract sensitive information from the electromagnetic radiation coming from the electronic device. We will also show that it is possible to completly modify the behavior of the true random number generator using a strong electromagnetic field

The diploma thesis is focused on the program development. The program is aimed at finding optimal design parameters for a two-pole emergency spillway. These parameters are the lengths of the spillway edges and their relative height arrangement. The program is based on the flood wave transformation simulation. Multi – gradient algorithm was used for optimization design parameters of a two-pole safety spillway.

Random number generation can be based on physical events with probabilistic character, or on algorithms that use complex or one-way functions, alternatively on both of these approaches. A magnetic vortex is a basic state of magnetization that forms in magnetic micro- and nanostructures of an appropriate shape, dimensions and material. Quantities of the magnetic vortex form randomly if ambient conditions are chosen eligibly. A concept of a true random number generator using a random switching of states of the magnetic vortex is presented in this thesis. This concept is realized and random numbers were experimentally generated and numbers were statistically analysed.

This thesis solves the problem of generating random numbers on low-power devices. Author describes possible ways of generating and implements selected generators of (pseudo)random numbers on MSP430F5438A. 4 generators were added by the enhancement of one of them and a new generator was created, using the phenomenon of temperature change in the surroundings. For each generator, test sequences were generated and these sequences were tested by the Dieharder, STS-NIST, and Visual Test. The output of the thesis is the functional implementation of the generators, their testing by statistical methods and their comparison between each other.

Multilevel Random Pulse Width Modulation (RPWM) schemes have drawn increasing attention in the past few years. Multilevel topologies provide high voltage and high power capabilities and random PWM schemes offer reduction in discrete harmonics spectral. This dissertation provides a generalized theory and analysis methods of the standard five-level Weighted RPWM (WRPWM). Equations have been derived to analyze the spectral performance and average switching frequency of the WRPWM output waveform using statistical approach. A modified WRPWM scheme has been proposed. The modified WRPWM scheme is then analyzed with the equations derived from the same approach. The analyzed theoretical spectrum of the standard five-level WRPWM is then compared with the three-level WRPWM scheme and the conventional carrier based PWM scheme. A scaled laboratory prototype diode clamping five-level inverter has been built for verification of the standard and the proposed modified WRPWM schemes. It can be seen that the experimental measurements and the theoretical analyzed results are all in good agreement. Results show the two five-level WRPWM schemes offers significant improvements on the spectrum content than the conventional carrier based PWM scheme. It was found that the five-level WRPWM schemes have successfully suppress the magnitude of third harmonic below 5% of the magnitude of fundamental component and even less for the higher order harmonic components. Research contributions made by the dissertation are: - The proposed modified multilevel WRPWM scheme which utilizing the switching decision redundancy of multilevel inverter to manipulate the harmonic content of the output signal. - The derived mathematical equations of the standard and modified five-level WRPWM scheme for analytical purposes. / Dissertation (MEng (Electrical Engineering))--University of Pretoria, 2005. / Electrical, Electronic and Computer Engineering / unrestricted

As one of the more mature quantum technologies, quantum random number generators (QRNGs) fill an important role in producing secure and private keys for use in cryptogra- phy in e.g. quantum key distribution (QKD) systems. Many available QRNGs are expen- sive and optical QRNGs often require complex optical setups. If a reliable QRNG could be implemented using less expensive components they could become more widespread and be used in common applications like encryption and simulation. Shot noise is a possible entropy source for these kinds of random number generators. For such a generator to be classified as a QRNG the origin of the shot noise must be controlled and verifiable. This project aims to investigate how an entropy source could be implemented using the shot noise generated by an illuminated photodiode. This requires the design and construction of the accompanying electro-optical front-end used to prepare a signal for sampling. The successful estimation of the electron charge e is used as a way to verify that shot noise is present in the sampled signal. Suitable component values and operating points are also in- vestigated and it is shown that quite low gain (10 000) is suitable for the current-to-voltage amplifier which amplifies the signal generated by the photodiode. For this configuration an estimate of e was achieved with a relative error of 3%. In conclusion this is a promising and interesting approach for generating random numbers at high rates and at low cost. Whether the correct estimation of e is enough to certify that the device is sampling noise from the quantum regime is however not completely clear and further investigation is likely needed.

La sécurité et la cryptographie sont des éléments clés pour les dispositifs soumis à des contraintes comme l’IOT, Carte à Puce, Systèm Embarqué, etc. Leur implémentation matérielle constitue un défi en termes de limitation en ressources physiques, vitesse de fonctionnement, capacité de mémoire, etc. Dans ce contexte, comme la plupart des protocoles s’appuient sur la sécurité d’un bon générateur de nombres aléatoires, considéré comme un élément indispensable dans le noyau de sécurité. Par conséquent, le présent travail propose des nouveaux générateurs pseudo-aléatoires basés sur des itérations chaotiques, et conçus pour être déployés sur des supports matériels, à savoir sur du FPGA ou du ASIC. Ces implémentations matérielles peuvent être décrites comme des post-traitements sur des générateurs existants. Elles transforment donc une suite de nombres non-uniformes en une autre suite de nombres uniformes. La dépendance entre l’entrée et la sortie a été prouvée chaotique selon les définitions mathématiques du chaos fournies notamment par Devaney et Li-Yorke. Suite à cela, nous effectuant tout d’abord un état de l’art complet sur les mises en œuvre matérielles et physiques des générateurs de nombres pseudo-aléatoires (PRNG, pour pseudorandom number generators). Nous proposons ensuite de nouveaux générateurs à base d’itérations chaotiques (IC) qui seront testés sur notre plate-forme matérielle. L’idée de départ était de partir du n-cube (ou, de manière équivalente, de la négation vectorielle dans les IC), puis d’enlever un cycle Hamiltonien suffisamment équilibré pour produire de nouvelles fonctions à itérer, à laquelle s’ajoute une permutation en sortie. Les méthodes préconisées pour trouver de bonnes fonctions serons détaillées, et le tout sera implanté sur notre plate-forme FPGA. Les générateurs obtenus disposent généralement d’un meilleur profil statistique que leur entrée, tout en fonctionnant à une grande vitesse. Finalement, nous les implémenterons sur de nombreux supports matériels (65-nm ASIC circuit and Zynq FPGA platform). / Security and cryptography are key elements in constrained devices such as IoT, smart card, embedded system, etc. Their hardware implementations represent a challenge in terms of limitations in physical resources, operating speed, memory capacity, etc. In this context, as most protocols rely on the security of a good random number generator, considered an indispensable element in lightweight security core. Therefore, this work proposes new pseudo-random generators based on chaotic iterations, and designed to be deployed on hardware support, namely FPGA or ASIC. These hardware implementations can be described as post-processing on existing generators. They transform a sequence of numbers not uniform into another sequence of numbers uniform. The dependency between input and output has been proven chaotic, according notably to the mathematical definitions of chaos provided by Devaney and Li-Yorke. Following that, we firstly elaborate or develop out a complete state of the art of the material and physical implementations of pseudo-random number generators (PRNG, for pseudorandom number generators). We then propose new generators based on chaotic iterations (IC) which will be tested on our hardware platform. The initial idea was to start from the n-cube (or, in an equivalent way, the vectorial negation in CIs), then remove a Hamiltonian cycle balanced enough to produce new functions to be iterated, for which is added permutation on output . The methods recommended to find good functions, will be detailed, and the whole will be implemented on our FPGA platform. The resulting generators generally have a better statistical profiles than its inputs, while operating at a high speed. Finally, we will implement them on many hardware support (65-nm ASIC circuit and Zynq FPGA platform).