Testing code is important, but writing test cases can be time consuming, particularly for beginning programmers who are already struggling to write an implementation. We present TestBuilder, a system for test case generation which uses an SMT solver to generate inputs to reach specified lines in a function, and asks the user what the expected outputs would be for those inputs. The resulting test cases check the correctness of the output, rather than merely ensuring the code does not crash. Further, by querying the user for expectations, TestBuilder encourages the programmer to think about what their code ought to do, rather than assuming that whatever it does is correct. We demonstrate, using mutation testing of student projects, that tests generated by TestBuilder perform better than merely compiling the code using Python’s built-in compile function, although they underperform the tests students write when required to achieve 100% test coverage.

This study investigated the role played by School Management Team (SMT) members in the induction of novice teachers in rural schools. The study arose out of the challenges experienced by the researcher as a member of the SMT with regard to the lack of clarity and direction in the induction of novice teachers attached to his school and a high attrition rate amongst novice teachers.The researcher posed this primary research question: How do members of the SMT in rural schools induct novice teachers? A sample of six rural schools in the Limpopo Provincial Education Department that had recently employed novice teachers was purposefully selected. Particpants uncluded the principal or the Deputy Principal, the HOD or the senior teacher and a novice teacher. Research has documented an array of challenges that novice teachers encounter in schools and hence the high attrition rates. This study used a qualitative research approach and a case study design to investigate the problem. The study was framed by Feldman’s (1981) theory of organisational socialisation, which stated that newly employed incumbents need to be inducted into their new organisation by management in order to become effect employees. The findings reveal that SMT members in rural schools do indeed induct their novice teachers, but that their dutis and efforts in this regard are negatively affected by a lack of induction policy, lack of support from the Education Department personnel and a lack of training. / Dissertation (MEd)--University of Pretoria, 2017. / Education Management and Policy Studies / MEd / Unrestricted

京都大学 / 0048 / 新制・課程博士 / 博士(情報学) / 甲第20022号 / 情博第617号 / 新制||情||107(附属図書館) / 33118 / 京都大学大学院情報学研究科知能情報学専攻 / (主査)教授 黒橋 禎夫, 教授 田中 克己, 教授 河原 達也 / 学位規則第4条第1項該当 / Doctor of Informatics / Kyoto University / DFAM

Indoor wireless communication systems are becoming increasingly prevalent in work environments. The need to quickly and efficiently provide in-building and microcellular coverage without sacrificing quality is critical to cellular and emerging personal communication system (PCS) operators. Traditionally, indoor wireless communication system design has been carried out by human experts relying on experience to determine a satisfactory system configuration. This thesis describes the algorithms and technical considerations implemented in a comprehensive propagation planning tool, SMT Plus, which has been designed to predict the coverage regions of both in-building and microcellular wireless communication systems. The goal of SMT Plus is to provide both wireless service providers and equipment manufacturers with an efficient, easy-to-use coverage prediction tool for use in the design of any indoor or campus-wide wireless system. Using site-specific building information combined with on-site signal strength measurements, the tool provides system planners with a highly accurate model of the propagation environment among a group of buildings. SMT Plus provides a comprehensive solution to the planning and installation of wireless communication systems in and around buildings. / Master of Science

Tecnologia de montagem de superfície (SMT) é um método para construção de circuitos eletrônicos, nos quais os componentes são montados diretamente sobre a superfície da placa de circuito impresso. Tais dispositivos eletrônicos são chamados de dispositivos de montagens de superfície ou SMDs. Paralelamente, as vantagens oferecidas pelo componente eletrônico LED SMD têm causado uma grande aplicação desse dispositivo em substituição ao LED convencional. O presente trabalho apresenta um sistema inteligente baseado em sistemas de inferência fuzzy para estimar valores de intensidade luminosa de equipamentos automotivos a partir de dados de projeto. Embora o trabalho esteja direcionado para a aplicação de LEDs SMD em lanternas traseiras, o trabalho aqui desenvolvido pode ser generalizado e usado em outras aplicações industriais, tais como semáforos de trânsito, painéis eletrônicos de mensagens ou qualquer outra aplicação onde use LEDs SMD em conjunto. Resultados de protótipos são apresentados para validar a técnica proposta. Por meio desses resultados, pode-se observar que a aplicação de sistemas inteligentes é uma abordagem atrativa para este tipo de problema. / Surface mount technology (SMT) is a method for making electronic circuits in which the components are mounted directly onto the surface of printed circuit boards. Such electronic devices are called surface-mount devices or SMDs. The advantages offered by the electronic component SMD LED (Light Emitting Diode) have caused a wide application of this device in replacement of conventional LEDs. This work shows an intelligent system using fuzzy interference systems to estimate values of luminous intensity in automotive equipments from design data. Although this work is aimed to the application of SMD LEDs in rear lights, methods hereby developed and described can also be used in other applications, such as traffic lights, electronic panels of messages or any other application where SMD LEDs are used in groups. Results of prototypes are presented to validate the proposed technique. From these results, it can be observed that the application of intelligent systems is an attractive approach to this type of problem.

Tecnologia de montagem de superfície (SMT) é um método para construção de circuitos eletrônicos, nos quais os componentes são montados diretamente sobre a superfície da placa de circuito impresso. Tais dispositivos eletrônicos são chamados de dispositivos de montagens de superfície ou SMDs. Paralelamente, as vantagens oferecidas pelo componente eletrônico LED SMD têm causado uma grande aplicação desse dispositivo em substituição ao LED convencional. O presente trabalho apresenta um sistema inteligente baseado em sistemas de inferência fuzzy para estimar valores de intensidade luminosa de equipamentos automotivos a partir de dados de projeto. Embora o trabalho esteja direcionado para a aplicação de LEDs SMD em lanternas traseiras, o trabalho aqui desenvolvido pode ser generalizado e usado em outras aplicações industriais, tais como semáforos de trânsito, painéis eletrônicos de mensagens ou qualquer outra aplicação onde use LEDs SMD em conjunto. Resultados de protótipos são apresentados para validar a técnica proposta. Por meio desses resultados, pode-se observar que a aplicação de sistemas inteligentes é uma abordagem atrativa para este tipo de problema. / Surface mount technology (SMT) is a method for making electronic circuits in which the components are mounted directly onto the surface of printed circuit boards. Such electronic devices are called surface-mount devices or SMDs. The advantages offered by the electronic component SMD LED (Light Emitting Diode) have caused a wide application of this device in replacement of conventional LEDs. This work shows an intelligent system using fuzzy interference systems to estimate values of luminous intensity in automotive equipments from design data. Although this work is aimed to the application of SMD LEDs in rear lights, methods hereby developed and described can also be used in other applications, such as traffic lights, electronic panels of messages or any other application where SMD LEDs are used in groups. Results of prototypes are presented to validate the proposed technique. From these results, it can be observed that the application of intelligent systems is an attractive approach to this type of problem.

Des nombreuses applications de méthodes formelles se fondent sur les solveurs SMT pour valider automatiquement les conditions à vérifier et fournissent des certificats de leurs résultats. Nous visons à la fois à améliorer l'efficacité des solveurs SMT et à accroître leur fiabilité. Notre première contribution est un cadre uniforme pour le raisonnement avec des formules quantifiées dans les solveurs SMT, dans lequel généralement diverses techniques d'instanciation sont utilisées. Nous montrons que les principales techniques d'instanciation peuvent être jetées dans ce cadre. Le cadre repose sur le problème de l'E-ground (dis)unification. Nous présentons une procédure de décision pour résoudre ce problème en pratique: Fermeture de congruence avec variables libres (CCFV}). Nous mesurons l'impact de CCFV dans les solveurs SMT veriT et CVC4. Nous montrons que nos implémentations présentent des améliorations par rapport aux approches à la fine pointe de la technologie. Notre deuxième contribution est un cadre pour le traitement des formules tout en produisant des preuves détaillées. Les principaux composants de notre cadre de production de preuve sont un algorithme de récurrence contextuelle générique et un ensemble extensible de règles d'inférence. Avec des structures de données appropriées, la génération des preuves ne crée que des frais généraux linéaires et les vérifications peuvent être vérifiées en temps linéaire. Nous avons également mis en œuvre l'approche en veriT. Cela nous a permis de simplifier considérablement la base du code tout en augmentant le nombre de problèmes pour lesquels des preuves détaillées peuvent être produites / In many formal methods applications it is common to rely on SMT solvers to automatically discharge conditions that need to be checked and provide certificates of their results. In this thesis we aim both to improve their efficiency of and to increase their reliability. Our first contribution is a uniform framework for reasoning with quantified formulas in SMT solvers, in which generally various instantiation techniques are employed. We show that the major instantiation techniques can be all cast in this unifying framework. Its basis is the problem of E-ground (dis)unification, a variation of the classic rigid E-unification problem. We introduce a decision procedure to solve this problem in practice: Congruence Closure with Free Variables (CCFV). We measure the impact of optimizations and instantiation techniques based on CCFV in the SMT solvers veriT and CVC4, showing that our implementations exhibit improvements over state-of-the-art approaches in several benchmark libraries stemming from real world applications. Our second contribution is a framework for processing formulas while producing detailed proofs. The main components of our proof producing framework are a generic contextual recursion algorithm and an extensible set of inference rules. With suitable data structures, proof generation creates only a linear-time overhead, and proofs can be checked in linear time. We also implemented the approach in veriT. This allowed us to dramatically simplify the code base while increasing the number of problems for which detailed proofs can be produced

Made available in DSpace on 2015-04-22T22:11:22Z (GMT). No. of bitstreams: 1 Alberjan.pdf: 1648406 bytes, checksum: e7cc01faadea0adae547a7958b75ccce (MD5) Previous issue date: 2011-07-15 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / This work was aimed at applying the tools of the PRS System (Lean Production), whose primary tool was crafted VSM (Value Stream Mapping), a process known as SMT (Surface Mount Technology). Principles for lean production, eliminating waste and creating value stream in a real situation through kaizen events, were used to obtain results of this application, showing a lean transformation, with significant reductions in waste generated in the process. The study period was eight months into a private company located in PIM, where through the use of tools of this system and methodology of action research, it was possible to identify the critical process - setup - where focused improvement actions. With the change in the system setup, the standard work and creating a setup program using visual aid, favoring the continuous flow in this process. During the research, trainings were conducted in the factory with the operators, leaders, supervisors and engineers responsible, who participated actively in the improvement actions. Therefore, through value stream mapping, we propose to draw the current state of the stream, offering a future state, identifying and eliminating everything does not add value. To quantify the increase in productivity on the factory floor and total earnings of areas in the factory. / Este trabalho teve como objetivo a aplicação das ferramentas do Sistema de Produção Enxuta (SPE), cuja principal ferramenta trabalhada foi o Mapeamento da cadeia de valor (VSM), num processo denominado Tecnologia em Montagem de Superfície (SMT). Princípios que regem a produção enxuta, eliminação de desperdícios e a criação do fluxo de valor em uma situação real, através de eventos kaizen, foram utilizados para a obtenção de resultados dessa aplicação, evidenciando uma transformação enxuta, com expressivas reduções dos desperdícios gerados no processo. O período da pesquisa foi de oito meses em uma empresa privada situada no PIM, onde por meio da utilização de ferramentas desse sistema e a metodologia da pesquisa-ação, foi possível identificar o processo crítico setup para onde se concentraram as ações de melhorias. Com a mudança na sistemática de setup, no trabalho padronizado e criação de um setup programado, utilizando indicações visuais, favorecendo o fluxo contínuo nesta cadeia produtiva. No desenvolvimento da pesquisa, foram realizados treinamentos in loco com os operadores, líderes, supervisores e os engenheiros responsáveis, os quais participavam ativamente nas ações de melhoria. Portanto, através do mapeamento da cadeia de valor, propõem-se desenhar o estado atual da cadeia, propondo um estado futuro, identificando e eliminando aquilo que não agrega valor. Com isso, quantificar o aumento na produtividade no chão de fábrica e ganhos totais de áreas na fábrica.

Programinės įrangos testavimas ir kokybės užtikrinimas yra svarbus programų sistemų inžinerijos kūrimo uždavinys, siekiant sukurti tinkamą naudojimui produktą. Yra daug skirtingų metodikų kuriamai programinei įrangai testuoti, tačiau vieningos sistemos, kuri būtų universali – nėra. Įvairūs tyrimai vykdomi programinės įrangos testavimo srityje duoda skirtingus rezultatus. Testavimo procesas taip pat svarbus ir praktikoje – be jo negali išsiversti nei vienas organizacija susijusi su programinės įrangos kūrimu ir plėtojimu. Šis darbas remiasi modeliu paremto testavimo paradigma ir simboliniu vykdymo metodika. Darbe apžvelgiamos teorinės simbolinio vykdymo galimybės, jo pritaikymas .Net platformoje ir papildomos priemonės, kurios reikalingos įgyvendinti tokią sistemą. Taip pat trumpai pristatomas magistro projektinis darbas, aprašomi sukurti inžinerinio produkto svarbiausi aspektai. Pagal teorinę medžiaga sukurtas simbolinio vykdymo variklis – Symex. Darbe nagrinėjamas praktinis tokio įrankio pritaikymas generuojant vienetų testus iš išeities kodo – eksperimentiškai tiriamos ir lyginamos simbolinio vykdymo ir atsitiktinių įėjimų vienetų testų kūrimo galimybės .Net platformoje. / Testing complex safety critical software always was difficult task. Development of automated techniques for error detection is even more difficult. Well known techniques for checking software are model checking static analysis and testing. Symbolic execution is a technique that is being used to improve security, to find bugs, and to help in debugging. A symbolic execution engine is basically an interpreter that figures out how to follow all paths in a program. It is a static code analysis technique. This work presents symbolic execution background, current state, analysis the possibilities of implementation on the .Net framework and platform. The work describes the master project – bug tracking software “Crunchbug” and the tool – Symex (symbolic execution engine) for .Net platform. Symex is white box model based automatic unit test generator and it is evaluated against two other tools – Microsoft Pex and framework that generates unit test inputs random. Detailed experiments made to cover symbolic execution possibilities with proprietary benchmarks and real code from the master project.

La recherche d'une borne supérieure au temps d'exécution d'un programme est une partie essentielle du processus de vérification de systèmes temps-réel critiques. Les programmes de tels systèmes ont généralement des temps d'exécution variables et il est difficile, voire impossible, de prédire l'ensemble de ces temps possibles. Au lieu de cela, il est préférable de rechercher une approximation du temps d'exécution pire-cas ou Worst-Case Execution Time (WCET). Une propriété cruciale de cette approximation est qu'elle doit être sûre, c'est-à-dire qu'elle doit être garantie de majorer le WCET. Parce que nous cherchons à prouver que le système en question se termine en un temps raisonnable, une surapproximation est le seul type d'approximation acceptable. La garantie de cette propriété de sûreté ne saurait raisonnablement se faire sans analyse statique, un résultat se basant sur une série de tests ne pouvant être sûr sans un traitement exhaustif des cas d'exécution. De plus, en l'absence de certification du processus de compilation (et de transfert des propriétés vers le binaire), l'extraction de propriétés doit se faire directement sur le code binaire pour garantir leur fiabilité. Toutefois, cette approximation a un coût : un pessimisme - écart entre le WCET estimé et le WCET réel - important entraîne des surcoûts superflus de matériel pour que le système respecte les contraintes temporelles qui lui sont imposées. Il s'agit donc ensuite, tout en maintenant la garantie de sécurité de l'estimation du WCET, d'améliorer sa précision en réduisant cet écart de telle sorte qu'il soit suffisamment faible pour ne pas entraîner des coûts supplémentaires démesurés. Un des principaux facteurs de surestimation est la prise en compte de chemins d'exécution sémantiquement impossibles, dits infaisables, dans le calcul du WCET. Ceci est dû à l'analyse par énumération implicite des chemins ou Implicit Path Enumeration Technique (IPET) qui raisonne sur un surensemble des chemins d'exécution. Lorsque le chemin d'exécution pire-cas ou Worst-Case Execution Path (WCEP), correspondant au WCET estimé, porte sur un chemin infaisable, la précision de cette estimation est négativement affectée. Afin de parer à cette perte de précision, cette thèse propose une technique de détection de chemins infaisables, permettant l'amélioration de la précision des analyses statiques (dont celles pour le WCET) en les informant de l'infaisabilité de certains chemins du programme. Cette information est passée sous la forme de propriétés de flot de données formatées dans un langage d'annotation portable, FFX, permettant la communication des résultats de notre analyse de chemins infaisables vers d'autres analyses. Les méthodes présentées dans cette thèse sont inclues dans le framework OTAWA, développé au sein de l'équipe TRACES à l'IRIT. Elles usent elles-mêmes d'approximations pour représenter les états possibles de la machine en différents points du programme. / The search for an upper bound of the execution time of a program is an essential part of the verification of real-time critical systems. The execution times of the programs of such systems generally vary a lot, and it is difficult, or impossible, to predict the range of the possible times. Instead, it is better to look for an approximation of the Worst-Case Execution Time (WCET). A crucial requirement of this estimate is that it must be safe, that is, it must be guaranteed above the real WCET. Because we are looking to prove that the system in question terminates reasonably quickly, an overapproximation is the only acceptable form of approximation. The guarantee of such a safety property could not sensibly be done without static analysis, as a result based on a battery of tests could not be safe without an exhaustive handling of test cases. Furthermore, in the absence of a certified compiler (and tech- nique for the safe transfer of properties to the binaries), the extraction of properties must be done directly on binary code to warrant their soundness. However, this approximation comes with a cost : an important pessimism, the gap between the estimated WCET and the real WCET, would lead to superfluous extra costs in hardware in order for the system to respect the imposed timing requirements. It is therefore important to improve the precision of the WCET by reducing this gap, while maintaining the safety property, as such that it is low enough to not lead to immoderate costs. A major cause of overestimation is the inclusion of semantically impossible paths, said infeasible paths, in the WCET computation. This is due to the use of the Implicit Path Enumeration Technique (IPET), which works on an superset of the possible execution paths. When the Worst-Case Execution Path (WCEP), corresponding to the estimated WCET, is infeasible, the precision of that estimation is negatively affected. In order to deal with this loss of precision, this thesis proposes an infeasible paths detection technique, enabling the improvement of the precision of static analyses (namely for WCET estimation) by notifying them of the infeasibility of some paths of the program. This information is then passed as data flow properties, formatted in the FFX portable annotation language, and allowing the communication of the results of our infeasible path analysis to other analyses.